mmu.c 75 KB

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  1. /*
  2. * Kernel-based Virtual Machine driver for Linux
  3. *
  4. * This module enables machines with Intel VT-x extensions to run virtual
  5. * machines without emulation or binary translation.
  6. *
  7. * MMU support
  8. *
  9. * Copyright (C) 2006 Qumranet, Inc.
  10. *
  11. * Authors:
  12. * Yaniv Kamay <yaniv@qumranet.com>
  13. * Avi Kivity <avi@qumranet.com>
  14. *
  15. * This work is licensed under the terms of the GNU GPL, version 2. See
  16. * the COPYING file in the top-level directory.
  17. *
  18. */
  19. #include "mmu.h"
  20. #include <linux/kvm_host.h>
  21. #include <linux/types.h>
  22. #include <linux/string.h>
  23. #include <linux/mm.h>
  24. #include <linux/highmem.h>
  25. #include <linux/module.h>
  26. #include <linux/swap.h>
  27. #include <linux/hugetlb.h>
  28. #include <linux/compiler.h>
  29. #include <asm/page.h>
  30. #include <asm/cmpxchg.h>
  31. #include <asm/io.h>
  32. #include <asm/vmx.h>
  33. /*
  34. * When setting this variable to true it enables Two-Dimensional-Paging
  35. * where the hardware walks 2 page tables:
  36. * 1. the guest-virtual to guest-physical
  37. * 2. while doing 1. it walks guest-physical to host-physical
  38. * If the hardware supports that we don't need to do shadow paging.
  39. */
  40. bool tdp_enabled = false;
  41. #undef MMU_DEBUG
  42. #undef AUDIT
  43. #ifdef AUDIT
  44. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
  45. #else
  46. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
  47. #endif
  48. #ifdef MMU_DEBUG
  49. #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
  50. #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
  51. #else
  52. #define pgprintk(x...) do { } while (0)
  53. #define rmap_printk(x...) do { } while (0)
  54. #endif
  55. #if defined(MMU_DEBUG) || defined(AUDIT)
  56. static int dbg = 0;
  57. module_param(dbg, bool, 0644);
  58. #endif
  59. static int oos_shadow = 1;
  60. module_param(oos_shadow, bool, 0644);
  61. #ifndef MMU_DEBUG
  62. #define ASSERT(x) do { } while (0)
  63. #else
  64. #define ASSERT(x) \
  65. if (!(x)) { \
  66. printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
  67. __FILE__, __LINE__, #x); \
  68. }
  69. #endif
  70. #define PT_FIRST_AVAIL_BITS_SHIFT 9
  71. #define PT64_SECOND_AVAIL_BITS_SHIFT 52
  72. #define VALID_PAGE(x) ((x) != INVALID_PAGE)
  73. #define PT64_LEVEL_BITS 9
  74. #define PT64_LEVEL_SHIFT(level) \
  75. (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
  76. #define PT64_LEVEL_MASK(level) \
  77. (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
  78. #define PT64_INDEX(address, level)\
  79. (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
  80. #define PT32_LEVEL_BITS 10
  81. #define PT32_LEVEL_SHIFT(level) \
  82. (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
  83. #define PT32_LEVEL_MASK(level) \
  84. (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
  85. #define PT32_INDEX(address, level)\
  86. (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
  87. #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
  88. #define PT64_DIR_BASE_ADDR_MASK \
  89. (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
  90. #define PT32_BASE_ADDR_MASK PAGE_MASK
  91. #define PT32_DIR_BASE_ADDR_MASK \
  92. (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
  93. #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
  94. | PT64_NX_MASK)
  95. #define PFERR_PRESENT_MASK (1U << 0)
  96. #define PFERR_WRITE_MASK (1U << 1)
  97. #define PFERR_USER_MASK (1U << 2)
  98. #define PFERR_FETCH_MASK (1U << 4)
  99. #define PT_DIRECTORY_LEVEL 2
  100. #define PT_PAGE_TABLE_LEVEL 1
  101. #define RMAP_EXT 4
  102. #define ACC_EXEC_MASK 1
  103. #define ACC_WRITE_MASK PT_WRITABLE_MASK
  104. #define ACC_USER_MASK PT_USER_MASK
  105. #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
  106. #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
  107. struct kvm_rmap_desc {
  108. u64 *shadow_ptes[RMAP_EXT];
  109. struct kvm_rmap_desc *more;
  110. };
  111. struct kvm_shadow_walk {
  112. int (*entry)(struct kvm_shadow_walk *walk, struct kvm_vcpu *vcpu,
  113. u64 addr, u64 *spte, int level);
  114. };
  115. struct kvm_shadow_walk_iterator {
  116. u64 addr;
  117. hpa_t shadow_addr;
  118. int level;
  119. u64 *sptep;
  120. unsigned index;
  121. };
  122. #define for_each_shadow_entry(_vcpu, _addr, _walker) \
  123. for (shadow_walk_init(&(_walker), _vcpu, _addr); \
  124. shadow_walk_okay(&(_walker)); \
  125. shadow_walk_next(&(_walker)))
  126. struct kvm_unsync_walk {
  127. int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
  128. };
  129. typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
  130. static struct kmem_cache *pte_chain_cache;
  131. static struct kmem_cache *rmap_desc_cache;
  132. static struct kmem_cache *mmu_page_header_cache;
  133. static u64 __read_mostly shadow_trap_nonpresent_pte;
  134. static u64 __read_mostly shadow_notrap_nonpresent_pte;
  135. static u64 __read_mostly shadow_base_present_pte;
  136. static u64 __read_mostly shadow_nx_mask;
  137. static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
  138. static u64 __read_mostly shadow_user_mask;
  139. static u64 __read_mostly shadow_accessed_mask;
  140. static u64 __read_mostly shadow_dirty_mask;
  141. static u64 __read_mostly shadow_mt_mask;
  142. void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
  143. {
  144. shadow_trap_nonpresent_pte = trap_pte;
  145. shadow_notrap_nonpresent_pte = notrap_pte;
  146. }
  147. EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
  148. void kvm_mmu_set_base_ptes(u64 base_pte)
  149. {
  150. shadow_base_present_pte = base_pte;
  151. }
  152. EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
  153. void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
  154. u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 mt_mask)
  155. {
  156. shadow_user_mask = user_mask;
  157. shadow_accessed_mask = accessed_mask;
  158. shadow_dirty_mask = dirty_mask;
  159. shadow_nx_mask = nx_mask;
  160. shadow_x_mask = x_mask;
  161. shadow_mt_mask = mt_mask;
  162. }
  163. EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
  164. static int is_write_protection(struct kvm_vcpu *vcpu)
  165. {
  166. return vcpu->arch.cr0 & X86_CR0_WP;
  167. }
  168. static int is_cpuid_PSE36(void)
  169. {
  170. return 1;
  171. }
  172. static int is_nx(struct kvm_vcpu *vcpu)
  173. {
  174. return vcpu->arch.shadow_efer & EFER_NX;
  175. }
  176. static int is_present_pte(unsigned long pte)
  177. {
  178. return pte & PT_PRESENT_MASK;
  179. }
  180. static int is_shadow_present_pte(u64 pte)
  181. {
  182. return pte != shadow_trap_nonpresent_pte
  183. && pte != shadow_notrap_nonpresent_pte;
  184. }
  185. static int is_large_pte(u64 pte)
  186. {
  187. return pte & PT_PAGE_SIZE_MASK;
  188. }
  189. static int is_writeble_pte(unsigned long pte)
  190. {
  191. return pte & PT_WRITABLE_MASK;
  192. }
  193. static int is_dirty_pte(unsigned long pte)
  194. {
  195. return pte & shadow_dirty_mask;
  196. }
  197. static int is_rmap_pte(u64 pte)
  198. {
  199. return is_shadow_present_pte(pte);
  200. }
  201. static pfn_t spte_to_pfn(u64 pte)
  202. {
  203. return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
  204. }
  205. static gfn_t pse36_gfn_delta(u32 gpte)
  206. {
  207. int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
  208. return (gpte & PT32_DIR_PSE36_MASK) << shift;
  209. }
  210. static void set_shadow_pte(u64 *sptep, u64 spte)
  211. {
  212. #ifdef CONFIG_X86_64
  213. set_64bit((unsigned long *)sptep, spte);
  214. #else
  215. set_64bit((unsigned long long *)sptep, spte);
  216. #endif
  217. }
  218. static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
  219. struct kmem_cache *base_cache, int min)
  220. {
  221. void *obj;
  222. if (cache->nobjs >= min)
  223. return 0;
  224. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  225. obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
  226. if (!obj)
  227. return -ENOMEM;
  228. cache->objects[cache->nobjs++] = obj;
  229. }
  230. return 0;
  231. }
  232. static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
  233. {
  234. while (mc->nobjs)
  235. kfree(mc->objects[--mc->nobjs]);
  236. }
  237. static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
  238. int min)
  239. {
  240. struct page *page;
  241. if (cache->nobjs >= min)
  242. return 0;
  243. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  244. page = alloc_page(GFP_KERNEL);
  245. if (!page)
  246. return -ENOMEM;
  247. set_page_private(page, 0);
  248. cache->objects[cache->nobjs++] = page_address(page);
  249. }
  250. return 0;
  251. }
  252. static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
  253. {
  254. while (mc->nobjs)
  255. free_page((unsigned long)mc->objects[--mc->nobjs]);
  256. }
  257. static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
  258. {
  259. int r;
  260. r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
  261. pte_chain_cache, 4);
  262. if (r)
  263. goto out;
  264. r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
  265. rmap_desc_cache, 4);
  266. if (r)
  267. goto out;
  268. r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
  269. if (r)
  270. goto out;
  271. r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
  272. mmu_page_header_cache, 4);
  273. out:
  274. return r;
  275. }
  276. static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
  277. {
  278. mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
  279. mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
  280. mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
  281. mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
  282. }
  283. static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
  284. size_t size)
  285. {
  286. void *p;
  287. BUG_ON(!mc->nobjs);
  288. p = mc->objects[--mc->nobjs];
  289. memset(p, 0, size);
  290. return p;
  291. }
  292. static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
  293. {
  294. return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
  295. sizeof(struct kvm_pte_chain));
  296. }
  297. static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
  298. {
  299. kfree(pc);
  300. }
  301. static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
  302. {
  303. return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
  304. sizeof(struct kvm_rmap_desc));
  305. }
  306. static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
  307. {
  308. kfree(rd);
  309. }
  310. /*
  311. * Return the pointer to the largepage write count for a given
  312. * gfn, handling slots that are not large page aligned.
  313. */
  314. static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot)
  315. {
  316. unsigned long idx;
  317. idx = (gfn / KVM_PAGES_PER_HPAGE) -
  318. (slot->base_gfn / KVM_PAGES_PER_HPAGE);
  319. return &slot->lpage_info[idx].write_count;
  320. }
  321. static void account_shadowed(struct kvm *kvm, gfn_t gfn)
  322. {
  323. int *write_count;
  324. gfn = unalias_gfn(kvm, gfn);
  325. write_count = slot_largepage_idx(gfn,
  326. gfn_to_memslot_unaliased(kvm, gfn));
  327. *write_count += 1;
  328. }
  329. static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
  330. {
  331. int *write_count;
  332. gfn = unalias_gfn(kvm, gfn);
  333. write_count = slot_largepage_idx(gfn,
  334. gfn_to_memslot_unaliased(kvm, gfn));
  335. *write_count -= 1;
  336. WARN_ON(*write_count < 0);
  337. }
  338. static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn)
  339. {
  340. struct kvm_memory_slot *slot;
  341. int *largepage_idx;
  342. gfn = unalias_gfn(kvm, gfn);
  343. slot = gfn_to_memslot_unaliased(kvm, gfn);
  344. if (slot) {
  345. largepage_idx = slot_largepage_idx(gfn, slot);
  346. return *largepage_idx;
  347. }
  348. return 1;
  349. }
  350. static int host_largepage_backed(struct kvm *kvm, gfn_t gfn)
  351. {
  352. struct vm_area_struct *vma;
  353. unsigned long addr;
  354. int ret = 0;
  355. addr = gfn_to_hva(kvm, gfn);
  356. if (kvm_is_error_hva(addr))
  357. return ret;
  358. down_read(&current->mm->mmap_sem);
  359. vma = find_vma(current->mm, addr);
  360. if (vma && is_vm_hugetlb_page(vma))
  361. ret = 1;
  362. up_read(&current->mm->mmap_sem);
  363. return ret;
  364. }
  365. static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn)
  366. {
  367. struct kvm_memory_slot *slot;
  368. if (has_wrprotected_page(vcpu->kvm, large_gfn))
  369. return 0;
  370. if (!host_largepage_backed(vcpu->kvm, large_gfn))
  371. return 0;
  372. slot = gfn_to_memslot(vcpu->kvm, large_gfn);
  373. if (slot && slot->dirty_bitmap)
  374. return 0;
  375. return 1;
  376. }
  377. /*
  378. * Take gfn and return the reverse mapping to it.
  379. * Note: gfn must be unaliased before this function get called
  380. */
  381. static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage)
  382. {
  383. struct kvm_memory_slot *slot;
  384. unsigned long idx;
  385. slot = gfn_to_memslot(kvm, gfn);
  386. if (!lpage)
  387. return &slot->rmap[gfn - slot->base_gfn];
  388. idx = (gfn / KVM_PAGES_PER_HPAGE) -
  389. (slot->base_gfn / KVM_PAGES_PER_HPAGE);
  390. return &slot->lpage_info[idx].rmap_pde;
  391. }
  392. /*
  393. * Reverse mapping data structures:
  394. *
  395. * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
  396. * that points to page_address(page).
  397. *
  398. * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
  399. * containing more mappings.
  400. */
  401. static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage)
  402. {
  403. struct kvm_mmu_page *sp;
  404. struct kvm_rmap_desc *desc;
  405. unsigned long *rmapp;
  406. int i;
  407. if (!is_rmap_pte(*spte))
  408. return;
  409. gfn = unalias_gfn(vcpu->kvm, gfn);
  410. sp = page_header(__pa(spte));
  411. sp->gfns[spte - sp->spt] = gfn;
  412. rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
  413. if (!*rmapp) {
  414. rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
  415. *rmapp = (unsigned long)spte;
  416. } else if (!(*rmapp & 1)) {
  417. rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
  418. desc = mmu_alloc_rmap_desc(vcpu);
  419. desc->shadow_ptes[0] = (u64 *)*rmapp;
  420. desc->shadow_ptes[1] = spte;
  421. *rmapp = (unsigned long)desc | 1;
  422. } else {
  423. rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
  424. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  425. while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
  426. desc = desc->more;
  427. if (desc->shadow_ptes[RMAP_EXT-1]) {
  428. desc->more = mmu_alloc_rmap_desc(vcpu);
  429. desc = desc->more;
  430. }
  431. for (i = 0; desc->shadow_ptes[i]; ++i)
  432. ;
  433. desc->shadow_ptes[i] = spte;
  434. }
  435. }
  436. static void rmap_desc_remove_entry(unsigned long *rmapp,
  437. struct kvm_rmap_desc *desc,
  438. int i,
  439. struct kvm_rmap_desc *prev_desc)
  440. {
  441. int j;
  442. for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
  443. ;
  444. desc->shadow_ptes[i] = desc->shadow_ptes[j];
  445. desc->shadow_ptes[j] = NULL;
  446. if (j != 0)
  447. return;
  448. if (!prev_desc && !desc->more)
  449. *rmapp = (unsigned long)desc->shadow_ptes[0];
  450. else
  451. if (prev_desc)
  452. prev_desc->more = desc->more;
  453. else
  454. *rmapp = (unsigned long)desc->more | 1;
  455. mmu_free_rmap_desc(desc);
  456. }
  457. static void rmap_remove(struct kvm *kvm, u64 *spte)
  458. {
  459. struct kvm_rmap_desc *desc;
  460. struct kvm_rmap_desc *prev_desc;
  461. struct kvm_mmu_page *sp;
  462. pfn_t pfn;
  463. unsigned long *rmapp;
  464. int i;
  465. if (!is_rmap_pte(*spte))
  466. return;
  467. sp = page_header(__pa(spte));
  468. pfn = spte_to_pfn(*spte);
  469. if (*spte & shadow_accessed_mask)
  470. kvm_set_pfn_accessed(pfn);
  471. if (is_writeble_pte(*spte))
  472. kvm_release_pfn_dirty(pfn);
  473. else
  474. kvm_release_pfn_clean(pfn);
  475. rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte));
  476. if (!*rmapp) {
  477. printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
  478. BUG();
  479. } else if (!(*rmapp & 1)) {
  480. rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
  481. if ((u64 *)*rmapp != spte) {
  482. printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
  483. spte, *spte);
  484. BUG();
  485. }
  486. *rmapp = 0;
  487. } else {
  488. rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
  489. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  490. prev_desc = NULL;
  491. while (desc) {
  492. for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
  493. if (desc->shadow_ptes[i] == spte) {
  494. rmap_desc_remove_entry(rmapp,
  495. desc, i,
  496. prev_desc);
  497. return;
  498. }
  499. prev_desc = desc;
  500. desc = desc->more;
  501. }
  502. BUG();
  503. }
  504. }
  505. static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
  506. {
  507. struct kvm_rmap_desc *desc;
  508. struct kvm_rmap_desc *prev_desc;
  509. u64 *prev_spte;
  510. int i;
  511. if (!*rmapp)
  512. return NULL;
  513. else if (!(*rmapp & 1)) {
  514. if (!spte)
  515. return (u64 *)*rmapp;
  516. return NULL;
  517. }
  518. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  519. prev_desc = NULL;
  520. prev_spte = NULL;
  521. while (desc) {
  522. for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
  523. if (prev_spte == spte)
  524. return desc->shadow_ptes[i];
  525. prev_spte = desc->shadow_ptes[i];
  526. }
  527. desc = desc->more;
  528. }
  529. return NULL;
  530. }
  531. static int rmap_write_protect(struct kvm *kvm, u64 gfn)
  532. {
  533. unsigned long *rmapp;
  534. u64 *spte;
  535. int write_protected = 0;
  536. gfn = unalias_gfn(kvm, gfn);
  537. rmapp = gfn_to_rmap(kvm, gfn, 0);
  538. spte = rmap_next(kvm, rmapp, NULL);
  539. while (spte) {
  540. BUG_ON(!spte);
  541. BUG_ON(!(*spte & PT_PRESENT_MASK));
  542. rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
  543. if (is_writeble_pte(*spte)) {
  544. set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
  545. write_protected = 1;
  546. }
  547. spte = rmap_next(kvm, rmapp, spte);
  548. }
  549. if (write_protected) {
  550. pfn_t pfn;
  551. spte = rmap_next(kvm, rmapp, NULL);
  552. pfn = spte_to_pfn(*spte);
  553. kvm_set_pfn_dirty(pfn);
  554. }
  555. /* check for huge page mappings */
  556. rmapp = gfn_to_rmap(kvm, gfn, 1);
  557. spte = rmap_next(kvm, rmapp, NULL);
  558. while (spte) {
  559. BUG_ON(!spte);
  560. BUG_ON(!(*spte & PT_PRESENT_MASK));
  561. BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
  562. pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
  563. if (is_writeble_pte(*spte)) {
  564. rmap_remove(kvm, spte);
  565. --kvm->stat.lpages;
  566. set_shadow_pte(spte, shadow_trap_nonpresent_pte);
  567. spte = NULL;
  568. write_protected = 1;
  569. }
  570. spte = rmap_next(kvm, rmapp, spte);
  571. }
  572. return write_protected;
  573. }
  574. static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp)
  575. {
  576. u64 *spte;
  577. int need_tlb_flush = 0;
  578. while ((spte = rmap_next(kvm, rmapp, NULL))) {
  579. BUG_ON(!(*spte & PT_PRESENT_MASK));
  580. rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
  581. rmap_remove(kvm, spte);
  582. set_shadow_pte(spte, shadow_trap_nonpresent_pte);
  583. need_tlb_flush = 1;
  584. }
  585. return need_tlb_flush;
  586. }
  587. static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
  588. int (*handler)(struct kvm *kvm, unsigned long *rmapp))
  589. {
  590. int i;
  591. int retval = 0;
  592. /*
  593. * If mmap_sem isn't taken, we can look the memslots with only
  594. * the mmu_lock by skipping over the slots with userspace_addr == 0.
  595. */
  596. for (i = 0; i < kvm->nmemslots; i++) {
  597. struct kvm_memory_slot *memslot = &kvm->memslots[i];
  598. unsigned long start = memslot->userspace_addr;
  599. unsigned long end;
  600. /* mmu_lock protects userspace_addr */
  601. if (!start)
  602. continue;
  603. end = start + (memslot->npages << PAGE_SHIFT);
  604. if (hva >= start && hva < end) {
  605. gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
  606. retval |= handler(kvm, &memslot->rmap[gfn_offset]);
  607. retval |= handler(kvm,
  608. &memslot->lpage_info[
  609. gfn_offset /
  610. KVM_PAGES_PER_HPAGE].rmap_pde);
  611. }
  612. }
  613. return retval;
  614. }
  615. int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
  616. {
  617. return kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
  618. }
  619. static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp)
  620. {
  621. u64 *spte;
  622. int young = 0;
  623. /* always return old for EPT */
  624. if (!shadow_accessed_mask)
  625. return 0;
  626. spte = rmap_next(kvm, rmapp, NULL);
  627. while (spte) {
  628. int _young;
  629. u64 _spte = *spte;
  630. BUG_ON(!(_spte & PT_PRESENT_MASK));
  631. _young = _spte & PT_ACCESSED_MASK;
  632. if (_young) {
  633. young = 1;
  634. clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
  635. }
  636. spte = rmap_next(kvm, rmapp, spte);
  637. }
  638. return young;
  639. }
  640. int kvm_age_hva(struct kvm *kvm, unsigned long hva)
  641. {
  642. return kvm_handle_hva(kvm, hva, kvm_age_rmapp);
  643. }
  644. #ifdef MMU_DEBUG
  645. static int is_empty_shadow_page(u64 *spt)
  646. {
  647. u64 *pos;
  648. u64 *end;
  649. for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
  650. if (is_shadow_present_pte(*pos)) {
  651. printk(KERN_ERR "%s: %p %llx\n", __func__,
  652. pos, *pos);
  653. return 0;
  654. }
  655. return 1;
  656. }
  657. #endif
  658. static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  659. {
  660. ASSERT(is_empty_shadow_page(sp->spt));
  661. list_del(&sp->link);
  662. __free_page(virt_to_page(sp->spt));
  663. __free_page(virt_to_page(sp->gfns));
  664. kfree(sp);
  665. ++kvm->arch.n_free_mmu_pages;
  666. }
  667. static unsigned kvm_page_table_hashfn(gfn_t gfn)
  668. {
  669. return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
  670. }
  671. static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
  672. u64 *parent_pte)
  673. {
  674. struct kvm_mmu_page *sp;
  675. sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
  676. sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
  677. sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
  678. set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
  679. list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
  680. INIT_LIST_HEAD(&sp->oos_link);
  681. ASSERT(is_empty_shadow_page(sp->spt));
  682. bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
  683. sp->multimapped = 0;
  684. sp->parent_pte = parent_pte;
  685. --vcpu->kvm->arch.n_free_mmu_pages;
  686. return sp;
  687. }
  688. static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
  689. struct kvm_mmu_page *sp, u64 *parent_pte)
  690. {
  691. struct kvm_pte_chain *pte_chain;
  692. struct hlist_node *node;
  693. int i;
  694. if (!parent_pte)
  695. return;
  696. if (!sp->multimapped) {
  697. u64 *old = sp->parent_pte;
  698. if (!old) {
  699. sp->parent_pte = parent_pte;
  700. return;
  701. }
  702. sp->multimapped = 1;
  703. pte_chain = mmu_alloc_pte_chain(vcpu);
  704. INIT_HLIST_HEAD(&sp->parent_ptes);
  705. hlist_add_head(&pte_chain->link, &sp->parent_ptes);
  706. pte_chain->parent_ptes[0] = old;
  707. }
  708. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
  709. if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
  710. continue;
  711. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
  712. if (!pte_chain->parent_ptes[i]) {
  713. pte_chain->parent_ptes[i] = parent_pte;
  714. return;
  715. }
  716. }
  717. pte_chain = mmu_alloc_pte_chain(vcpu);
  718. BUG_ON(!pte_chain);
  719. hlist_add_head(&pte_chain->link, &sp->parent_ptes);
  720. pte_chain->parent_ptes[0] = parent_pte;
  721. }
  722. static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
  723. u64 *parent_pte)
  724. {
  725. struct kvm_pte_chain *pte_chain;
  726. struct hlist_node *node;
  727. int i;
  728. if (!sp->multimapped) {
  729. BUG_ON(sp->parent_pte != parent_pte);
  730. sp->parent_pte = NULL;
  731. return;
  732. }
  733. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
  734. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  735. if (!pte_chain->parent_ptes[i])
  736. break;
  737. if (pte_chain->parent_ptes[i] != parent_pte)
  738. continue;
  739. while (i + 1 < NR_PTE_CHAIN_ENTRIES
  740. && pte_chain->parent_ptes[i + 1]) {
  741. pte_chain->parent_ptes[i]
  742. = pte_chain->parent_ptes[i + 1];
  743. ++i;
  744. }
  745. pte_chain->parent_ptes[i] = NULL;
  746. if (i == 0) {
  747. hlist_del(&pte_chain->link);
  748. mmu_free_pte_chain(pte_chain);
  749. if (hlist_empty(&sp->parent_ptes)) {
  750. sp->multimapped = 0;
  751. sp->parent_pte = NULL;
  752. }
  753. }
  754. return;
  755. }
  756. BUG();
  757. }
  758. static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
  759. mmu_parent_walk_fn fn)
  760. {
  761. struct kvm_pte_chain *pte_chain;
  762. struct hlist_node *node;
  763. struct kvm_mmu_page *parent_sp;
  764. int i;
  765. if (!sp->multimapped && sp->parent_pte) {
  766. parent_sp = page_header(__pa(sp->parent_pte));
  767. fn(vcpu, parent_sp);
  768. mmu_parent_walk(vcpu, parent_sp, fn);
  769. return;
  770. }
  771. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
  772. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  773. if (!pte_chain->parent_ptes[i])
  774. break;
  775. parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
  776. fn(vcpu, parent_sp);
  777. mmu_parent_walk(vcpu, parent_sp, fn);
  778. }
  779. }
  780. static void kvm_mmu_update_unsync_bitmap(u64 *spte)
  781. {
  782. unsigned int index;
  783. struct kvm_mmu_page *sp = page_header(__pa(spte));
  784. index = spte - sp->spt;
  785. if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
  786. sp->unsync_children++;
  787. WARN_ON(!sp->unsync_children);
  788. }
  789. static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
  790. {
  791. struct kvm_pte_chain *pte_chain;
  792. struct hlist_node *node;
  793. int i;
  794. if (!sp->parent_pte)
  795. return;
  796. if (!sp->multimapped) {
  797. kvm_mmu_update_unsync_bitmap(sp->parent_pte);
  798. return;
  799. }
  800. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
  801. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  802. if (!pte_chain->parent_ptes[i])
  803. break;
  804. kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
  805. }
  806. }
  807. static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
  808. {
  809. kvm_mmu_update_parents_unsync(sp);
  810. return 1;
  811. }
  812. static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
  813. struct kvm_mmu_page *sp)
  814. {
  815. mmu_parent_walk(vcpu, sp, unsync_walk_fn);
  816. kvm_mmu_update_parents_unsync(sp);
  817. }
  818. static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
  819. struct kvm_mmu_page *sp)
  820. {
  821. int i;
  822. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  823. sp->spt[i] = shadow_trap_nonpresent_pte;
  824. }
  825. static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
  826. struct kvm_mmu_page *sp)
  827. {
  828. return 1;
  829. }
  830. static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
  831. {
  832. }
  833. #define KVM_PAGE_ARRAY_NR 16
  834. struct kvm_mmu_pages {
  835. struct mmu_page_and_offset {
  836. struct kvm_mmu_page *sp;
  837. unsigned int idx;
  838. } page[KVM_PAGE_ARRAY_NR];
  839. unsigned int nr;
  840. };
  841. #define for_each_unsync_children(bitmap, idx) \
  842. for (idx = find_first_bit(bitmap, 512); \
  843. idx < 512; \
  844. idx = find_next_bit(bitmap, 512, idx+1))
  845. int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
  846. int idx)
  847. {
  848. int i;
  849. if (sp->unsync)
  850. for (i=0; i < pvec->nr; i++)
  851. if (pvec->page[i].sp == sp)
  852. return 0;
  853. pvec->page[pvec->nr].sp = sp;
  854. pvec->page[pvec->nr].idx = idx;
  855. pvec->nr++;
  856. return (pvec->nr == KVM_PAGE_ARRAY_NR);
  857. }
  858. static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
  859. struct kvm_mmu_pages *pvec)
  860. {
  861. int i, ret, nr_unsync_leaf = 0;
  862. for_each_unsync_children(sp->unsync_child_bitmap, i) {
  863. u64 ent = sp->spt[i];
  864. if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
  865. struct kvm_mmu_page *child;
  866. child = page_header(ent & PT64_BASE_ADDR_MASK);
  867. if (child->unsync_children) {
  868. if (mmu_pages_add(pvec, child, i))
  869. return -ENOSPC;
  870. ret = __mmu_unsync_walk(child, pvec);
  871. if (!ret)
  872. __clear_bit(i, sp->unsync_child_bitmap);
  873. else if (ret > 0)
  874. nr_unsync_leaf += ret;
  875. else
  876. return ret;
  877. }
  878. if (child->unsync) {
  879. nr_unsync_leaf++;
  880. if (mmu_pages_add(pvec, child, i))
  881. return -ENOSPC;
  882. }
  883. }
  884. }
  885. if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
  886. sp->unsync_children = 0;
  887. return nr_unsync_leaf;
  888. }
  889. static int mmu_unsync_walk(struct kvm_mmu_page *sp,
  890. struct kvm_mmu_pages *pvec)
  891. {
  892. if (!sp->unsync_children)
  893. return 0;
  894. mmu_pages_add(pvec, sp, 0);
  895. return __mmu_unsync_walk(sp, pvec);
  896. }
  897. static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
  898. {
  899. unsigned index;
  900. struct hlist_head *bucket;
  901. struct kvm_mmu_page *sp;
  902. struct hlist_node *node;
  903. pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
  904. index = kvm_page_table_hashfn(gfn);
  905. bucket = &kvm->arch.mmu_page_hash[index];
  906. hlist_for_each_entry(sp, node, bucket, hash_link)
  907. if (sp->gfn == gfn && !sp->role.metaphysical
  908. && !sp->role.invalid) {
  909. pgprintk("%s: found role %x\n",
  910. __func__, sp->role.word);
  911. return sp;
  912. }
  913. return NULL;
  914. }
  915. static void kvm_unlink_unsync_global(struct kvm *kvm, struct kvm_mmu_page *sp)
  916. {
  917. list_del(&sp->oos_link);
  918. --kvm->stat.mmu_unsync_global;
  919. }
  920. static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  921. {
  922. WARN_ON(!sp->unsync);
  923. sp->unsync = 0;
  924. if (sp->global)
  925. kvm_unlink_unsync_global(kvm, sp);
  926. --kvm->stat.mmu_unsync;
  927. }
  928. static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
  929. static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
  930. {
  931. if (sp->role.glevels != vcpu->arch.mmu.root_level) {
  932. kvm_mmu_zap_page(vcpu->kvm, sp);
  933. return 1;
  934. }
  935. if (rmap_write_protect(vcpu->kvm, sp->gfn))
  936. kvm_flush_remote_tlbs(vcpu->kvm);
  937. kvm_unlink_unsync_page(vcpu->kvm, sp);
  938. if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
  939. kvm_mmu_zap_page(vcpu->kvm, sp);
  940. return 1;
  941. }
  942. kvm_mmu_flush_tlb(vcpu);
  943. return 0;
  944. }
  945. struct mmu_page_path {
  946. struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
  947. unsigned int idx[PT64_ROOT_LEVEL-1];
  948. };
  949. #define for_each_sp(pvec, sp, parents, i) \
  950. for (i = mmu_pages_next(&pvec, &parents, -1), \
  951. sp = pvec.page[i].sp; \
  952. i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
  953. i = mmu_pages_next(&pvec, &parents, i))
  954. int mmu_pages_next(struct kvm_mmu_pages *pvec, struct mmu_page_path *parents,
  955. int i)
  956. {
  957. int n;
  958. for (n = i+1; n < pvec->nr; n++) {
  959. struct kvm_mmu_page *sp = pvec->page[n].sp;
  960. if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
  961. parents->idx[0] = pvec->page[n].idx;
  962. return n;
  963. }
  964. parents->parent[sp->role.level-2] = sp;
  965. parents->idx[sp->role.level-1] = pvec->page[n].idx;
  966. }
  967. return n;
  968. }
  969. void mmu_pages_clear_parents(struct mmu_page_path *parents)
  970. {
  971. struct kvm_mmu_page *sp;
  972. unsigned int level = 0;
  973. do {
  974. unsigned int idx = parents->idx[level];
  975. sp = parents->parent[level];
  976. if (!sp)
  977. return;
  978. --sp->unsync_children;
  979. WARN_ON((int)sp->unsync_children < 0);
  980. __clear_bit(idx, sp->unsync_child_bitmap);
  981. level++;
  982. } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
  983. }
  984. static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
  985. struct mmu_page_path *parents,
  986. struct kvm_mmu_pages *pvec)
  987. {
  988. parents->parent[parent->role.level-1] = NULL;
  989. pvec->nr = 0;
  990. }
  991. static void mmu_sync_children(struct kvm_vcpu *vcpu,
  992. struct kvm_mmu_page *parent)
  993. {
  994. int i;
  995. struct kvm_mmu_page *sp;
  996. struct mmu_page_path parents;
  997. struct kvm_mmu_pages pages;
  998. kvm_mmu_pages_init(parent, &parents, &pages);
  999. while (mmu_unsync_walk(parent, &pages)) {
  1000. int protected = 0;
  1001. for_each_sp(pages, sp, parents, i)
  1002. protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
  1003. if (protected)
  1004. kvm_flush_remote_tlbs(vcpu->kvm);
  1005. for_each_sp(pages, sp, parents, i) {
  1006. kvm_sync_page(vcpu, sp);
  1007. mmu_pages_clear_parents(&parents);
  1008. }
  1009. cond_resched_lock(&vcpu->kvm->mmu_lock);
  1010. kvm_mmu_pages_init(parent, &parents, &pages);
  1011. }
  1012. }
  1013. static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
  1014. gfn_t gfn,
  1015. gva_t gaddr,
  1016. unsigned level,
  1017. int metaphysical,
  1018. unsigned access,
  1019. u64 *parent_pte)
  1020. {
  1021. union kvm_mmu_page_role role;
  1022. unsigned index;
  1023. unsigned quadrant;
  1024. struct hlist_head *bucket;
  1025. struct kvm_mmu_page *sp;
  1026. struct hlist_node *node, *tmp;
  1027. role = vcpu->arch.mmu.base_role;
  1028. role.level = level;
  1029. role.metaphysical = metaphysical;
  1030. role.access = access;
  1031. if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
  1032. quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
  1033. quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
  1034. role.quadrant = quadrant;
  1035. }
  1036. pgprintk("%s: looking gfn %lx role %x\n", __func__,
  1037. gfn, role.word);
  1038. index = kvm_page_table_hashfn(gfn);
  1039. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  1040. hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
  1041. if (sp->gfn == gfn) {
  1042. if (sp->unsync)
  1043. if (kvm_sync_page(vcpu, sp))
  1044. continue;
  1045. if (sp->role.word != role.word)
  1046. continue;
  1047. mmu_page_add_parent_pte(vcpu, sp, parent_pte);
  1048. if (sp->unsync_children) {
  1049. set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
  1050. kvm_mmu_mark_parents_unsync(vcpu, sp);
  1051. }
  1052. pgprintk("%s: found\n", __func__);
  1053. return sp;
  1054. }
  1055. ++vcpu->kvm->stat.mmu_cache_miss;
  1056. sp = kvm_mmu_alloc_page(vcpu, parent_pte);
  1057. if (!sp)
  1058. return sp;
  1059. pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word);
  1060. sp->gfn = gfn;
  1061. sp->role = role;
  1062. sp->global = role.cr4_pge;
  1063. hlist_add_head(&sp->hash_link, bucket);
  1064. if (!metaphysical) {
  1065. if (rmap_write_protect(vcpu->kvm, gfn))
  1066. kvm_flush_remote_tlbs(vcpu->kvm);
  1067. account_shadowed(vcpu->kvm, gfn);
  1068. }
  1069. if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
  1070. vcpu->arch.mmu.prefetch_page(vcpu, sp);
  1071. else
  1072. nonpaging_prefetch_page(vcpu, sp);
  1073. return sp;
  1074. }
  1075. static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
  1076. struct kvm_vcpu *vcpu, u64 addr)
  1077. {
  1078. iterator->addr = addr;
  1079. iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
  1080. iterator->level = vcpu->arch.mmu.shadow_root_level;
  1081. if (iterator->level == PT32E_ROOT_LEVEL) {
  1082. iterator->shadow_addr
  1083. = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
  1084. iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
  1085. --iterator->level;
  1086. if (!iterator->shadow_addr)
  1087. iterator->level = 0;
  1088. }
  1089. }
  1090. static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
  1091. {
  1092. if (iterator->level < PT_PAGE_TABLE_LEVEL)
  1093. return false;
  1094. iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
  1095. iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
  1096. return true;
  1097. }
  1098. static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
  1099. {
  1100. iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
  1101. --iterator->level;
  1102. }
  1103. static int walk_shadow(struct kvm_shadow_walk *walker,
  1104. struct kvm_vcpu *vcpu, u64 addr)
  1105. {
  1106. struct kvm_shadow_walk_iterator iterator;
  1107. int r;
  1108. for_each_shadow_entry(vcpu, addr, iterator) {
  1109. r = walker->entry(walker, vcpu, addr,
  1110. iterator.sptep, iterator.level);
  1111. if (r)
  1112. return r;
  1113. }
  1114. return 0;
  1115. }
  1116. static void kvm_mmu_page_unlink_children(struct kvm *kvm,
  1117. struct kvm_mmu_page *sp)
  1118. {
  1119. unsigned i;
  1120. u64 *pt;
  1121. u64 ent;
  1122. pt = sp->spt;
  1123. if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
  1124. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  1125. if (is_shadow_present_pte(pt[i]))
  1126. rmap_remove(kvm, &pt[i]);
  1127. pt[i] = shadow_trap_nonpresent_pte;
  1128. }
  1129. return;
  1130. }
  1131. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  1132. ent = pt[i];
  1133. if (is_shadow_present_pte(ent)) {
  1134. if (!is_large_pte(ent)) {
  1135. ent &= PT64_BASE_ADDR_MASK;
  1136. mmu_page_remove_parent_pte(page_header(ent),
  1137. &pt[i]);
  1138. } else {
  1139. --kvm->stat.lpages;
  1140. rmap_remove(kvm, &pt[i]);
  1141. }
  1142. }
  1143. pt[i] = shadow_trap_nonpresent_pte;
  1144. }
  1145. }
  1146. static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
  1147. {
  1148. mmu_page_remove_parent_pte(sp, parent_pte);
  1149. }
  1150. static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
  1151. {
  1152. int i;
  1153. for (i = 0; i < KVM_MAX_VCPUS; ++i)
  1154. if (kvm->vcpus[i])
  1155. kvm->vcpus[i]->arch.last_pte_updated = NULL;
  1156. }
  1157. static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
  1158. {
  1159. u64 *parent_pte;
  1160. while (sp->multimapped || sp->parent_pte) {
  1161. if (!sp->multimapped)
  1162. parent_pte = sp->parent_pte;
  1163. else {
  1164. struct kvm_pte_chain *chain;
  1165. chain = container_of(sp->parent_ptes.first,
  1166. struct kvm_pte_chain, link);
  1167. parent_pte = chain->parent_ptes[0];
  1168. }
  1169. BUG_ON(!parent_pte);
  1170. kvm_mmu_put_page(sp, parent_pte);
  1171. set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
  1172. }
  1173. }
  1174. static int mmu_zap_unsync_children(struct kvm *kvm,
  1175. struct kvm_mmu_page *parent)
  1176. {
  1177. int i, zapped = 0;
  1178. struct mmu_page_path parents;
  1179. struct kvm_mmu_pages pages;
  1180. if (parent->role.level == PT_PAGE_TABLE_LEVEL)
  1181. return 0;
  1182. kvm_mmu_pages_init(parent, &parents, &pages);
  1183. while (mmu_unsync_walk(parent, &pages)) {
  1184. struct kvm_mmu_page *sp;
  1185. for_each_sp(pages, sp, parents, i) {
  1186. kvm_mmu_zap_page(kvm, sp);
  1187. mmu_pages_clear_parents(&parents);
  1188. }
  1189. zapped += pages.nr;
  1190. kvm_mmu_pages_init(parent, &parents, &pages);
  1191. }
  1192. return zapped;
  1193. }
  1194. static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  1195. {
  1196. int ret;
  1197. ++kvm->stat.mmu_shadow_zapped;
  1198. ret = mmu_zap_unsync_children(kvm, sp);
  1199. kvm_mmu_page_unlink_children(kvm, sp);
  1200. kvm_mmu_unlink_parents(kvm, sp);
  1201. kvm_flush_remote_tlbs(kvm);
  1202. if (!sp->role.invalid && !sp->role.metaphysical)
  1203. unaccount_shadowed(kvm, sp->gfn);
  1204. if (sp->unsync)
  1205. kvm_unlink_unsync_page(kvm, sp);
  1206. if (!sp->root_count) {
  1207. hlist_del(&sp->hash_link);
  1208. kvm_mmu_free_page(kvm, sp);
  1209. } else {
  1210. sp->role.invalid = 1;
  1211. list_move(&sp->link, &kvm->arch.active_mmu_pages);
  1212. kvm_reload_remote_mmus(kvm);
  1213. }
  1214. kvm_mmu_reset_last_pte_updated(kvm);
  1215. return ret;
  1216. }
  1217. /*
  1218. * Changing the number of mmu pages allocated to the vm
  1219. * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
  1220. */
  1221. void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
  1222. {
  1223. /*
  1224. * If we set the number of mmu pages to be smaller be than the
  1225. * number of actived pages , we must to free some mmu pages before we
  1226. * change the value
  1227. */
  1228. if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) >
  1229. kvm_nr_mmu_pages) {
  1230. int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages
  1231. - kvm->arch.n_free_mmu_pages;
  1232. while (n_used_mmu_pages > kvm_nr_mmu_pages) {
  1233. struct kvm_mmu_page *page;
  1234. page = container_of(kvm->arch.active_mmu_pages.prev,
  1235. struct kvm_mmu_page, link);
  1236. kvm_mmu_zap_page(kvm, page);
  1237. n_used_mmu_pages--;
  1238. }
  1239. kvm->arch.n_free_mmu_pages = 0;
  1240. }
  1241. else
  1242. kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
  1243. - kvm->arch.n_alloc_mmu_pages;
  1244. kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
  1245. }
  1246. static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
  1247. {
  1248. unsigned index;
  1249. struct hlist_head *bucket;
  1250. struct kvm_mmu_page *sp;
  1251. struct hlist_node *node, *n;
  1252. int r;
  1253. pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
  1254. r = 0;
  1255. index = kvm_page_table_hashfn(gfn);
  1256. bucket = &kvm->arch.mmu_page_hash[index];
  1257. hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
  1258. if (sp->gfn == gfn && !sp->role.metaphysical) {
  1259. pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
  1260. sp->role.word);
  1261. r = 1;
  1262. if (kvm_mmu_zap_page(kvm, sp))
  1263. n = bucket->first;
  1264. }
  1265. return r;
  1266. }
  1267. static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
  1268. {
  1269. struct kvm_mmu_page *sp;
  1270. while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
  1271. pgprintk("%s: zap %lx %x\n", __func__, gfn, sp->role.word);
  1272. kvm_mmu_zap_page(kvm, sp);
  1273. }
  1274. }
  1275. static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
  1276. {
  1277. int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
  1278. struct kvm_mmu_page *sp = page_header(__pa(pte));
  1279. __set_bit(slot, sp->slot_bitmap);
  1280. }
  1281. static void mmu_convert_notrap(struct kvm_mmu_page *sp)
  1282. {
  1283. int i;
  1284. u64 *pt = sp->spt;
  1285. if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
  1286. return;
  1287. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  1288. if (pt[i] == shadow_notrap_nonpresent_pte)
  1289. set_shadow_pte(&pt[i], shadow_trap_nonpresent_pte);
  1290. }
  1291. }
  1292. struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
  1293. {
  1294. struct page *page;
  1295. gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
  1296. if (gpa == UNMAPPED_GVA)
  1297. return NULL;
  1298. page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  1299. return page;
  1300. }
  1301. /*
  1302. * The function is based on mtrr_type_lookup() in
  1303. * arch/x86/kernel/cpu/mtrr/generic.c
  1304. */
  1305. static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
  1306. u64 start, u64 end)
  1307. {
  1308. int i;
  1309. u64 base, mask;
  1310. u8 prev_match, curr_match;
  1311. int num_var_ranges = KVM_NR_VAR_MTRR;
  1312. if (!mtrr_state->enabled)
  1313. return 0xFF;
  1314. /* Make end inclusive end, instead of exclusive */
  1315. end--;
  1316. /* Look in fixed ranges. Just return the type as per start */
  1317. if (mtrr_state->have_fixed && (start < 0x100000)) {
  1318. int idx;
  1319. if (start < 0x80000) {
  1320. idx = 0;
  1321. idx += (start >> 16);
  1322. return mtrr_state->fixed_ranges[idx];
  1323. } else if (start < 0xC0000) {
  1324. idx = 1 * 8;
  1325. idx += ((start - 0x80000) >> 14);
  1326. return mtrr_state->fixed_ranges[idx];
  1327. } else if (start < 0x1000000) {
  1328. idx = 3 * 8;
  1329. idx += ((start - 0xC0000) >> 12);
  1330. return mtrr_state->fixed_ranges[idx];
  1331. }
  1332. }
  1333. /*
  1334. * Look in variable ranges
  1335. * Look of multiple ranges matching this address and pick type
  1336. * as per MTRR precedence
  1337. */
  1338. if (!(mtrr_state->enabled & 2))
  1339. return mtrr_state->def_type;
  1340. prev_match = 0xFF;
  1341. for (i = 0; i < num_var_ranges; ++i) {
  1342. unsigned short start_state, end_state;
  1343. if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
  1344. continue;
  1345. base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
  1346. (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
  1347. mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
  1348. (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
  1349. start_state = ((start & mask) == (base & mask));
  1350. end_state = ((end & mask) == (base & mask));
  1351. if (start_state != end_state)
  1352. return 0xFE;
  1353. if ((start & mask) != (base & mask))
  1354. continue;
  1355. curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
  1356. if (prev_match == 0xFF) {
  1357. prev_match = curr_match;
  1358. continue;
  1359. }
  1360. if (prev_match == MTRR_TYPE_UNCACHABLE ||
  1361. curr_match == MTRR_TYPE_UNCACHABLE)
  1362. return MTRR_TYPE_UNCACHABLE;
  1363. if ((prev_match == MTRR_TYPE_WRBACK &&
  1364. curr_match == MTRR_TYPE_WRTHROUGH) ||
  1365. (prev_match == MTRR_TYPE_WRTHROUGH &&
  1366. curr_match == MTRR_TYPE_WRBACK)) {
  1367. prev_match = MTRR_TYPE_WRTHROUGH;
  1368. curr_match = MTRR_TYPE_WRTHROUGH;
  1369. }
  1370. if (prev_match != curr_match)
  1371. return MTRR_TYPE_UNCACHABLE;
  1372. }
  1373. if (prev_match != 0xFF)
  1374. return prev_match;
  1375. return mtrr_state->def_type;
  1376. }
  1377. static u8 get_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
  1378. {
  1379. u8 mtrr;
  1380. mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
  1381. (gfn << PAGE_SHIFT) + PAGE_SIZE);
  1382. if (mtrr == 0xfe || mtrr == 0xff)
  1383. mtrr = MTRR_TYPE_WRBACK;
  1384. return mtrr;
  1385. }
  1386. static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
  1387. {
  1388. unsigned index;
  1389. struct hlist_head *bucket;
  1390. struct kvm_mmu_page *s;
  1391. struct hlist_node *node, *n;
  1392. index = kvm_page_table_hashfn(sp->gfn);
  1393. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  1394. /* don't unsync if pagetable is shadowed with multiple roles */
  1395. hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
  1396. if (s->gfn != sp->gfn || s->role.metaphysical)
  1397. continue;
  1398. if (s->role.word != sp->role.word)
  1399. return 1;
  1400. }
  1401. ++vcpu->kvm->stat.mmu_unsync;
  1402. sp->unsync = 1;
  1403. if (sp->global) {
  1404. list_add(&sp->oos_link, &vcpu->kvm->arch.oos_global_pages);
  1405. ++vcpu->kvm->stat.mmu_unsync_global;
  1406. } else
  1407. kvm_mmu_mark_parents_unsync(vcpu, sp);
  1408. mmu_convert_notrap(sp);
  1409. return 0;
  1410. }
  1411. static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
  1412. bool can_unsync)
  1413. {
  1414. struct kvm_mmu_page *shadow;
  1415. shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
  1416. if (shadow) {
  1417. if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
  1418. return 1;
  1419. if (shadow->unsync)
  1420. return 0;
  1421. if (can_unsync && oos_shadow)
  1422. return kvm_unsync_page(vcpu, shadow);
  1423. return 1;
  1424. }
  1425. return 0;
  1426. }
  1427. static int set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
  1428. unsigned pte_access, int user_fault,
  1429. int write_fault, int dirty, int largepage,
  1430. int global, gfn_t gfn, pfn_t pfn, bool speculative,
  1431. bool can_unsync)
  1432. {
  1433. u64 spte;
  1434. int ret = 0;
  1435. u64 mt_mask = shadow_mt_mask;
  1436. struct kvm_mmu_page *sp = page_header(__pa(shadow_pte));
  1437. if (!global && sp->global) {
  1438. sp->global = 0;
  1439. if (sp->unsync) {
  1440. kvm_unlink_unsync_global(vcpu->kvm, sp);
  1441. kvm_mmu_mark_parents_unsync(vcpu, sp);
  1442. }
  1443. }
  1444. /*
  1445. * We don't set the accessed bit, since we sometimes want to see
  1446. * whether the guest actually used the pte (in order to detect
  1447. * demand paging).
  1448. */
  1449. spte = shadow_base_present_pte | shadow_dirty_mask;
  1450. if (!speculative)
  1451. spte |= shadow_accessed_mask;
  1452. if (!dirty)
  1453. pte_access &= ~ACC_WRITE_MASK;
  1454. if (pte_access & ACC_EXEC_MASK)
  1455. spte |= shadow_x_mask;
  1456. else
  1457. spte |= shadow_nx_mask;
  1458. if (pte_access & ACC_USER_MASK)
  1459. spte |= shadow_user_mask;
  1460. if (largepage)
  1461. spte |= PT_PAGE_SIZE_MASK;
  1462. if (mt_mask) {
  1463. if (!kvm_is_mmio_pfn(pfn)) {
  1464. mt_mask = get_memory_type(vcpu, gfn) <<
  1465. kvm_x86_ops->get_mt_mask_shift();
  1466. mt_mask |= VMX_EPT_IGMT_BIT;
  1467. } else
  1468. mt_mask = MTRR_TYPE_UNCACHABLE <<
  1469. kvm_x86_ops->get_mt_mask_shift();
  1470. spte |= mt_mask;
  1471. }
  1472. spte |= (u64)pfn << PAGE_SHIFT;
  1473. if ((pte_access & ACC_WRITE_MASK)
  1474. || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
  1475. if (largepage && has_wrprotected_page(vcpu->kvm, gfn)) {
  1476. ret = 1;
  1477. spte = shadow_trap_nonpresent_pte;
  1478. goto set_pte;
  1479. }
  1480. spte |= PT_WRITABLE_MASK;
  1481. /*
  1482. * Optimization: for pte sync, if spte was writable the hash
  1483. * lookup is unnecessary (and expensive). Write protection
  1484. * is responsibility of mmu_get_page / kvm_sync_page.
  1485. * Same reasoning can be applied to dirty page accounting.
  1486. */
  1487. if (!can_unsync && is_writeble_pte(*shadow_pte))
  1488. goto set_pte;
  1489. if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
  1490. pgprintk("%s: found shadow page for %lx, marking ro\n",
  1491. __func__, gfn);
  1492. ret = 1;
  1493. pte_access &= ~ACC_WRITE_MASK;
  1494. if (is_writeble_pte(spte))
  1495. spte &= ~PT_WRITABLE_MASK;
  1496. }
  1497. }
  1498. if (pte_access & ACC_WRITE_MASK)
  1499. mark_page_dirty(vcpu->kvm, gfn);
  1500. set_pte:
  1501. set_shadow_pte(shadow_pte, spte);
  1502. return ret;
  1503. }
  1504. static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
  1505. unsigned pt_access, unsigned pte_access,
  1506. int user_fault, int write_fault, int dirty,
  1507. int *ptwrite, int largepage, int global,
  1508. gfn_t gfn, pfn_t pfn, bool speculative)
  1509. {
  1510. int was_rmapped = 0;
  1511. int was_writeble = is_writeble_pte(*shadow_pte);
  1512. pgprintk("%s: spte %llx access %x write_fault %d"
  1513. " user_fault %d gfn %lx\n",
  1514. __func__, *shadow_pte, pt_access,
  1515. write_fault, user_fault, gfn);
  1516. if (is_rmap_pte(*shadow_pte)) {
  1517. /*
  1518. * If we overwrite a PTE page pointer with a 2MB PMD, unlink
  1519. * the parent of the now unreachable PTE.
  1520. */
  1521. if (largepage && !is_large_pte(*shadow_pte)) {
  1522. struct kvm_mmu_page *child;
  1523. u64 pte = *shadow_pte;
  1524. child = page_header(pte & PT64_BASE_ADDR_MASK);
  1525. mmu_page_remove_parent_pte(child, shadow_pte);
  1526. } else if (pfn != spte_to_pfn(*shadow_pte)) {
  1527. pgprintk("hfn old %lx new %lx\n",
  1528. spte_to_pfn(*shadow_pte), pfn);
  1529. rmap_remove(vcpu->kvm, shadow_pte);
  1530. } else {
  1531. if (largepage)
  1532. was_rmapped = is_large_pte(*shadow_pte);
  1533. else
  1534. was_rmapped = 1;
  1535. }
  1536. }
  1537. if (set_spte(vcpu, shadow_pte, pte_access, user_fault, write_fault,
  1538. dirty, largepage, global, gfn, pfn, speculative, true)) {
  1539. if (write_fault)
  1540. *ptwrite = 1;
  1541. kvm_x86_ops->tlb_flush(vcpu);
  1542. }
  1543. pgprintk("%s: setting spte %llx\n", __func__, *shadow_pte);
  1544. pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
  1545. is_large_pte(*shadow_pte)? "2MB" : "4kB",
  1546. is_present_pte(*shadow_pte)?"RW":"R", gfn,
  1547. *shadow_pte, shadow_pte);
  1548. if (!was_rmapped && is_large_pte(*shadow_pte))
  1549. ++vcpu->kvm->stat.lpages;
  1550. page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
  1551. if (!was_rmapped) {
  1552. rmap_add(vcpu, shadow_pte, gfn, largepage);
  1553. if (!is_rmap_pte(*shadow_pte))
  1554. kvm_release_pfn_clean(pfn);
  1555. } else {
  1556. if (was_writeble)
  1557. kvm_release_pfn_dirty(pfn);
  1558. else
  1559. kvm_release_pfn_clean(pfn);
  1560. }
  1561. if (speculative) {
  1562. vcpu->arch.last_pte_updated = shadow_pte;
  1563. vcpu->arch.last_pte_gfn = gfn;
  1564. }
  1565. }
  1566. static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
  1567. {
  1568. }
  1569. struct direct_shadow_walk {
  1570. struct kvm_shadow_walk walker;
  1571. pfn_t pfn;
  1572. int write;
  1573. int largepage;
  1574. int pt_write;
  1575. };
  1576. static int direct_map_entry(struct kvm_shadow_walk *_walk,
  1577. struct kvm_vcpu *vcpu,
  1578. u64 addr, u64 *sptep, int level)
  1579. {
  1580. struct direct_shadow_walk *walk =
  1581. container_of(_walk, struct direct_shadow_walk, walker);
  1582. struct kvm_mmu_page *sp;
  1583. gfn_t pseudo_gfn;
  1584. gfn_t gfn = addr >> PAGE_SHIFT;
  1585. if (level == PT_PAGE_TABLE_LEVEL
  1586. || (walk->largepage && level == PT_DIRECTORY_LEVEL)) {
  1587. mmu_set_spte(vcpu, sptep, ACC_ALL, ACC_ALL,
  1588. 0, walk->write, 1, &walk->pt_write,
  1589. walk->largepage, 0, gfn, walk->pfn, false);
  1590. ++vcpu->stat.pf_fixed;
  1591. return 1;
  1592. }
  1593. if (*sptep == shadow_trap_nonpresent_pte) {
  1594. pseudo_gfn = (addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
  1595. sp = kvm_mmu_get_page(vcpu, pseudo_gfn, (gva_t)addr, level - 1,
  1596. 1, ACC_ALL, sptep);
  1597. if (!sp) {
  1598. pgprintk("nonpaging_map: ENOMEM\n");
  1599. kvm_release_pfn_clean(walk->pfn);
  1600. return -ENOMEM;
  1601. }
  1602. set_shadow_pte(sptep,
  1603. __pa(sp->spt)
  1604. | PT_PRESENT_MASK | PT_WRITABLE_MASK
  1605. | shadow_user_mask | shadow_x_mask);
  1606. }
  1607. return 0;
  1608. }
  1609. static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
  1610. int largepage, gfn_t gfn, pfn_t pfn)
  1611. {
  1612. int r;
  1613. struct direct_shadow_walk walker = {
  1614. .walker = { .entry = direct_map_entry, },
  1615. .pfn = pfn,
  1616. .largepage = largepage,
  1617. .write = write,
  1618. .pt_write = 0,
  1619. };
  1620. r = walk_shadow(&walker.walker, vcpu, gfn << PAGE_SHIFT);
  1621. if (r < 0)
  1622. return r;
  1623. return walker.pt_write;
  1624. }
  1625. static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
  1626. {
  1627. int r;
  1628. int largepage = 0;
  1629. pfn_t pfn;
  1630. unsigned long mmu_seq;
  1631. if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
  1632. gfn &= ~(KVM_PAGES_PER_HPAGE-1);
  1633. largepage = 1;
  1634. }
  1635. mmu_seq = vcpu->kvm->mmu_notifier_seq;
  1636. smp_rmb();
  1637. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  1638. /* mmio */
  1639. if (is_error_pfn(pfn)) {
  1640. kvm_release_pfn_clean(pfn);
  1641. return 1;
  1642. }
  1643. spin_lock(&vcpu->kvm->mmu_lock);
  1644. if (mmu_notifier_retry(vcpu, mmu_seq))
  1645. goto out_unlock;
  1646. kvm_mmu_free_some_pages(vcpu);
  1647. r = __direct_map(vcpu, v, write, largepage, gfn, pfn);
  1648. spin_unlock(&vcpu->kvm->mmu_lock);
  1649. return r;
  1650. out_unlock:
  1651. spin_unlock(&vcpu->kvm->mmu_lock);
  1652. kvm_release_pfn_clean(pfn);
  1653. return 0;
  1654. }
  1655. static void mmu_free_roots(struct kvm_vcpu *vcpu)
  1656. {
  1657. int i;
  1658. struct kvm_mmu_page *sp;
  1659. if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
  1660. return;
  1661. spin_lock(&vcpu->kvm->mmu_lock);
  1662. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  1663. hpa_t root = vcpu->arch.mmu.root_hpa;
  1664. sp = page_header(root);
  1665. --sp->root_count;
  1666. if (!sp->root_count && sp->role.invalid)
  1667. kvm_mmu_zap_page(vcpu->kvm, sp);
  1668. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1669. spin_unlock(&vcpu->kvm->mmu_lock);
  1670. return;
  1671. }
  1672. for (i = 0; i < 4; ++i) {
  1673. hpa_t root = vcpu->arch.mmu.pae_root[i];
  1674. if (root) {
  1675. root &= PT64_BASE_ADDR_MASK;
  1676. sp = page_header(root);
  1677. --sp->root_count;
  1678. if (!sp->root_count && sp->role.invalid)
  1679. kvm_mmu_zap_page(vcpu->kvm, sp);
  1680. }
  1681. vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
  1682. }
  1683. spin_unlock(&vcpu->kvm->mmu_lock);
  1684. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1685. }
  1686. static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
  1687. {
  1688. int i;
  1689. gfn_t root_gfn;
  1690. struct kvm_mmu_page *sp;
  1691. int metaphysical = 0;
  1692. root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
  1693. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  1694. hpa_t root = vcpu->arch.mmu.root_hpa;
  1695. ASSERT(!VALID_PAGE(root));
  1696. if (tdp_enabled)
  1697. metaphysical = 1;
  1698. sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
  1699. PT64_ROOT_LEVEL, metaphysical,
  1700. ACC_ALL, NULL);
  1701. root = __pa(sp->spt);
  1702. ++sp->root_count;
  1703. vcpu->arch.mmu.root_hpa = root;
  1704. return;
  1705. }
  1706. metaphysical = !is_paging(vcpu);
  1707. if (tdp_enabled)
  1708. metaphysical = 1;
  1709. for (i = 0; i < 4; ++i) {
  1710. hpa_t root = vcpu->arch.mmu.pae_root[i];
  1711. ASSERT(!VALID_PAGE(root));
  1712. if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
  1713. if (!is_present_pte(vcpu->arch.pdptrs[i])) {
  1714. vcpu->arch.mmu.pae_root[i] = 0;
  1715. continue;
  1716. }
  1717. root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT;
  1718. } else if (vcpu->arch.mmu.root_level == 0)
  1719. root_gfn = 0;
  1720. sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
  1721. PT32_ROOT_LEVEL, metaphysical,
  1722. ACC_ALL, NULL);
  1723. root = __pa(sp->spt);
  1724. ++sp->root_count;
  1725. vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
  1726. }
  1727. vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
  1728. }
  1729. static void mmu_sync_roots(struct kvm_vcpu *vcpu)
  1730. {
  1731. int i;
  1732. struct kvm_mmu_page *sp;
  1733. if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
  1734. return;
  1735. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  1736. hpa_t root = vcpu->arch.mmu.root_hpa;
  1737. sp = page_header(root);
  1738. mmu_sync_children(vcpu, sp);
  1739. return;
  1740. }
  1741. for (i = 0; i < 4; ++i) {
  1742. hpa_t root = vcpu->arch.mmu.pae_root[i];
  1743. if (root) {
  1744. root &= PT64_BASE_ADDR_MASK;
  1745. sp = page_header(root);
  1746. mmu_sync_children(vcpu, sp);
  1747. }
  1748. }
  1749. }
  1750. static void mmu_sync_global(struct kvm_vcpu *vcpu)
  1751. {
  1752. struct kvm *kvm = vcpu->kvm;
  1753. struct kvm_mmu_page *sp, *n;
  1754. list_for_each_entry_safe(sp, n, &kvm->arch.oos_global_pages, oos_link)
  1755. kvm_sync_page(vcpu, sp);
  1756. }
  1757. void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
  1758. {
  1759. spin_lock(&vcpu->kvm->mmu_lock);
  1760. mmu_sync_roots(vcpu);
  1761. spin_unlock(&vcpu->kvm->mmu_lock);
  1762. }
  1763. void kvm_mmu_sync_global(struct kvm_vcpu *vcpu)
  1764. {
  1765. spin_lock(&vcpu->kvm->mmu_lock);
  1766. mmu_sync_global(vcpu);
  1767. spin_unlock(&vcpu->kvm->mmu_lock);
  1768. }
  1769. static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
  1770. {
  1771. return vaddr;
  1772. }
  1773. static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
  1774. u32 error_code)
  1775. {
  1776. gfn_t gfn;
  1777. int r;
  1778. pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
  1779. r = mmu_topup_memory_caches(vcpu);
  1780. if (r)
  1781. return r;
  1782. ASSERT(vcpu);
  1783. ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1784. gfn = gva >> PAGE_SHIFT;
  1785. return nonpaging_map(vcpu, gva & PAGE_MASK,
  1786. error_code & PFERR_WRITE_MASK, gfn);
  1787. }
  1788. static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
  1789. u32 error_code)
  1790. {
  1791. pfn_t pfn;
  1792. int r;
  1793. int largepage = 0;
  1794. gfn_t gfn = gpa >> PAGE_SHIFT;
  1795. unsigned long mmu_seq;
  1796. ASSERT(vcpu);
  1797. ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1798. r = mmu_topup_memory_caches(vcpu);
  1799. if (r)
  1800. return r;
  1801. if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
  1802. gfn &= ~(KVM_PAGES_PER_HPAGE-1);
  1803. largepage = 1;
  1804. }
  1805. mmu_seq = vcpu->kvm->mmu_notifier_seq;
  1806. smp_rmb();
  1807. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  1808. if (is_error_pfn(pfn)) {
  1809. kvm_release_pfn_clean(pfn);
  1810. return 1;
  1811. }
  1812. spin_lock(&vcpu->kvm->mmu_lock);
  1813. if (mmu_notifier_retry(vcpu, mmu_seq))
  1814. goto out_unlock;
  1815. kvm_mmu_free_some_pages(vcpu);
  1816. r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
  1817. largepage, gfn, pfn);
  1818. spin_unlock(&vcpu->kvm->mmu_lock);
  1819. return r;
  1820. out_unlock:
  1821. spin_unlock(&vcpu->kvm->mmu_lock);
  1822. kvm_release_pfn_clean(pfn);
  1823. return 0;
  1824. }
  1825. static void nonpaging_free(struct kvm_vcpu *vcpu)
  1826. {
  1827. mmu_free_roots(vcpu);
  1828. }
  1829. static int nonpaging_init_context(struct kvm_vcpu *vcpu)
  1830. {
  1831. struct kvm_mmu *context = &vcpu->arch.mmu;
  1832. context->new_cr3 = nonpaging_new_cr3;
  1833. context->page_fault = nonpaging_page_fault;
  1834. context->gva_to_gpa = nonpaging_gva_to_gpa;
  1835. context->free = nonpaging_free;
  1836. context->prefetch_page = nonpaging_prefetch_page;
  1837. context->sync_page = nonpaging_sync_page;
  1838. context->invlpg = nonpaging_invlpg;
  1839. context->root_level = 0;
  1840. context->shadow_root_level = PT32E_ROOT_LEVEL;
  1841. context->root_hpa = INVALID_PAGE;
  1842. return 0;
  1843. }
  1844. void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
  1845. {
  1846. ++vcpu->stat.tlb_flush;
  1847. kvm_x86_ops->tlb_flush(vcpu);
  1848. }
  1849. static void paging_new_cr3(struct kvm_vcpu *vcpu)
  1850. {
  1851. pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
  1852. mmu_free_roots(vcpu);
  1853. }
  1854. static void inject_page_fault(struct kvm_vcpu *vcpu,
  1855. u64 addr,
  1856. u32 err_code)
  1857. {
  1858. kvm_inject_page_fault(vcpu, addr, err_code);
  1859. }
  1860. static void paging_free(struct kvm_vcpu *vcpu)
  1861. {
  1862. nonpaging_free(vcpu);
  1863. }
  1864. #define PTTYPE 64
  1865. #include "paging_tmpl.h"
  1866. #undef PTTYPE
  1867. #define PTTYPE 32
  1868. #include "paging_tmpl.h"
  1869. #undef PTTYPE
  1870. static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
  1871. {
  1872. struct kvm_mmu *context = &vcpu->arch.mmu;
  1873. ASSERT(is_pae(vcpu));
  1874. context->new_cr3 = paging_new_cr3;
  1875. context->page_fault = paging64_page_fault;
  1876. context->gva_to_gpa = paging64_gva_to_gpa;
  1877. context->prefetch_page = paging64_prefetch_page;
  1878. context->sync_page = paging64_sync_page;
  1879. context->invlpg = paging64_invlpg;
  1880. context->free = paging_free;
  1881. context->root_level = level;
  1882. context->shadow_root_level = level;
  1883. context->root_hpa = INVALID_PAGE;
  1884. return 0;
  1885. }
  1886. static int paging64_init_context(struct kvm_vcpu *vcpu)
  1887. {
  1888. return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
  1889. }
  1890. static int paging32_init_context(struct kvm_vcpu *vcpu)
  1891. {
  1892. struct kvm_mmu *context = &vcpu->arch.mmu;
  1893. context->new_cr3 = paging_new_cr3;
  1894. context->page_fault = paging32_page_fault;
  1895. context->gva_to_gpa = paging32_gva_to_gpa;
  1896. context->free = paging_free;
  1897. context->prefetch_page = paging32_prefetch_page;
  1898. context->sync_page = paging32_sync_page;
  1899. context->invlpg = paging32_invlpg;
  1900. context->root_level = PT32_ROOT_LEVEL;
  1901. context->shadow_root_level = PT32E_ROOT_LEVEL;
  1902. context->root_hpa = INVALID_PAGE;
  1903. return 0;
  1904. }
  1905. static int paging32E_init_context(struct kvm_vcpu *vcpu)
  1906. {
  1907. return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
  1908. }
  1909. static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
  1910. {
  1911. struct kvm_mmu *context = &vcpu->arch.mmu;
  1912. context->new_cr3 = nonpaging_new_cr3;
  1913. context->page_fault = tdp_page_fault;
  1914. context->free = nonpaging_free;
  1915. context->prefetch_page = nonpaging_prefetch_page;
  1916. context->sync_page = nonpaging_sync_page;
  1917. context->invlpg = nonpaging_invlpg;
  1918. context->shadow_root_level = kvm_x86_ops->get_tdp_level();
  1919. context->root_hpa = INVALID_PAGE;
  1920. if (!is_paging(vcpu)) {
  1921. context->gva_to_gpa = nonpaging_gva_to_gpa;
  1922. context->root_level = 0;
  1923. } else if (is_long_mode(vcpu)) {
  1924. context->gva_to_gpa = paging64_gva_to_gpa;
  1925. context->root_level = PT64_ROOT_LEVEL;
  1926. } else if (is_pae(vcpu)) {
  1927. context->gva_to_gpa = paging64_gva_to_gpa;
  1928. context->root_level = PT32E_ROOT_LEVEL;
  1929. } else {
  1930. context->gva_to_gpa = paging32_gva_to_gpa;
  1931. context->root_level = PT32_ROOT_LEVEL;
  1932. }
  1933. return 0;
  1934. }
  1935. static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
  1936. {
  1937. int r;
  1938. ASSERT(vcpu);
  1939. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1940. if (!is_paging(vcpu))
  1941. r = nonpaging_init_context(vcpu);
  1942. else if (is_long_mode(vcpu))
  1943. r = paging64_init_context(vcpu);
  1944. else if (is_pae(vcpu))
  1945. r = paging32E_init_context(vcpu);
  1946. else
  1947. r = paging32_init_context(vcpu);
  1948. vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
  1949. return r;
  1950. }
  1951. static int init_kvm_mmu(struct kvm_vcpu *vcpu)
  1952. {
  1953. vcpu->arch.update_pte.pfn = bad_pfn;
  1954. if (tdp_enabled)
  1955. return init_kvm_tdp_mmu(vcpu);
  1956. else
  1957. return init_kvm_softmmu(vcpu);
  1958. }
  1959. static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
  1960. {
  1961. ASSERT(vcpu);
  1962. if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
  1963. vcpu->arch.mmu.free(vcpu);
  1964. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1965. }
  1966. }
  1967. int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
  1968. {
  1969. destroy_kvm_mmu(vcpu);
  1970. return init_kvm_mmu(vcpu);
  1971. }
  1972. EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
  1973. int kvm_mmu_load(struct kvm_vcpu *vcpu)
  1974. {
  1975. int r;
  1976. r = mmu_topup_memory_caches(vcpu);
  1977. if (r)
  1978. goto out;
  1979. spin_lock(&vcpu->kvm->mmu_lock);
  1980. kvm_mmu_free_some_pages(vcpu);
  1981. mmu_alloc_roots(vcpu);
  1982. mmu_sync_roots(vcpu);
  1983. spin_unlock(&vcpu->kvm->mmu_lock);
  1984. kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
  1985. kvm_mmu_flush_tlb(vcpu);
  1986. out:
  1987. return r;
  1988. }
  1989. EXPORT_SYMBOL_GPL(kvm_mmu_load);
  1990. void kvm_mmu_unload(struct kvm_vcpu *vcpu)
  1991. {
  1992. mmu_free_roots(vcpu);
  1993. }
  1994. static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
  1995. struct kvm_mmu_page *sp,
  1996. u64 *spte)
  1997. {
  1998. u64 pte;
  1999. struct kvm_mmu_page *child;
  2000. pte = *spte;
  2001. if (is_shadow_present_pte(pte)) {
  2002. if (sp->role.level == PT_PAGE_TABLE_LEVEL ||
  2003. is_large_pte(pte))
  2004. rmap_remove(vcpu->kvm, spte);
  2005. else {
  2006. child = page_header(pte & PT64_BASE_ADDR_MASK);
  2007. mmu_page_remove_parent_pte(child, spte);
  2008. }
  2009. }
  2010. set_shadow_pte(spte, shadow_trap_nonpresent_pte);
  2011. if (is_large_pte(pte))
  2012. --vcpu->kvm->stat.lpages;
  2013. }
  2014. static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
  2015. struct kvm_mmu_page *sp,
  2016. u64 *spte,
  2017. const void *new)
  2018. {
  2019. if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
  2020. if (!vcpu->arch.update_pte.largepage ||
  2021. sp->role.glevels == PT32_ROOT_LEVEL) {
  2022. ++vcpu->kvm->stat.mmu_pde_zapped;
  2023. return;
  2024. }
  2025. }
  2026. ++vcpu->kvm->stat.mmu_pte_updated;
  2027. if (sp->role.glevels == PT32_ROOT_LEVEL)
  2028. paging32_update_pte(vcpu, sp, spte, new);
  2029. else
  2030. paging64_update_pte(vcpu, sp, spte, new);
  2031. }
  2032. static bool need_remote_flush(u64 old, u64 new)
  2033. {
  2034. if (!is_shadow_present_pte(old))
  2035. return false;
  2036. if (!is_shadow_present_pte(new))
  2037. return true;
  2038. if ((old ^ new) & PT64_BASE_ADDR_MASK)
  2039. return true;
  2040. old ^= PT64_NX_MASK;
  2041. new ^= PT64_NX_MASK;
  2042. return (old & ~new & PT64_PERM_MASK) != 0;
  2043. }
  2044. static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
  2045. {
  2046. if (need_remote_flush(old, new))
  2047. kvm_flush_remote_tlbs(vcpu->kvm);
  2048. else
  2049. kvm_mmu_flush_tlb(vcpu);
  2050. }
  2051. static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
  2052. {
  2053. u64 *spte = vcpu->arch.last_pte_updated;
  2054. return !!(spte && (*spte & shadow_accessed_mask));
  2055. }
  2056. static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
  2057. const u8 *new, int bytes)
  2058. {
  2059. gfn_t gfn;
  2060. int r;
  2061. u64 gpte = 0;
  2062. pfn_t pfn;
  2063. vcpu->arch.update_pte.largepage = 0;
  2064. if (bytes != 4 && bytes != 8)
  2065. return;
  2066. /*
  2067. * Assume that the pte write on a page table of the same type
  2068. * as the current vcpu paging mode. This is nearly always true
  2069. * (might be false while changing modes). Note it is verified later
  2070. * by update_pte().
  2071. */
  2072. if (is_pae(vcpu)) {
  2073. /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
  2074. if ((bytes == 4) && (gpa % 4 == 0)) {
  2075. r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
  2076. if (r)
  2077. return;
  2078. memcpy((void *)&gpte + (gpa % 8), new, 4);
  2079. } else if ((bytes == 8) && (gpa % 8 == 0)) {
  2080. memcpy((void *)&gpte, new, 8);
  2081. }
  2082. } else {
  2083. if ((bytes == 4) && (gpa % 4 == 0))
  2084. memcpy((void *)&gpte, new, 4);
  2085. }
  2086. if (!is_present_pte(gpte))
  2087. return;
  2088. gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
  2089. if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) {
  2090. gfn &= ~(KVM_PAGES_PER_HPAGE-1);
  2091. vcpu->arch.update_pte.largepage = 1;
  2092. }
  2093. vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
  2094. smp_rmb();
  2095. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  2096. if (is_error_pfn(pfn)) {
  2097. kvm_release_pfn_clean(pfn);
  2098. return;
  2099. }
  2100. vcpu->arch.update_pte.gfn = gfn;
  2101. vcpu->arch.update_pte.pfn = pfn;
  2102. }
  2103. static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
  2104. {
  2105. u64 *spte = vcpu->arch.last_pte_updated;
  2106. if (spte
  2107. && vcpu->arch.last_pte_gfn == gfn
  2108. && shadow_accessed_mask
  2109. && !(*spte & shadow_accessed_mask)
  2110. && is_shadow_present_pte(*spte))
  2111. set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
  2112. }
  2113. void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
  2114. const u8 *new, int bytes,
  2115. bool guest_initiated)
  2116. {
  2117. gfn_t gfn = gpa >> PAGE_SHIFT;
  2118. struct kvm_mmu_page *sp;
  2119. struct hlist_node *node, *n;
  2120. struct hlist_head *bucket;
  2121. unsigned index;
  2122. u64 entry, gentry;
  2123. u64 *spte;
  2124. unsigned offset = offset_in_page(gpa);
  2125. unsigned pte_size;
  2126. unsigned page_offset;
  2127. unsigned misaligned;
  2128. unsigned quadrant;
  2129. int level;
  2130. int flooded = 0;
  2131. int npte;
  2132. int r;
  2133. pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
  2134. mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
  2135. spin_lock(&vcpu->kvm->mmu_lock);
  2136. kvm_mmu_access_page(vcpu, gfn);
  2137. kvm_mmu_free_some_pages(vcpu);
  2138. ++vcpu->kvm->stat.mmu_pte_write;
  2139. kvm_mmu_audit(vcpu, "pre pte write");
  2140. if (guest_initiated) {
  2141. if (gfn == vcpu->arch.last_pt_write_gfn
  2142. && !last_updated_pte_accessed(vcpu)) {
  2143. ++vcpu->arch.last_pt_write_count;
  2144. if (vcpu->arch.last_pt_write_count >= 3)
  2145. flooded = 1;
  2146. } else {
  2147. vcpu->arch.last_pt_write_gfn = gfn;
  2148. vcpu->arch.last_pt_write_count = 1;
  2149. vcpu->arch.last_pte_updated = NULL;
  2150. }
  2151. }
  2152. index = kvm_page_table_hashfn(gfn);
  2153. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  2154. hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
  2155. if (sp->gfn != gfn || sp->role.metaphysical || sp->role.invalid)
  2156. continue;
  2157. pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
  2158. misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
  2159. misaligned |= bytes < 4;
  2160. if (misaligned || flooded) {
  2161. /*
  2162. * Misaligned accesses are too much trouble to fix
  2163. * up; also, they usually indicate a page is not used
  2164. * as a page table.
  2165. *
  2166. * If we're seeing too many writes to a page,
  2167. * it may no longer be a page table, or we may be
  2168. * forking, in which case it is better to unmap the
  2169. * page.
  2170. */
  2171. pgprintk("misaligned: gpa %llx bytes %d role %x\n",
  2172. gpa, bytes, sp->role.word);
  2173. if (kvm_mmu_zap_page(vcpu->kvm, sp))
  2174. n = bucket->first;
  2175. ++vcpu->kvm->stat.mmu_flooded;
  2176. continue;
  2177. }
  2178. page_offset = offset;
  2179. level = sp->role.level;
  2180. npte = 1;
  2181. if (sp->role.glevels == PT32_ROOT_LEVEL) {
  2182. page_offset <<= 1; /* 32->64 */
  2183. /*
  2184. * A 32-bit pde maps 4MB while the shadow pdes map
  2185. * only 2MB. So we need to double the offset again
  2186. * and zap two pdes instead of one.
  2187. */
  2188. if (level == PT32_ROOT_LEVEL) {
  2189. page_offset &= ~7; /* kill rounding error */
  2190. page_offset <<= 1;
  2191. npte = 2;
  2192. }
  2193. quadrant = page_offset >> PAGE_SHIFT;
  2194. page_offset &= ~PAGE_MASK;
  2195. if (quadrant != sp->role.quadrant)
  2196. continue;
  2197. }
  2198. spte = &sp->spt[page_offset / sizeof(*spte)];
  2199. if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
  2200. gentry = 0;
  2201. r = kvm_read_guest_atomic(vcpu->kvm,
  2202. gpa & ~(u64)(pte_size - 1),
  2203. &gentry, pte_size);
  2204. new = (const void *)&gentry;
  2205. if (r < 0)
  2206. new = NULL;
  2207. }
  2208. while (npte--) {
  2209. entry = *spte;
  2210. mmu_pte_write_zap_pte(vcpu, sp, spte);
  2211. if (new)
  2212. mmu_pte_write_new_pte(vcpu, sp, spte, new);
  2213. mmu_pte_write_flush_tlb(vcpu, entry, *spte);
  2214. ++spte;
  2215. }
  2216. }
  2217. kvm_mmu_audit(vcpu, "post pte write");
  2218. spin_unlock(&vcpu->kvm->mmu_lock);
  2219. if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
  2220. kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
  2221. vcpu->arch.update_pte.pfn = bad_pfn;
  2222. }
  2223. }
  2224. int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
  2225. {
  2226. gpa_t gpa;
  2227. int r;
  2228. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
  2229. spin_lock(&vcpu->kvm->mmu_lock);
  2230. r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  2231. spin_unlock(&vcpu->kvm->mmu_lock);
  2232. return r;
  2233. }
  2234. EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
  2235. void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
  2236. {
  2237. while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
  2238. struct kvm_mmu_page *sp;
  2239. sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
  2240. struct kvm_mmu_page, link);
  2241. kvm_mmu_zap_page(vcpu->kvm, sp);
  2242. ++vcpu->kvm->stat.mmu_recycled;
  2243. }
  2244. }
  2245. int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
  2246. {
  2247. int r;
  2248. enum emulation_result er;
  2249. r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
  2250. if (r < 0)
  2251. goto out;
  2252. if (!r) {
  2253. r = 1;
  2254. goto out;
  2255. }
  2256. r = mmu_topup_memory_caches(vcpu);
  2257. if (r)
  2258. goto out;
  2259. er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
  2260. switch (er) {
  2261. case EMULATE_DONE:
  2262. return 1;
  2263. case EMULATE_DO_MMIO:
  2264. ++vcpu->stat.mmio_exits;
  2265. return 0;
  2266. case EMULATE_FAIL:
  2267. kvm_report_emulation_failure(vcpu, "pagetable");
  2268. return 1;
  2269. default:
  2270. BUG();
  2271. }
  2272. out:
  2273. return r;
  2274. }
  2275. EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
  2276. void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
  2277. {
  2278. vcpu->arch.mmu.invlpg(vcpu, gva);
  2279. kvm_mmu_flush_tlb(vcpu);
  2280. ++vcpu->stat.invlpg;
  2281. }
  2282. EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
  2283. void kvm_enable_tdp(void)
  2284. {
  2285. tdp_enabled = true;
  2286. }
  2287. EXPORT_SYMBOL_GPL(kvm_enable_tdp);
  2288. void kvm_disable_tdp(void)
  2289. {
  2290. tdp_enabled = false;
  2291. }
  2292. EXPORT_SYMBOL_GPL(kvm_disable_tdp);
  2293. static void free_mmu_pages(struct kvm_vcpu *vcpu)
  2294. {
  2295. struct kvm_mmu_page *sp;
  2296. while (!list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
  2297. sp = container_of(vcpu->kvm->arch.active_mmu_pages.next,
  2298. struct kvm_mmu_page, link);
  2299. kvm_mmu_zap_page(vcpu->kvm, sp);
  2300. cond_resched();
  2301. }
  2302. free_page((unsigned long)vcpu->arch.mmu.pae_root);
  2303. }
  2304. static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
  2305. {
  2306. struct page *page;
  2307. int i;
  2308. ASSERT(vcpu);
  2309. if (vcpu->kvm->arch.n_requested_mmu_pages)
  2310. vcpu->kvm->arch.n_free_mmu_pages =
  2311. vcpu->kvm->arch.n_requested_mmu_pages;
  2312. else
  2313. vcpu->kvm->arch.n_free_mmu_pages =
  2314. vcpu->kvm->arch.n_alloc_mmu_pages;
  2315. /*
  2316. * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
  2317. * Therefore we need to allocate shadow page tables in the first
  2318. * 4GB of memory, which happens to fit the DMA32 zone.
  2319. */
  2320. page = alloc_page(GFP_KERNEL | __GFP_DMA32);
  2321. if (!page)
  2322. goto error_1;
  2323. vcpu->arch.mmu.pae_root = page_address(page);
  2324. for (i = 0; i < 4; ++i)
  2325. vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
  2326. return 0;
  2327. error_1:
  2328. free_mmu_pages(vcpu);
  2329. return -ENOMEM;
  2330. }
  2331. int kvm_mmu_create(struct kvm_vcpu *vcpu)
  2332. {
  2333. ASSERT(vcpu);
  2334. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  2335. return alloc_mmu_pages(vcpu);
  2336. }
  2337. int kvm_mmu_setup(struct kvm_vcpu *vcpu)
  2338. {
  2339. ASSERT(vcpu);
  2340. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  2341. return init_kvm_mmu(vcpu);
  2342. }
  2343. void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
  2344. {
  2345. ASSERT(vcpu);
  2346. destroy_kvm_mmu(vcpu);
  2347. free_mmu_pages(vcpu);
  2348. mmu_free_memory_caches(vcpu);
  2349. }
  2350. void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
  2351. {
  2352. struct kvm_mmu_page *sp;
  2353. spin_lock(&kvm->mmu_lock);
  2354. list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
  2355. int i;
  2356. u64 *pt;
  2357. if (!test_bit(slot, sp->slot_bitmap))
  2358. continue;
  2359. pt = sp->spt;
  2360. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  2361. /* avoid RMW */
  2362. if (pt[i] & PT_WRITABLE_MASK)
  2363. pt[i] &= ~PT_WRITABLE_MASK;
  2364. }
  2365. kvm_flush_remote_tlbs(kvm);
  2366. spin_unlock(&kvm->mmu_lock);
  2367. }
  2368. void kvm_mmu_zap_all(struct kvm *kvm)
  2369. {
  2370. struct kvm_mmu_page *sp, *node;
  2371. spin_lock(&kvm->mmu_lock);
  2372. list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
  2373. if (kvm_mmu_zap_page(kvm, sp))
  2374. node = container_of(kvm->arch.active_mmu_pages.next,
  2375. struct kvm_mmu_page, link);
  2376. spin_unlock(&kvm->mmu_lock);
  2377. kvm_flush_remote_tlbs(kvm);
  2378. }
  2379. static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
  2380. {
  2381. struct kvm_mmu_page *page;
  2382. page = container_of(kvm->arch.active_mmu_pages.prev,
  2383. struct kvm_mmu_page, link);
  2384. kvm_mmu_zap_page(kvm, page);
  2385. }
  2386. static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
  2387. {
  2388. struct kvm *kvm;
  2389. struct kvm *kvm_freed = NULL;
  2390. int cache_count = 0;
  2391. spin_lock(&kvm_lock);
  2392. list_for_each_entry(kvm, &vm_list, vm_list) {
  2393. int npages;
  2394. if (!down_read_trylock(&kvm->slots_lock))
  2395. continue;
  2396. spin_lock(&kvm->mmu_lock);
  2397. npages = kvm->arch.n_alloc_mmu_pages -
  2398. kvm->arch.n_free_mmu_pages;
  2399. cache_count += npages;
  2400. if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
  2401. kvm_mmu_remove_one_alloc_mmu_page(kvm);
  2402. cache_count--;
  2403. kvm_freed = kvm;
  2404. }
  2405. nr_to_scan--;
  2406. spin_unlock(&kvm->mmu_lock);
  2407. up_read(&kvm->slots_lock);
  2408. }
  2409. if (kvm_freed)
  2410. list_move_tail(&kvm_freed->vm_list, &vm_list);
  2411. spin_unlock(&kvm_lock);
  2412. return cache_count;
  2413. }
  2414. static struct shrinker mmu_shrinker = {
  2415. .shrink = mmu_shrink,
  2416. .seeks = DEFAULT_SEEKS * 10,
  2417. };
  2418. static void mmu_destroy_caches(void)
  2419. {
  2420. if (pte_chain_cache)
  2421. kmem_cache_destroy(pte_chain_cache);
  2422. if (rmap_desc_cache)
  2423. kmem_cache_destroy(rmap_desc_cache);
  2424. if (mmu_page_header_cache)
  2425. kmem_cache_destroy(mmu_page_header_cache);
  2426. }
  2427. void kvm_mmu_module_exit(void)
  2428. {
  2429. mmu_destroy_caches();
  2430. unregister_shrinker(&mmu_shrinker);
  2431. }
  2432. int kvm_mmu_module_init(void)
  2433. {
  2434. pte_chain_cache = kmem_cache_create("kvm_pte_chain",
  2435. sizeof(struct kvm_pte_chain),
  2436. 0, 0, NULL);
  2437. if (!pte_chain_cache)
  2438. goto nomem;
  2439. rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
  2440. sizeof(struct kvm_rmap_desc),
  2441. 0, 0, NULL);
  2442. if (!rmap_desc_cache)
  2443. goto nomem;
  2444. mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
  2445. sizeof(struct kvm_mmu_page),
  2446. 0, 0, NULL);
  2447. if (!mmu_page_header_cache)
  2448. goto nomem;
  2449. register_shrinker(&mmu_shrinker);
  2450. return 0;
  2451. nomem:
  2452. mmu_destroy_caches();
  2453. return -ENOMEM;
  2454. }
  2455. /*
  2456. * Caculate mmu pages needed for kvm.
  2457. */
  2458. unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
  2459. {
  2460. int i;
  2461. unsigned int nr_mmu_pages;
  2462. unsigned int nr_pages = 0;
  2463. for (i = 0; i < kvm->nmemslots; i++)
  2464. nr_pages += kvm->memslots[i].npages;
  2465. nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
  2466. nr_mmu_pages = max(nr_mmu_pages,
  2467. (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
  2468. return nr_mmu_pages;
  2469. }
  2470. static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
  2471. unsigned len)
  2472. {
  2473. if (len > buffer->len)
  2474. return NULL;
  2475. return buffer->ptr;
  2476. }
  2477. static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
  2478. unsigned len)
  2479. {
  2480. void *ret;
  2481. ret = pv_mmu_peek_buffer(buffer, len);
  2482. if (!ret)
  2483. return ret;
  2484. buffer->ptr += len;
  2485. buffer->len -= len;
  2486. buffer->processed += len;
  2487. return ret;
  2488. }
  2489. static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
  2490. gpa_t addr, gpa_t value)
  2491. {
  2492. int bytes = 8;
  2493. int r;
  2494. if (!is_long_mode(vcpu) && !is_pae(vcpu))
  2495. bytes = 4;
  2496. r = mmu_topup_memory_caches(vcpu);
  2497. if (r)
  2498. return r;
  2499. if (!emulator_write_phys(vcpu, addr, &value, bytes))
  2500. return -EFAULT;
  2501. return 1;
  2502. }
  2503. static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
  2504. {
  2505. kvm_x86_ops->tlb_flush(vcpu);
  2506. set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
  2507. return 1;
  2508. }
  2509. static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
  2510. {
  2511. spin_lock(&vcpu->kvm->mmu_lock);
  2512. mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
  2513. spin_unlock(&vcpu->kvm->mmu_lock);
  2514. return 1;
  2515. }
  2516. static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
  2517. struct kvm_pv_mmu_op_buffer *buffer)
  2518. {
  2519. struct kvm_mmu_op_header *header;
  2520. header = pv_mmu_peek_buffer(buffer, sizeof *header);
  2521. if (!header)
  2522. return 0;
  2523. switch (header->op) {
  2524. case KVM_MMU_OP_WRITE_PTE: {
  2525. struct kvm_mmu_op_write_pte *wpte;
  2526. wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
  2527. if (!wpte)
  2528. return 0;
  2529. return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
  2530. wpte->pte_val);
  2531. }
  2532. case KVM_MMU_OP_FLUSH_TLB: {
  2533. struct kvm_mmu_op_flush_tlb *ftlb;
  2534. ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
  2535. if (!ftlb)
  2536. return 0;
  2537. return kvm_pv_mmu_flush_tlb(vcpu);
  2538. }
  2539. case KVM_MMU_OP_RELEASE_PT: {
  2540. struct kvm_mmu_op_release_pt *rpt;
  2541. rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
  2542. if (!rpt)
  2543. return 0;
  2544. return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
  2545. }
  2546. default: return 0;
  2547. }
  2548. }
  2549. int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
  2550. gpa_t addr, unsigned long *ret)
  2551. {
  2552. int r;
  2553. struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
  2554. buffer->ptr = buffer->buf;
  2555. buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
  2556. buffer->processed = 0;
  2557. r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
  2558. if (r)
  2559. goto out;
  2560. while (buffer->len) {
  2561. r = kvm_pv_mmu_op_one(vcpu, buffer);
  2562. if (r < 0)
  2563. goto out;
  2564. if (r == 0)
  2565. break;
  2566. }
  2567. r = 1;
  2568. out:
  2569. *ret = buffer->processed;
  2570. return r;
  2571. }
  2572. #ifdef AUDIT
  2573. static const char *audit_msg;
  2574. static gva_t canonicalize(gva_t gva)
  2575. {
  2576. #ifdef CONFIG_X86_64
  2577. gva = (long long)(gva << 16) >> 16;
  2578. #endif
  2579. return gva;
  2580. }
  2581. static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
  2582. gva_t va, int level)
  2583. {
  2584. u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
  2585. int i;
  2586. gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
  2587. for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
  2588. u64 ent = pt[i];
  2589. if (ent == shadow_trap_nonpresent_pte)
  2590. continue;
  2591. va = canonicalize(va);
  2592. if (level > 1) {
  2593. if (ent == shadow_notrap_nonpresent_pte)
  2594. printk(KERN_ERR "audit: (%s) nontrapping pte"
  2595. " in nonleaf level: levels %d gva %lx"
  2596. " level %d pte %llx\n", audit_msg,
  2597. vcpu->arch.mmu.root_level, va, level, ent);
  2598. audit_mappings_page(vcpu, ent, va, level - 1);
  2599. } else {
  2600. gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
  2601. hpa_t hpa = (hpa_t)gpa_to_pfn(vcpu, gpa) << PAGE_SHIFT;
  2602. if (is_shadow_present_pte(ent)
  2603. && (ent & PT64_BASE_ADDR_MASK) != hpa)
  2604. printk(KERN_ERR "xx audit error: (%s) levels %d"
  2605. " gva %lx gpa %llx hpa %llx ent %llx %d\n",
  2606. audit_msg, vcpu->arch.mmu.root_level,
  2607. va, gpa, hpa, ent,
  2608. is_shadow_present_pte(ent));
  2609. else if (ent == shadow_notrap_nonpresent_pte
  2610. && !is_error_hpa(hpa))
  2611. printk(KERN_ERR "audit: (%s) notrap shadow,"
  2612. " valid guest gva %lx\n", audit_msg, va);
  2613. kvm_release_pfn_clean(pfn);
  2614. }
  2615. }
  2616. }
  2617. static void audit_mappings(struct kvm_vcpu *vcpu)
  2618. {
  2619. unsigned i;
  2620. if (vcpu->arch.mmu.root_level == 4)
  2621. audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
  2622. else
  2623. for (i = 0; i < 4; ++i)
  2624. if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
  2625. audit_mappings_page(vcpu,
  2626. vcpu->arch.mmu.pae_root[i],
  2627. i << 30,
  2628. 2);
  2629. }
  2630. static int count_rmaps(struct kvm_vcpu *vcpu)
  2631. {
  2632. int nmaps = 0;
  2633. int i, j, k;
  2634. for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
  2635. struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
  2636. struct kvm_rmap_desc *d;
  2637. for (j = 0; j < m->npages; ++j) {
  2638. unsigned long *rmapp = &m->rmap[j];
  2639. if (!*rmapp)
  2640. continue;
  2641. if (!(*rmapp & 1)) {
  2642. ++nmaps;
  2643. continue;
  2644. }
  2645. d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  2646. while (d) {
  2647. for (k = 0; k < RMAP_EXT; ++k)
  2648. if (d->shadow_ptes[k])
  2649. ++nmaps;
  2650. else
  2651. break;
  2652. d = d->more;
  2653. }
  2654. }
  2655. }
  2656. return nmaps;
  2657. }
  2658. static int count_writable_mappings(struct kvm_vcpu *vcpu)
  2659. {
  2660. int nmaps = 0;
  2661. struct kvm_mmu_page *sp;
  2662. int i;
  2663. list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
  2664. u64 *pt = sp->spt;
  2665. if (sp->role.level != PT_PAGE_TABLE_LEVEL)
  2666. continue;
  2667. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  2668. u64 ent = pt[i];
  2669. if (!(ent & PT_PRESENT_MASK))
  2670. continue;
  2671. if (!(ent & PT_WRITABLE_MASK))
  2672. continue;
  2673. ++nmaps;
  2674. }
  2675. }
  2676. return nmaps;
  2677. }
  2678. static void audit_rmap(struct kvm_vcpu *vcpu)
  2679. {
  2680. int n_rmap = count_rmaps(vcpu);
  2681. int n_actual = count_writable_mappings(vcpu);
  2682. if (n_rmap != n_actual)
  2683. printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
  2684. __func__, audit_msg, n_rmap, n_actual);
  2685. }
  2686. static void audit_write_protection(struct kvm_vcpu *vcpu)
  2687. {
  2688. struct kvm_mmu_page *sp;
  2689. struct kvm_memory_slot *slot;
  2690. unsigned long *rmapp;
  2691. gfn_t gfn;
  2692. list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
  2693. if (sp->role.metaphysical)
  2694. continue;
  2695. gfn = unalias_gfn(vcpu->kvm, sp->gfn);
  2696. slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
  2697. rmapp = &slot->rmap[gfn - slot->base_gfn];
  2698. if (*rmapp)
  2699. printk(KERN_ERR "%s: (%s) shadow page has writable"
  2700. " mappings: gfn %lx role %x\n",
  2701. __func__, audit_msg, sp->gfn,
  2702. sp->role.word);
  2703. }
  2704. }
  2705. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
  2706. {
  2707. int olddbg = dbg;
  2708. dbg = 0;
  2709. audit_msg = msg;
  2710. audit_rmap(vcpu);
  2711. audit_write_protection(vcpu);
  2712. audit_mappings(vcpu);
  2713. dbg = olddbg;
  2714. }
  2715. #endif