mthca_main.c 31 KB

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  1. /*
  2. * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
  3. * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
  4. * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
  5. *
  6. * This software is available to you under a choice of one of two
  7. * licenses. You may choose to be licensed under the terms of the GNU
  8. * General Public License (GPL) Version 2, available from the file
  9. * COPYING in the main directory of this source tree, or the
  10. * OpenIB.org BSD license below:
  11. *
  12. * Redistribution and use in source and binary forms, with or
  13. * without modification, are permitted provided that the following
  14. * conditions are met:
  15. *
  16. * - Redistributions of source code must retain the above
  17. * copyright notice, this list of conditions and the following
  18. * disclaimer.
  19. *
  20. * - Redistributions in binary form must reproduce the above
  21. * copyright notice, this list of conditions and the following
  22. * disclaimer in the documentation and/or other materials
  23. * provided with the distribution.
  24. *
  25. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  26. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  27. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  28. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  29. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  30. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  31. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  32. * SOFTWARE.
  33. *
  34. * $Id: mthca_main.c 1396 2004-12-28 04:10:27Z roland $
  35. */
  36. #include <linux/config.h>
  37. #include <linux/version.h>
  38. #include <linux/module.h>
  39. #include <linux/init.h>
  40. #include <linux/errno.h>
  41. #include <linux/pci.h>
  42. #include <linux/interrupt.h>
  43. #include "mthca_dev.h"
  44. #include "mthca_config_reg.h"
  45. #include "mthca_cmd.h"
  46. #include "mthca_profile.h"
  47. #include "mthca_memfree.h"
  48. MODULE_AUTHOR("Roland Dreier");
  49. MODULE_DESCRIPTION("Mellanox InfiniBand HCA low-level driver");
  50. MODULE_LICENSE("Dual BSD/GPL");
  51. MODULE_VERSION(DRV_VERSION);
  52. #ifdef CONFIG_PCI_MSI
  53. static int msi_x = 0;
  54. module_param(msi_x, int, 0444);
  55. MODULE_PARM_DESC(msi_x, "attempt to use MSI-X if nonzero");
  56. static int msi = 0;
  57. module_param(msi, int, 0444);
  58. MODULE_PARM_DESC(msi, "attempt to use MSI if nonzero");
  59. #else /* CONFIG_PCI_MSI */
  60. #define msi_x (0)
  61. #define msi (0)
  62. #endif /* CONFIG_PCI_MSI */
  63. static const char mthca_version[] __devinitdata =
  64. DRV_NAME ": Mellanox InfiniBand HCA driver v"
  65. DRV_VERSION " (" DRV_RELDATE ")\n";
  66. static struct mthca_profile default_profile = {
  67. .num_qp = 1 << 16,
  68. .rdb_per_qp = 4,
  69. .num_cq = 1 << 16,
  70. .num_mcg = 1 << 13,
  71. .num_mpt = 1 << 17,
  72. .num_mtt = 1 << 20,
  73. .num_udav = 1 << 15, /* Tavor only */
  74. .fmr_reserved_mtts = 1 << 18, /* Tavor only */
  75. .uarc_size = 1 << 18, /* Arbel only */
  76. };
  77. static int __devinit mthca_tune_pci(struct mthca_dev *mdev)
  78. {
  79. int cap;
  80. u16 val;
  81. /* First try to max out Read Byte Count */
  82. cap = pci_find_capability(mdev->pdev, PCI_CAP_ID_PCIX);
  83. if (cap) {
  84. if (pci_read_config_word(mdev->pdev, cap + PCI_X_CMD, &val)) {
  85. mthca_err(mdev, "Couldn't read PCI-X command register, "
  86. "aborting.\n");
  87. return -ENODEV;
  88. }
  89. val = (val & ~PCI_X_CMD_MAX_READ) | (3 << 2);
  90. if (pci_write_config_word(mdev->pdev, cap + PCI_X_CMD, val)) {
  91. mthca_err(mdev, "Couldn't write PCI-X command register, "
  92. "aborting.\n");
  93. return -ENODEV;
  94. }
  95. } else if (!(mdev->mthca_flags & MTHCA_FLAG_PCIE))
  96. mthca_info(mdev, "No PCI-X capability, not setting RBC.\n");
  97. cap = pci_find_capability(mdev->pdev, PCI_CAP_ID_EXP);
  98. if (cap) {
  99. if (pci_read_config_word(mdev->pdev, cap + PCI_EXP_DEVCTL, &val)) {
  100. mthca_err(mdev, "Couldn't read PCI Express device control "
  101. "register, aborting.\n");
  102. return -ENODEV;
  103. }
  104. val = (val & ~PCI_EXP_DEVCTL_READRQ) | (5 << 12);
  105. if (pci_write_config_word(mdev->pdev, cap + PCI_EXP_DEVCTL, val)) {
  106. mthca_err(mdev, "Couldn't write PCI Express device control "
  107. "register, aborting.\n");
  108. return -ENODEV;
  109. }
  110. } else if (mdev->mthca_flags & MTHCA_FLAG_PCIE)
  111. mthca_info(mdev, "No PCI Express capability, "
  112. "not setting Max Read Request Size.\n");
  113. return 0;
  114. }
  115. static int __devinit mthca_dev_lim(struct mthca_dev *mdev, struct mthca_dev_lim *dev_lim)
  116. {
  117. int err;
  118. u8 status;
  119. err = mthca_QUERY_DEV_LIM(mdev, dev_lim, &status);
  120. if (err) {
  121. mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n");
  122. return err;
  123. }
  124. if (status) {
  125. mthca_err(mdev, "QUERY_DEV_LIM returned status 0x%02x, "
  126. "aborting.\n", status);
  127. return -EINVAL;
  128. }
  129. if (dev_lim->min_page_sz > PAGE_SIZE) {
  130. mthca_err(mdev, "HCA minimum page size of %d bigger than "
  131. "kernel PAGE_SIZE of %ld, aborting.\n",
  132. dev_lim->min_page_sz, PAGE_SIZE);
  133. return -ENODEV;
  134. }
  135. if (dev_lim->num_ports > MTHCA_MAX_PORTS) {
  136. mthca_err(mdev, "HCA has %d ports, but we only support %d, "
  137. "aborting.\n",
  138. dev_lim->num_ports, MTHCA_MAX_PORTS);
  139. return -ENODEV;
  140. }
  141. mdev->limits.num_ports = dev_lim->num_ports;
  142. mdev->limits.vl_cap = dev_lim->max_vl;
  143. mdev->limits.mtu_cap = dev_lim->max_mtu;
  144. mdev->limits.gid_table_len = dev_lim->max_gids;
  145. mdev->limits.pkey_table_len = dev_lim->max_pkeys;
  146. mdev->limits.local_ca_ack_delay = dev_lim->local_ca_ack_delay;
  147. mdev->limits.max_sg = dev_lim->max_sg;
  148. mdev->limits.reserved_qps = dev_lim->reserved_qps;
  149. mdev->limits.reserved_srqs = dev_lim->reserved_srqs;
  150. mdev->limits.reserved_eecs = dev_lim->reserved_eecs;
  151. mdev->limits.reserved_cqs = dev_lim->reserved_cqs;
  152. mdev->limits.reserved_eqs = dev_lim->reserved_eqs;
  153. mdev->limits.reserved_mtts = dev_lim->reserved_mtts;
  154. mdev->limits.reserved_mrws = dev_lim->reserved_mrws;
  155. mdev->limits.reserved_uars = dev_lim->reserved_uars;
  156. mdev->limits.reserved_pds = dev_lim->reserved_pds;
  157. /* IB_DEVICE_RESIZE_MAX_WR not supported by driver.
  158. May be doable since hardware supports it for SRQ.
  159. IB_DEVICE_N_NOTIFY_CQ is supported by hardware but not by driver.
  160. IB_DEVICE_SRQ_RESIZE is supported by hardware but SRQ is not
  161. supported by driver. */
  162. mdev->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
  163. IB_DEVICE_PORT_ACTIVE_EVENT |
  164. IB_DEVICE_SYS_IMAGE_GUID |
  165. IB_DEVICE_RC_RNR_NAK_GEN;
  166. if (dev_lim->flags & DEV_LIM_FLAG_BAD_PKEY_CNTR)
  167. mdev->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
  168. if (dev_lim->flags & DEV_LIM_FLAG_BAD_QKEY_CNTR)
  169. mdev->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
  170. if (dev_lim->flags & DEV_LIM_FLAG_RAW_MULTI)
  171. mdev->device_cap_flags |= IB_DEVICE_RAW_MULTI;
  172. if (dev_lim->flags & DEV_LIM_FLAG_AUTO_PATH_MIG)
  173. mdev->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
  174. if (dev_lim->flags & DEV_LIM_FLAG_UD_AV_PORT_ENFORCE)
  175. mdev->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
  176. if (dev_lim->flags & DEV_LIM_FLAG_SRQ)
  177. mdev->mthca_flags |= MTHCA_FLAG_SRQ;
  178. return 0;
  179. }
  180. static int __devinit mthca_init_tavor(struct mthca_dev *mdev)
  181. {
  182. u8 status;
  183. int err;
  184. struct mthca_dev_lim dev_lim;
  185. struct mthca_profile profile;
  186. struct mthca_init_hca_param init_hca;
  187. struct mthca_adapter adapter;
  188. err = mthca_SYS_EN(mdev, &status);
  189. if (err) {
  190. mthca_err(mdev, "SYS_EN command failed, aborting.\n");
  191. return err;
  192. }
  193. if (status) {
  194. mthca_err(mdev, "SYS_EN returned status 0x%02x, "
  195. "aborting.\n", status);
  196. return -EINVAL;
  197. }
  198. err = mthca_QUERY_FW(mdev, &status);
  199. if (err) {
  200. mthca_err(mdev, "QUERY_FW command failed, aborting.\n");
  201. goto err_disable;
  202. }
  203. if (status) {
  204. mthca_err(mdev, "QUERY_FW returned status 0x%02x, "
  205. "aborting.\n", status);
  206. err = -EINVAL;
  207. goto err_disable;
  208. }
  209. err = mthca_QUERY_DDR(mdev, &status);
  210. if (err) {
  211. mthca_err(mdev, "QUERY_DDR command failed, aborting.\n");
  212. goto err_disable;
  213. }
  214. if (status) {
  215. mthca_err(mdev, "QUERY_DDR returned status 0x%02x, "
  216. "aborting.\n", status);
  217. err = -EINVAL;
  218. goto err_disable;
  219. }
  220. err = mthca_dev_lim(mdev, &dev_lim);
  221. profile = default_profile;
  222. profile.num_uar = dev_lim.uar_size / PAGE_SIZE;
  223. profile.uarc_size = 0;
  224. err = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca);
  225. if (err < 0)
  226. goto err_disable;
  227. err = mthca_INIT_HCA(mdev, &init_hca, &status);
  228. if (err) {
  229. mthca_err(mdev, "INIT_HCA command failed, aborting.\n");
  230. goto err_disable;
  231. }
  232. if (status) {
  233. mthca_err(mdev, "INIT_HCA returned status 0x%02x, "
  234. "aborting.\n", status);
  235. err = -EINVAL;
  236. goto err_disable;
  237. }
  238. err = mthca_QUERY_ADAPTER(mdev, &adapter, &status);
  239. if (err) {
  240. mthca_err(mdev, "QUERY_ADAPTER command failed, aborting.\n");
  241. goto err_close;
  242. }
  243. if (status) {
  244. mthca_err(mdev, "QUERY_ADAPTER returned status 0x%02x, "
  245. "aborting.\n", status);
  246. err = -EINVAL;
  247. goto err_close;
  248. }
  249. mdev->eq_table.inta_pin = adapter.inta_pin;
  250. mdev->rev_id = adapter.revision_id;
  251. return 0;
  252. err_close:
  253. mthca_CLOSE_HCA(mdev, 0, &status);
  254. err_disable:
  255. mthca_SYS_DIS(mdev, &status);
  256. return err;
  257. }
  258. static int __devinit mthca_load_fw(struct mthca_dev *mdev)
  259. {
  260. u8 status;
  261. int err;
  262. /* FIXME: use HCA-attached memory for FW if present */
  263. mdev->fw.arbel.fw_icm =
  264. mthca_alloc_icm(mdev, mdev->fw.arbel.fw_pages,
  265. GFP_HIGHUSER | __GFP_NOWARN);
  266. if (!mdev->fw.arbel.fw_icm) {
  267. mthca_err(mdev, "Couldn't allocate FW area, aborting.\n");
  268. return -ENOMEM;
  269. }
  270. err = mthca_MAP_FA(mdev, mdev->fw.arbel.fw_icm, &status);
  271. if (err) {
  272. mthca_err(mdev, "MAP_FA command failed, aborting.\n");
  273. goto err_free;
  274. }
  275. if (status) {
  276. mthca_err(mdev, "MAP_FA returned status 0x%02x, aborting.\n", status);
  277. err = -EINVAL;
  278. goto err_free;
  279. }
  280. err = mthca_RUN_FW(mdev, &status);
  281. if (err) {
  282. mthca_err(mdev, "RUN_FW command failed, aborting.\n");
  283. goto err_unmap_fa;
  284. }
  285. if (status) {
  286. mthca_err(mdev, "RUN_FW returned status 0x%02x, aborting.\n", status);
  287. err = -EINVAL;
  288. goto err_unmap_fa;
  289. }
  290. return 0;
  291. err_unmap_fa:
  292. mthca_UNMAP_FA(mdev, &status);
  293. err_free:
  294. mthca_free_icm(mdev, mdev->fw.arbel.fw_icm);
  295. return err;
  296. }
  297. static int __devinit mthca_init_icm(struct mthca_dev *mdev,
  298. struct mthca_dev_lim *dev_lim,
  299. struct mthca_init_hca_param *init_hca,
  300. u64 icm_size)
  301. {
  302. u64 aux_pages;
  303. u8 status;
  304. int err;
  305. err = mthca_SET_ICM_SIZE(mdev, icm_size, &aux_pages, &status);
  306. if (err) {
  307. mthca_err(mdev, "SET_ICM_SIZE command failed, aborting.\n");
  308. return err;
  309. }
  310. if (status) {
  311. mthca_err(mdev, "SET_ICM_SIZE returned status 0x%02x, "
  312. "aborting.\n", status);
  313. return -EINVAL;
  314. }
  315. mthca_dbg(mdev, "%lld KB of HCA context requires %lld KB aux memory.\n",
  316. (unsigned long long) icm_size >> 10,
  317. (unsigned long long) aux_pages << 2);
  318. mdev->fw.arbel.aux_icm = mthca_alloc_icm(mdev, aux_pages,
  319. GFP_HIGHUSER | __GFP_NOWARN);
  320. if (!mdev->fw.arbel.aux_icm) {
  321. mthca_err(mdev, "Couldn't allocate aux memory, aborting.\n");
  322. return -ENOMEM;
  323. }
  324. err = mthca_MAP_ICM_AUX(mdev, mdev->fw.arbel.aux_icm, &status);
  325. if (err) {
  326. mthca_err(mdev, "MAP_ICM_AUX command failed, aborting.\n");
  327. goto err_free_aux;
  328. }
  329. if (status) {
  330. mthca_err(mdev, "MAP_ICM_AUX returned status 0x%02x, aborting.\n", status);
  331. err = -EINVAL;
  332. goto err_free_aux;
  333. }
  334. err = mthca_map_eq_icm(mdev, init_hca->eqc_base);
  335. if (err) {
  336. mthca_err(mdev, "Failed to map EQ context memory, aborting.\n");
  337. goto err_unmap_aux;
  338. }
  339. mdev->mr_table.mtt_table = mthca_alloc_icm_table(mdev, init_hca->mtt_base,
  340. MTHCA_MTT_SEG_SIZE,
  341. mdev->limits.num_mtt_segs,
  342. mdev->limits.reserved_mtts, 1);
  343. if (!mdev->mr_table.mtt_table) {
  344. mthca_err(mdev, "Failed to map MTT context memory, aborting.\n");
  345. err = -ENOMEM;
  346. goto err_unmap_eq;
  347. }
  348. mdev->mr_table.mpt_table = mthca_alloc_icm_table(mdev, init_hca->mpt_base,
  349. dev_lim->mpt_entry_sz,
  350. mdev->limits.num_mpts,
  351. mdev->limits.reserved_mrws, 1);
  352. if (!mdev->mr_table.mpt_table) {
  353. mthca_err(mdev, "Failed to map MPT context memory, aborting.\n");
  354. err = -ENOMEM;
  355. goto err_unmap_mtt;
  356. }
  357. mdev->qp_table.qp_table = mthca_alloc_icm_table(mdev, init_hca->qpc_base,
  358. dev_lim->qpc_entry_sz,
  359. mdev->limits.num_qps,
  360. mdev->limits.reserved_qps, 0);
  361. if (!mdev->qp_table.qp_table) {
  362. mthca_err(mdev, "Failed to map QP context memory, aborting.\n");
  363. err = -ENOMEM;
  364. goto err_unmap_mpt;
  365. }
  366. mdev->qp_table.eqp_table = mthca_alloc_icm_table(mdev, init_hca->eqpc_base,
  367. dev_lim->eqpc_entry_sz,
  368. mdev->limits.num_qps,
  369. mdev->limits.reserved_qps, 0);
  370. if (!mdev->qp_table.eqp_table) {
  371. mthca_err(mdev, "Failed to map EQP context memory, aborting.\n");
  372. err = -ENOMEM;
  373. goto err_unmap_qp;
  374. }
  375. mdev->qp_table.rdb_table = mthca_alloc_icm_table(mdev, init_hca->rdb_base,
  376. MTHCA_RDB_ENTRY_SIZE,
  377. mdev->limits.num_qps <<
  378. mdev->qp_table.rdb_shift,
  379. 0, 0);
  380. if (!mdev->qp_table.rdb_table) {
  381. mthca_err(mdev, "Failed to map RDB context memory, aborting\n");
  382. err = -ENOMEM;
  383. goto err_unmap_eqp;
  384. }
  385. mdev->cq_table.table = mthca_alloc_icm_table(mdev, init_hca->cqc_base,
  386. dev_lim->cqc_entry_sz,
  387. mdev->limits.num_cqs,
  388. mdev->limits.reserved_cqs, 0);
  389. if (!mdev->cq_table.table) {
  390. mthca_err(mdev, "Failed to map CQ context memory, aborting.\n");
  391. err = -ENOMEM;
  392. goto err_unmap_rdb;
  393. }
  394. /*
  395. * It's not strictly required, but for simplicity just map the
  396. * whole multicast group table now. The table isn't very big
  397. * and it's a lot easier than trying to track ref counts.
  398. */
  399. mdev->mcg_table.table = mthca_alloc_icm_table(mdev, init_hca->mc_base,
  400. MTHCA_MGM_ENTRY_SIZE,
  401. mdev->limits.num_mgms +
  402. mdev->limits.num_amgms,
  403. mdev->limits.num_mgms +
  404. mdev->limits.num_amgms,
  405. 0);
  406. if (!mdev->mcg_table.table) {
  407. mthca_err(mdev, "Failed to map MCG context memory, aborting.\n");
  408. err = -ENOMEM;
  409. goto err_unmap_cq;
  410. }
  411. return 0;
  412. err_unmap_cq:
  413. mthca_free_icm_table(mdev, mdev->cq_table.table);
  414. err_unmap_rdb:
  415. mthca_free_icm_table(mdev, mdev->qp_table.rdb_table);
  416. err_unmap_eqp:
  417. mthca_free_icm_table(mdev, mdev->qp_table.eqp_table);
  418. err_unmap_qp:
  419. mthca_free_icm_table(mdev, mdev->qp_table.qp_table);
  420. err_unmap_mpt:
  421. mthca_free_icm_table(mdev, mdev->mr_table.mpt_table);
  422. err_unmap_mtt:
  423. mthca_free_icm_table(mdev, mdev->mr_table.mtt_table);
  424. err_unmap_eq:
  425. mthca_unmap_eq_icm(mdev);
  426. err_unmap_aux:
  427. mthca_UNMAP_ICM_AUX(mdev, &status);
  428. err_free_aux:
  429. mthca_free_icm(mdev, mdev->fw.arbel.aux_icm);
  430. return err;
  431. }
  432. static int __devinit mthca_init_arbel(struct mthca_dev *mdev)
  433. {
  434. struct mthca_dev_lim dev_lim;
  435. struct mthca_profile profile;
  436. struct mthca_init_hca_param init_hca;
  437. struct mthca_adapter adapter;
  438. u64 icm_size;
  439. u8 status;
  440. int err;
  441. err = mthca_QUERY_FW(mdev, &status);
  442. if (err) {
  443. mthca_err(mdev, "QUERY_FW command failed, aborting.\n");
  444. return err;
  445. }
  446. if (status) {
  447. mthca_err(mdev, "QUERY_FW returned status 0x%02x, "
  448. "aborting.\n", status);
  449. return -EINVAL;
  450. }
  451. err = mthca_ENABLE_LAM(mdev, &status);
  452. if (err) {
  453. mthca_err(mdev, "ENABLE_LAM command failed, aborting.\n");
  454. return err;
  455. }
  456. if (status == MTHCA_CMD_STAT_LAM_NOT_PRE) {
  457. mthca_dbg(mdev, "No HCA-attached memory (running in MemFree mode)\n");
  458. mdev->mthca_flags |= MTHCA_FLAG_NO_LAM;
  459. } else if (status) {
  460. mthca_err(mdev, "ENABLE_LAM returned status 0x%02x, "
  461. "aborting.\n", status);
  462. return -EINVAL;
  463. }
  464. err = mthca_load_fw(mdev);
  465. if (err) {
  466. mthca_err(mdev, "Failed to start FW, aborting.\n");
  467. goto err_disable;
  468. }
  469. err = mthca_dev_lim(mdev, &dev_lim);
  470. if (err) {
  471. mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n");
  472. goto err_stop_fw;
  473. }
  474. profile = default_profile;
  475. profile.num_uar = dev_lim.uar_size / PAGE_SIZE;
  476. profile.num_udav = 0;
  477. icm_size = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca);
  478. if ((int) icm_size < 0) {
  479. err = icm_size;
  480. goto err_stop_fw;
  481. }
  482. err = mthca_init_icm(mdev, &dev_lim, &init_hca, icm_size);
  483. if (err)
  484. goto err_stop_fw;
  485. err = mthca_INIT_HCA(mdev, &init_hca, &status);
  486. if (err) {
  487. mthca_err(mdev, "INIT_HCA command failed, aborting.\n");
  488. goto err_free_icm;
  489. }
  490. if (status) {
  491. mthca_err(mdev, "INIT_HCA returned status 0x%02x, "
  492. "aborting.\n", status);
  493. err = -EINVAL;
  494. goto err_free_icm;
  495. }
  496. err = mthca_QUERY_ADAPTER(mdev, &adapter, &status);
  497. if (err) {
  498. mthca_err(mdev, "QUERY_ADAPTER command failed, aborting.\n");
  499. goto err_free_icm;
  500. }
  501. if (status) {
  502. mthca_err(mdev, "QUERY_ADAPTER returned status 0x%02x, "
  503. "aborting.\n", status);
  504. err = -EINVAL;
  505. goto err_free_icm;
  506. }
  507. mdev->eq_table.inta_pin = adapter.inta_pin;
  508. mdev->rev_id = adapter.revision_id;
  509. return 0;
  510. err_free_icm:
  511. mthca_free_icm_table(mdev, mdev->cq_table.table);
  512. mthca_free_icm_table(mdev, mdev->qp_table.rdb_table);
  513. mthca_free_icm_table(mdev, mdev->qp_table.eqp_table);
  514. mthca_free_icm_table(mdev, mdev->qp_table.qp_table);
  515. mthca_free_icm_table(mdev, mdev->mr_table.mpt_table);
  516. mthca_free_icm_table(mdev, mdev->mr_table.mtt_table);
  517. mthca_unmap_eq_icm(mdev);
  518. mthca_UNMAP_ICM_AUX(mdev, &status);
  519. mthca_free_icm(mdev, mdev->fw.arbel.aux_icm);
  520. err_stop_fw:
  521. mthca_UNMAP_FA(mdev, &status);
  522. mthca_free_icm(mdev, mdev->fw.arbel.fw_icm);
  523. err_disable:
  524. if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM))
  525. mthca_DISABLE_LAM(mdev, &status);
  526. return err;
  527. }
  528. static int __devinit mthca_init_hca(struct mthca_dev *mdev)
  529. {
  530. if (mthca_is_memfree(mdev))
  531. return mthca_init_arbel(mdev);
  532. else
  533. return mthca_init_tavor(mdev);
  534. }
  535. static int __devinit mthca_setup_hca(struct mthca_dev *dev)
  536. {
  537. int err;
  538. u8 status;
  539. MTHCA_INIT_DOORBELL_LOCK(&dev->doorbell_lock);
  540. err = mthca_init_uar_table(dev);
  541. if (err) {
  542. mthca_err(dev, "Failed to initialize "
  543. "user access region table, aborting.\n");
  544. return err;
  545. }
  546. err = mthca_uar_alloc(dev, &dev->driver_uar);
  547. if (err) {
  548. mthca_err(dev, "Failed to allocate driver access region, "
  549. "aborting.\n");
  550. goto err_uar_table_free;
  551. }
  552. dev->kar = ioremap(dev->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE);
  553. if (!dev->kar) {
  554. mthca_err(dev, "Couldn't map kernel access region, "
  555. "aborting.\n");
  556. err = -ENOMEM;
  557. goto err_uar_free;
  558. }
  559. err = mthca_init_pd_table(dev);
  560. if (err) {
  561. mthca_err(dev, "Failed to initialize "
  562. "protection domain table, aborting.\n");
  563. goto err_kar_unmap;
  564. }
  565. err = mthca_init_mr_table(dev);
  566. if (err) {
  567. mthca_err(dev, "Failed to initialize "
  568. "memory region table, aborting.\n");
  569. goto err_pd_table_free;
  570. }
  571. err = mthca_pd_alloc(dev, 1, &dev->driver_pd);
  572. if (err) {
  573. mthca_err(dev, "Failed to create driver PD, "
  574. "aborting.\n");
  575. goto err_mr_table_free;
  576. }
  577. err = mthca_init_eq_table(dev);
  578. if (err) {
  579. mthca_err(dev, "Failed to initialize "
  580. "event queue table, aborting.\n");
  581. goto err_pd_free;
  582. }
  583. err = mthca_cmd_use_events(dev);
  584. if (err) {
  585. mthca_err(dev, "Failed to switch to event-driven "
  586. "firmware commands, aborting.\n");
  587. goto err_eq_table_free;
  588. }
  589. err = mthca_NOP(dev, &status);
  590. if (err || status) {
  591. mthca_err(dev, "NOP command failed to generate interrupt (IRQ %d), aborting.\n",
  592. dev->mthca_flags & MTHCA_FLAG_MSI_X ?
  593. dev->eq_table.eq[MTHCA_EQ_CMD].msi_x_vector :
  594. dev->pdev->irq);
  595. if (dev->mthca_flags & (MTHCA_FLAG_MSI | MTHCA_FLAG_MSI_X))
  596. mthca_err(dev, "Try again with MSI/MSI-X disabled.\n");
  597. else
  598. mthca_err(dev, "BIOS or ACPI interrupt routing problem?\n");
  599. goto err_cmd_poll;
  600. }
  601. mthca_dbg(dev, "NOP command IRQ test passed\n");
  602. err = mthca_init_cq_table(dev);
  603. if (err) {
  604. mthca_err(dev, "Failed to initialize "
  605. "completion queue table, aborting.\n");
  606. goto err_cmd_poll;
  607. }
  608. err = mthca_init_qp_table(dev);
  609. if (err) {
  610. mthca_err(dev, "Failed to initialize "
  611. "queue pair table, aborting.\n");
  612. goto err_cq_table_free;
  613. }
  614. err = mthca_init_av_table(dev);
  615. if (err) {
  616. mthca_err(dev, "Failed to initialize "
  617. "address vector table, aborting.\n");
  618. goto err_qp_table_free;
  619. }
  620. err = mthca_init_mcg_table(dev);
  621. if (err) {
  622. mthca_err(dev, "Failed to initialize "
  623. "multicast group table, aborting.\n");
  624. goto err_av_table_free;
  625. }
  626. return 0;
  627. err_av_table_free:
  628. mthca_cleanup_av_table(dev);
  629. err_qp_table_free:
  630. mthca_cleanup_qp_table(dev);
  631. err_cq_table_free:
  632. mthca_cleanup_cq_table(dev);
  633. err_cmd_poll:
  634. mthca_cmd_use_polling(dev);
  635. err_eq_table_free:
  636. mthca_cleanup_eq_table(dev);
  637. err_pd_free:
  638. mthca_pd_free(dev, &dev->driver_pd);
  639. err_mr_table_free:
  640. mthca_cleanup_mr_table(dev);
  641. err_pd_table_free:
  642. mthca_cleanup_pd_table(dev);
  643. err_kar_unmap:
  644. iounmap(dev->kar);
  645. err_uar_free:
  646. mthca_uar_free(dev, &dev->driver_uar);
  647. err_uar_table_free:
  648. mthca_cleanup_uar_table(dev);
  649. return err;
  650. }
  651. static int __devinit mthca_request_regions(struct pci_dev *pdev,
  652. int ddr_hidden)
  653. {
  654. int err;
  655. /*
  656. * We can't just use pci_request_regions() because the MSI-X
  657. * table is right in the middle of the first BAR. If we did
  658. * pci_request_region and grab all of the first BAR, then
  659. * setting up MSI-X would fail, since the PCI core wants to do
  660. * request_mem_region on the MSI-X vector table.
  661. *
  662. * So just request what we need right now, and request any
  663. * other regions we need when setting up EQs.
  664. */
  665. if (!request_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE,
  666. MTHCA_HCR_SIZE, DRV_NAME))
  667. return -EBUSY;
  668. err = pci_request_region(pdev, 2, DRV_NAME);
  669. if (err)
  670. goto err_bar2_failed;
  671. if (!ddr_hidden) {
  672. err = pci_request_region(pdev, 4, DRV_NAME);
  673. if (err)
  674. goto err_bar4_failed;
  675. }
  676. return 0;
  677. err_bar4_failed:
  678. pci_release_region(pdev, 2);
  679. err_bar2_failed:
  680. release_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE,
  681. MTHCA_HCR_SIZE);
  682. return err;
  683. }
  684. static void mthca_release_regions(struct pci_dev *pdev,
  685. int ddr_hidden)
  686. {
  687. if (!ddr_hidden)
  688. pci_release_region(pdev, 4);
  689. pci_release_region(pdev, 2);
  690. release_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE,
  691. MTHCA_HCR_SIZE);
  692. }
  693. static int __devinit mthca_enable_msi_x(struct mthca_dev *mdev)
  694. {
  695. struct msix_entry entries[3];
  696. int err;
  697. entries[0].entry = 0;
  698. entries[1].entry = 1;
  699. entries[2].entry = 2;
  700. err = pci_enable_msix(mdev->pdev, entries, ARRAY_SIZE(entries));
  701. if (err) {
  702. if (err > 0)
  703. mthca_info(mdev, "Only %d MSI-X vectors available, "
  704. "not using MSI-X\n", err);
  705. return err;
  706. }
  707. mdev->eq_table.eq[MTHCA_EQ_COMP ].msi_x_vector = entries[0].vector;
  708. mdev->eq_table.eq[MTHCA_EQ_ASYNC].msi_x_vector = entries[1].vector;
  709. mdev->eq_table.eq[MTHCA_EQ_CMD ].msi_x_vector = entries[2].vector;
  710. return 0;
  711. }
  712. static void mthca_close_hca(struct mthca_dev *mdev)
  713. {
  714. u8 status;
  715. mthca_CLOSE_HCA(mdev, 0, &status);
  716. if (mthca_is_memfree(mdev)) {
  717. mthca_free_icm_table(mdev, mdev->cq_table.table);
  718. mthca_free_icm_table(mdev, mdev->qp_table.rdb_table);
  719. mthca_free_icm_table(mdev, mdev->qp_table.eqp_table);
  720. mthca_free_icm_table(mdev, mdev->qp_table.qp_table);
  721. mthca_free_icm_table(mdev, mdev->mr_table.mpt_table);
  722. mthca_free_icm_table(mdev, mdev->mr_table.mtt_table);
  723. mthca_unmap_eq_icm(mdev);
  724. mthca_UNMAP_ICM_AUX(mdev, &status);
  725. mthca_free_icm(mdev, mdev->fw.arbel.aux_icm);
  726. mthca_UNMAP_FA(mdev, &status);
  727. mthca_free_icm(mdev, mdev->fw.arbel.fw_icm);
  728. if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM))
  729. mthca_DISABLE_LAM(mdev, &status);
  730. } else
  731. mthca_SYS_DIS(mdev, &status);
  732. }
  733. /* Types of supported HCA */
  734. enum {
  735. TAVOR, /* MT23108 */
  736. ARBEL_COMPAT, /* MT25208 in Tavor compat mode */
  737. ARBEL_NATIVE, /* MT25208 with extended features */
  738. SINAI /* MT25204 */
  739. };
  740. #define MTHCA_FW_VER(major, minor, subminor) \
  741. (((u64) (major) << 32) | ((u64) (minor) << 16) | (u64) (subminor))
  742. static struct {
  743. u64 latest_fw;
  744. int is_memfree;
  745. int is_pcie;
  746. } mthca_hca_table[] = {
  747. [TAVOR] = { .latest_fw = MTHCA_FW_VER(3, 3, 3), .is_memfree = 0, .is_pcie = 0 },
  748. [ARBEL_COMPAT] = { .latest_fw = MTHCA_FW_VER(4, 7, 0), .is_memfree = 0, .is_pcie = 1 },
  749. [ARBEL_NATIVE] = { .latest_fw = MTHCA_FW_VER(5, 1, 0), .is_memfree = 1, .is_pcie = 1 },
  750. [SINAI] = { .latest_fw = MTHCA_FW_VER(1, 0, 1), .is_memfree = 1, .is_pcie = 1 }
  751. };
  752. static int __devinit mthca_init_one(struct pci_dev *pdev,
  753. const struct pci_device_id *id)
  754. {
  755. static int mthca_version_printed = 0;
  756. int ddr_hidden = 0;
  757. int err;
  758. struct mthca_dev *mdev;
  759. if (!mthca_version_printed) {
  760. printk(KERN_INFO "%s", mthca_version);
  761. ++mthca_version_printed;
  762. }
  763. printk(KERN_INFO PFX "Initializing %s (%s)\n",
  764. pci_pretty_name(pdev), pci_name(pdev));
  765. if (id->driver_data >= ARRAY_SIZE(mthca_hca_table)) {
  766. printk(KERN_ERR PFX "%s (%s) has invalid driver data %lx\n",
  767. pci_pretty_name(pdev), pci_name(pdev), id->driver_data);
  768. return -ENODEV;
  769. }
  770. err = pci_enable_device(pdev);
  771. if (err) {
  772. dev_err(&pdev->dev, "Cannot enable PCI device, "
  773. "aborting.\n");
  774. return err;
  775. }
  776. /*
  777. * Check for BARs. We expect 0: 1MB, 2: 8MB, 4: DDR (may not
  778. * be present)
  779. */
  780. if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM) ||
  781. pci_resource_len(pdev, 0) != 1 << 20) {
  782. dev_err(&pdev->dev, "Missing DCS, aborting.\n");
  783. err = -ENODEV;
  784. goto err_disable_pdev;
  785. }
  786. if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM) ||
  787. pci_resource_len(pdev, 2) != 1 << 23) {
  788. dev_err(&pdev->dev, "Missing UAR, aborting.\n");
  789. err = -ENODEV;
  790. goto err_disable_pdev;
  791. }
  792. if (!(pci_resource_flags(pdev, 4) & IORESOURCE_MEM))
  793. ddr_hidden = 1;
  794. err = mthca_request_regions(pdev, ddr_hidden);
  795. if (err) {
  796. dev_err(&pdev->dev, "Cannot obtain PCI resources, "
  797. "aborting.\n");
  798. goto err_disable_pdev;
  799. }
  800. pci_set_master(pdev);
  801. err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
  802. if (err) {
  803. dev_warn(&pdev->dev, "Warning: couldn't set 64-bit PCI DMA mask.\n");
  804. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  805. if (err) {
  806. dev_err(&pdev->dev, "Can't set PCI DMA mask, aborting.\n");
  807. goto err_free_res;
  808. }
  809. }
  810. err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
  811. if (err) {
  812. dev_warn(&pdev->dev, "Warning: couldn't set 64-bit "
  813. "consistent PCI DMA mask.\n");
  814. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  815. if (err) {
  816. dev_err(&pdev->dev, "Can't set consistent PCI DMA mask, "
  817. "aborting.\n");
  818. goto err_free_res;
  819. }
  820. }
  821. mdev = (struct mthca_dev *) ib_alloc_device(sizeof *mdev);
  822. if (!mdev) {
  823. dev_err(&pdev->dev, "Device struct alloc failed, "
  824. "aborting.\n");
  825. err = -ENOMEM;
  826. goto err_free_res;
  827. }
  828. mdev->pdev = pdev;
  829. if (ddr_hidden)
  830. mdev->mthca_flags |= MTHCA_FLAG_DDR_HIDDEN;
  831. if (mthca_hca_table[id->driver_data].is_memfree)
  832. mdev->mthca_flags |= MTHCA_FLAG_MEMFREE;
  833. if (mthca_hca_table[id->driver_data].is_pcie)
  834. mdev->mthca_flags |= MTHCA_FLAG_PCIE;
  835. /*
  836. * Now reset the HCA before we touch the PCI capabilities or
  837. * attempt a firmware command, since a boot ROM may have left
  838. * the HCA in an undefined state.
  839. */
  840. err = mthca_reset(mdev);
  841. if (err) {
  842. mthca_err(mdev, "Failed to reset HCA, aborting.\n");
  843. goto err_free_dev;
  844. }
  845. if (msi_x && !mthca_enable_msi_x(mdev))
  846. mdev->mthca_flags |= MTHCA_FLAG_MSI_X;
  847. if (msi && !(mdev->mthca_flags & MTHCA_FLAG_MSI_X) &&
  848. !pci_enable_msi(pdev))
  849. mdev->mthca_flags |= MTHCA_FLAG_MSI;
  850. if (mthca_cmd_init(mdev)) {
  851. mthca_err(mdev, "Failed to init command interface, aborting.\n");
  852. goto err_free_dev;
  853. }
  854. err = mthca_tune_pci(mdev);
  855. if (err)
  856. goto err_cmd;
  857. err = mthca_init_hca(mdev);
  858. if (err)
  859. goto err_cmd;
  860. if (mdev->fw_ver < mthca_hca_table[id->driver_data].latest_fw) {
  861. mthca_warn(mdev, "HCA FW version %x.%x.%x is old (%x.%x.%x is current).\n",
  862. (int) (mdev->fw_ver >> 32), (int) (mdev->fw_ver >> 16) & 0xffff,
  863. (int) (mdev->fw_ver & 0xffff),
  864. (int) (mthca_hca_table[id->driver_data].latest_fw >> 32),
  865. (int) (mthca_hca_table[id->driver_data].latest_fw >> 16) & 0xffff,
  866. (int) (mthca_hca_table[id->driver_data].latest_fw & 0xffff));
  867. mthca_warn(mdev, "If you have problems, try updating your HCA FW.\n");
  868. }
  869. err = mthca_setup_hca(mdev);
  870. if (err)
  871. goto err_close;
  872. err = mthca_register_device(mdev);
  873. if (err)
  874. goto err_cleanup;
  875. err = mthca_create_agents(mdev);
  876. if (err)
  877. goto err_unregister;
  878. pci_set_drvdata(pdev, mdev);
  879. return 0;
  880. err_unregister:
  881. mthca_unregister_device(mdev);
  882. err_cleanup:
  883. mthca_cleanup_mcg_table(mdev);
  884. mthca_cleanup_av_table(mdev);
  885. mthca_cleanup_qp_table(mdev);
  886. mthca_cleanup_cq_table(mdev);
  887. mthca_cmd_use_polling(mdev);
  888. mthca_cleanup_eq_table(mdev);
  889. mthca_pd_free(mdev, &mdev->driver_pd);
  890. mthca_cleanup_mr_table(mdev);
  891. mthca_cleanup_pd_table(mdev);
  892. mthca_cleanup_uar_table(mdev);
  893. err_close:
  894. mthca_close_hca(mdev);
  895. err_cmd:
  896. mthca_cmd_cleanup(mdev);
  897. err_free_dev:
  898. if (mdev->mthca_flags & MTHCA_FLAG_MSI_X)
  899. pci_disable_msix(pdev);
  900. if (mdev->mthca_flags & MTHCA_FLAG_MSI)
  901. pci_disable_msi(pdev);
  902. ib_dealloc_device(&mdev->ib_dev);
  903. err_free_res:
  904. mthca_release_regions(pdev, ddr_hidden);
  905. err_disable_pdev:
  906. pci_disable_device(pdev);
  907. pci_set_drvdata(pdev, NULL);
  908. return err;
  909. }
  910. static void __devexit mthca_remove_one(struct pci_dev *pdev)
  911. {
  912. struct mthca_dev *mdev = pci_get_drvdata(pdev);
  913. u8 status;
  914. int p;
  915. if (mdev) {
  916. mthca_free_agents(mdev);
  917. mthca_unregister_device(mdev);
  918. for (p = 1; p <= mdev->limits.num_ports; ++p)
  919. mthca_CLOSE_IB(mdev, p, &status);
  920. mthca_cleanup_mcg_table(mdev);
  921. mthca_cleanup_av_table(mdev);
  922. mthca_cleanup_qp_table(mdev);
  923. mthca_cleanup_cq_table(mdev);
  924. mthca_cmd_use_polling(mdev);
  925. mthca_cleanup_eq_table(mdev);
  926. mthca_pd_free(mdev, &mdev->driver_pd);
  927. mthca_cleanup_mr_table(mdev);
  928. mthca_cleanup_pd_table(mdev);
  929. iounmap(mdev->kar);
  930. mthca_uar_free(mdev, &mdev->driver_uar);
  931. mthca_cleanup_uar_table(mdev);
  932. mthca_close_hca(mdev);
  933. mthca_cmd_cleanup(mdev);
  934. if (mdev->mthca_flags & MTHCA_FLAG_MSI_X)
  935. pci_disable_msix(pdev);
  936. if (mdev->mthca_flags & MTHCA_FLAG_MSI)
  937. pci_disable_msi(pdev);
  938. ib_dealloc_device(&mdev->ib_dev);
  939. mthca_release_regions(pdev, mdev->mthca_flags &
  940. MTHCA_FLAG_DDR_HIDDEN);
  941. pci_disable_device(pdev);
  942. pci_set_drvdata(pdev, NULL);
  943. }
  944. }
  945. static struct pci_device_id mthca_pci_table[] = {
  946. { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_TAVOR),
  947. .driver_data = TAVOR },
  948. { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_TAVOR),
  949. .driver_data = TAVOR },
  950. { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT),
  951. .driver_data = ARBEL_COMPAT },
  952. { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT),
  953. .driver_data = ARBEL_COMPAT },
  954. { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL),
  955. .driver_data = ARBEL_NATIVE },
  956. { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL),
  957. .driver_data = ARBEL_NATIVE },
  958. { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_SINAI),
  959. .driver_data = SINAI },
  960. { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_SINAI),
  961. .driver_data = SINAI },
  962. { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_SINAI_OLD),
  963. .driver_data = SINAI },
  964. { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_SINAI_OLD),
  965. .driver_data = SINAI },
  966. { 0, }
  967. };
  968. MODULE_DEVICE_TABLE(pci, mthca_pci_table);
  969. static struct pci_driver mthca_driver = {
  970. .name = DRV_NAME,
  971. .id_table = mthca_pci_table,
  972. .probe = mthca_init_one,
  973. .remove = __devexit_p(mthca_remove_one)
  974. };
  975. static int __init mthca_init(void)
  976. {
  977. int ret;
  978. ret = pci_register_driver(&mthca_driver);
  979. return ret < 0 ? ret : 0;
  980. }
  981. static void __exit mthca_cleanup(void)
  982. {
  983. pci_unregister_driver(&mthca_driver);
  984. }
  985. module_init(mthca_init);
  986. module_exit(mthca_cleanup);