tegra30-beaver.dts 12 KB

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  1. /dts-v1/;
  2. #include "tegra30.dtsi"
  3. / {
  4. model = "NVIDIA Tegra30 Beaver evaluation board";
  5. compatible = "nvidia,beaver", "nvidia,tegra30";
  6. aliases {
  7. rtc0 = "/i2c@7000d000/tps65911@2d";
  8. rtc1 = "/rtc@7000e000";
  9. serial0 = &uarta;
  10. };
  11. memory {
  12. reg = <0x80000000 0x7ff00000>;
  13. };
  14. pcie-controller@00003000 {
  15. status = "okay";
  16. avdd-pexa-supply = <&ldo1_reg>;
  17. vdd-pexa-supply = <&ldo1_reg>;
  18. avdd-pexb-supply = <&ldo1_reg>;
  19. vdd-pexb-supply = <&ldo1_reg>;
  20. avdd-pex-pll-supply = <&ldo1_reg>;
  21. avdd-plle-supply = <&ldo1_reg>;
  22. vddio-pex-ctl-supply = <&sys_3v3_reg>;
  23. hvdd-pex-supply = <&sys_3v3_pexs_reg>;
  24. pci@1,0 {
  25. status = "okay";
  26. nvidia,num-lanes = <2>;
  27. };
  28. pci@2,0 {
  29. nvidia,num-lanes = <2>;
  30. };
  31. pci@3,0 {
  32. status = "okay";
  33. nvidia,num-lanes = <2>;
  34. };
  35. };
  36. host1x@50000000 {
  37. hdmi@54280000 {
  38. status = "okay";
  39. hdmi-supply = <&vdd_5v0_hdmi>;
  40. vdd-supply = <&sys_3v3_reg>;
  41. pll-supply = <&vio_reg>;
  42. nvidia,hpd-gpio =
  43. <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
  44. nvidia,ddc-i2c-bus = <&hdmiddc>;
  45. };
  46. };
  47. pinmux@70000868 {
  48. pinctrl-names = "default";
  49. pinctrl-0 = <&state_default>;
  50. state_default: pinmux {
  51. sdmmc1_clk_pz0 {
  52. nvidia,pins = "sdmmc1_clk_pz0";
  53. nvidia,function = "sdmmc1";
  54. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  55. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  56. };
  57. sdmmc1_cmd_pz1 {
  58. nvidia,pins = "sdmmc1_cmd_pz1",
  59. "sdmmc1_dat0_py7",
  60. "sdmmc1_dat1_py6",
  61. "sdmmc1_dat2_py5",
  62. "sdmmc1_dat3_py4";
  63. nvidia,function = "sdmmc1";
  64. nvidia,pull = <TEGRA_PIN_PULL_UP>;
  65. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  66. };
  67. sdmmc3_clk_pa6 {
  68. nvidia,pins = "sdmmc3_clk_pa6";
  69. nvidia,function = "sdmmc3";
  70. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  71. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  72. };
  73. sdmmc3_cmd_pa7 {
  74. nvidia,pins = "sdmmc3_cmd_pa7",
  75. "sdmmc3_dat0_pb7",
  76. "sdmmc3_dat1_pb6",
  77. "sdmmc3_dat2_pb5",
  78. "sdmmc3_dat3_pb4";
  79. nvidia,function = "sdmmc3";
  80. nvidia,pull = <TEGRA_PIN_PULL_UP>;
  81. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  82. };
  83. sdmmc4_clk_pcc4 {
  84. nvidia,pins = "sdmmc4_clk_pcc4",
  85. "sdmmc4_rst_n_pcc3";
  86. nvidia,function = "sdmmc4";
  87. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  88. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  89. };
  90. sdmmc4_dat0_paa0 {
  91. nvidia,pins = "sdmmc4_dat0_paa0",
  92. "sdmmc4_dat1_paa1",
  93. "sdmmc4_dat2_paa2",
  94. "sdmmc4_dat3_paa3",
  95. "sdmmc4_dat4_paa4",
  96. "sdmmc4_dat5_paa5",
  97. "sdmmc4_dat6_paa6",
  98. "sdmmc4_dat7_paa7";
  99. nvidia,function = "sdmmc4";
  100. nvidia,pull = <TEGRA_PIN_PULL_UP>;
  101. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  102. };
  103. dap2_fs_pa2 {
  104. nvidia,pins = "dap2_fs_pa2",
  105. "dap2_sclk_pa3",
  106. "dap2_din_pa4",
  107. "dap2_dout_pa5";
  108. nvidia,function = "i2s1";
  109. nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  110. nvidia,tristate = <TEGRA_PIN_DISABLE>;
  111. };
  112. pex_l1_prsnt_n_pdd4 {
  113. nvidia,pins = "pex_l1_prsnt_n_pdd4",
  114. "pex_l1_clkreq_n_pdd6";
  115. nvidia,pull = <TEGRA_PIN_PULL_UP>;
  116. };
  117. sdio3 {
  118. nvidia,pins = "drive_sdio3";
  119. nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
  120. nvidia,schmitt = <TEGRA_PIN_DISABLE>;
  121. nvidia,pull-down-strength = <46>;
  122. nvidia,pull-up-strength = <42>;
  123. nvidia,slew-rate-rising = <1>;
  124. nvidia,slew-rate-falling = <1>;
  125. };
  126. gpv {
  127. nvidia,pins = "drive_gpv";
  128. nvidia,pull-up-strength = <16>;
  129. };
  130. };
  131. };
  132. serial@70006000 {
  133. status = "okay";
  134. };
  135. i2c@7000c000 {
  136. status = "okay";
  137. clock-frequency = <100000>;
  138. };
  139. i2c@7000c400 {
  140. status = "okay";
  141. clock-frequency = <100000>;
  142. };
  143. i2c@7000c500 {
  144. status = "okay";
  145. clock-frequency = <100000>;
  146. };
  147. hdmiddc: i2c@7000c700 {
  148. status = "okay";
  149. clock-frequency = <100000>;
  150. };
  151. i2c@7000d000 {
  152. status = "okay";
  153. clock-frequency = <100000>;
  154. rt5640: rt5640@1c {
  155. compatible = "realtek,rt5640";
  156. reg = <0x1c>;
  157. interrupt-parent = <&gpio>;
  158. interrupts = <TEGRA_GPIO(X, 3) GPIO_ACTIVE_HIGH>;
  159. realtek,ldo1-en-gpios =
  160. <&gpio TEGRA_GPIO(X, 2) GPIO_ACTIVE_HIGH>;
  161. };
  162. pmic: tps65911@2d {
  163. compatible = "ti,tps65911";
  164. reg = <0x2d>;
  165. interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
  166. #interrupt-cells = <2>;
  167. interrupt-controller;
  168. ti,system-power-controller;
  169. #gpio-cells = <2>;
  170. gpio-controller;
  171. vcc1-supply = <&vdd_5v_in_reg>;
  172. vcc2-supply = <&vdd_5v_in_reg>;
  173. vcc3-supply = <&vio_reg>;
  174. vcc4-supply = <&vdd_5v_in_reg>;
  175. vcc5-supply = <&vdd_5v_in_reg>;
  176. vcc6-supply = <&vdd2_reg>;
  177. vcc7-supply = <&vdd_5v_in_reg>;
  178. vccio-supply = <&vdd_5v_in_reg>;
  179. regulators {
  180. #address-cells = <1>;
  181. #size-cells = <0>;
  182. vdd1_reg: vdd1 {
  183. regulator-name = "vddio_ddr_1v2";
  184. regulator-min-microvolt = <1200000>;
  185. regulator-max-microvolt = <1200000>;
  186. regulator-always-on;
  187. };
  188. vdd2_reg: vdd2 {
  189. regulator-name = "vdd_1v5_gen";
  190. regulator-min-microvolt = <1500000>;
  191. regulator-max-microvolt = <1500000>;
  192. regulator-always-on;
  193. };
  194. vddctrl_reg: vddctrl {
  195. regulator-name = "vdd_cpu,vdd_sys";
  196. regulator-min-microvolt = <1000000>;
  197. regulator-max-microvolt = <1000000>;
  198. regulator-always-on;
  199. };
  200. vio_reg: vio {
  201. regulator-name = "vdd_1v8_gen";
  202. regulator-min-microvolt = <1800000>;
  203. regulator-max-microvolt = <1800000>;
  204. regulator-always-on;
  205. };
  206. ldo1_reg: ldo1 {
  207. regulator-name = "vdd_pexa,vdd_pexb";
  208. regulator-min-microvolt = <1050000>;
  209. regulator-max-microvolt = <1050000>;
  210. };
  211. ldo2_reg: ldo2 {
  212. regulator-name = "vdd_sata,avdd_plle";
  213. regulator-min-microvolt = <1050000>;
  214. regulator-max-microvolt = <1050000>;
  215. };
  216. /* LDO3 is not connected to anything */
  217. ldo4_reg: ldo4 {
  218. regulator-name = "vdd_rtc";
  219. regulator-min-microvolt = <1200000>;
  220. regulator-max-microvolt = <1200000>;
  221. regulator-always-on;
  222. };
  223. ldo5_reg: ldo5 {
  224. regulator-name = "vddio_sdmmc,avdd_vdac";
  225. regulator-min-microvolt = <3300000>;
  226. regulator-max-microvolt = <3300000>;
  227. regulator-always-on;
  228. };
  229. ldo6_reg: ldo6 {
  230. regulator-name = "avdd_dsi_csi,pwrdet_mipi";
  231. regulator-min-microvolt = <1200000>;
  232. regulator-max-microvolt = <1200000>;
  233. };
  234. ldo7_reg: ldo7 {
  235. regulator-name = "vdd_pllm,x,u,a_p_c_s";
  236. regulator-min-microvolt = <1200000>;
  237. regulator-max-microvolt = <1200000>;
  238. regulator-always-on;
  239. };
  240. ldo8_reg: ldo8 {
  241. regulator-name = "vdd_ddr_hs";
  242. regulator-min-microvolt = <1000000>;
  243. regulator-max-microvolt = <1000000>;
  244. regulator-always-on;
  245. };
  246. };
  247. };
  248. tps62361@60 {
  249. compatible = "ti,tps62361";
  250. reg = <0x60>;
  251. regulator-name = "tps62361-vout";
  252. regulator-min-microvolt = <500000>;
  253. regulator-max-microvolt = <1500000>;
  254. regulator-boot-on;
  255. regulator-always-on;
  256. ti,vsel0-state-high;
  257. ti,vsel1-state-high;
  258. };
  259. };
  260. spi@7000da00 {
  261. status = "okay";
  262. spi-max-frequency = <25000000>;
  263. spi-flash@1 {
  264. compatible = "winbond,w25q32";
  265. reg = <1>;
  266. spi-max-frequency = <20000000>;
  267. };
  268. };
  269. pmc@7000e400 {
  270. status = "okay";
  271. nvidia,invert-interrupt;
  272. nvidia,suspend-mode = <1>;
  273. nvidia,cpu-pwr-good-time = <2000>;
  274. nvidia,cpu-pwr-off-time = <200>;
  275. nvidia,core-pwr-good-time = <3845 3845>;
  276. nvidia,core-pwr-off-time = <0>;
  277. nvidia,core-power-req-active-high;
  278. nvidia,sys-clock-req-active-high;
  279. };
  280. ahub@70080000 {
  281. i2s@70080400 {
  282. status = "okay";
  283. };
  284. };
  285. sdhci@78000000 {
  286. status = "okay";
  287. cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
  288. wp-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>;
  289. power-gpios = <&gpio TEGRA_GPIO(D, 7) GPIO_ACTIVE_HIGH>;
  290. bus-width = <4>;
  291. };
  292. sdhci@78000600 {
  293. status = "okay";
  294. bus-width = <8>;
  295. non-removable;
  296. };
  297. usb@7d004000 {
  298. status = "okay";
  299. };
  300. phy2: usb-phy@7d004000 {
  301. vbus-supply = <&sys_3v3_reg>;
  302. status = "okay";
  303. };
  304. usb@7d008000 {
  305. status = "okay";
  306. };
  307. usb-phy@7d008000 {
  308. vbus-supply = <&usb3_vbus_reg>;
  309. status = "okay";
  310. };
  311. clocks {
  312. compatible = "simple-bus";
  313. #address-cells = <1>;
  314. #size-cells = <0>;
  315. clk32k_in: clock@0 {
  316. compatible = "fixed-clock";
  317. reg=<0>;
  318. #clock-cells = <0>;
  319. clock-frequency = <32768>;
  320. };
  321. };
  322. gpio-leds {
  323. compatible = "gpio-leds";
  324. gpled1 {
  325. label = "LED1"; /* CR5A1 (blue) */
  326. gpios = <&gpio TEGRA_GPIO(L, 1) GPIO_ACTIVE_HIGH>;
  327. };
  328. gpled2 {
  329. label = "LED2"; /* CR4A2 (green) */
  330. gpios = <&gpio TEGRA_GPIO(L, 0) GPIO_ACTIVE_HIGH>;
  331. };
  332. };
  333. regulators {
  334. compatible = "simple-bus";
  335. #address-cells = <1>;
  336. #size-cells = <0>;
  337. vdd_5v_in_reg: regulator@0 {
  338. compatible = "regulator-fixed";
  339. reg = <0>;
  340. regulator-name = "vdd_5v_in";
  341. regulator-min-microvolt = <5000000>;
  342. regulator-max-microvolt = <5000000>;
  343. regulator-always-on;
  344. };
  345. chargepump_5v_reg: regulator@1 {
  346. compatible = "regulator-fixed";
  347. reg = <1>;
  348. regulator-name = "chargepump_5v";
  349. regulator-min-microvolt = <5000000>;
  350. regulator-max-microvolt = <5000000>;
  351. regulator-boot-on;
  352. regulator-always-on;
  353. enable-active-high;
  354. gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
  355. };
  356. ddr_reg: regulator@2 {
  357. compatible = "regulator-fixed";
  358. reg = <2>;
  359. regulator-name = "vdd_ddr";
  360. regulator-min-microvolt = <1500000>;
  361. regulator-max-microvolt = <1500000>;
  362. regulator-always-on;
  363. regulator-boot-on;
  364. enable-active-high;
  365. gpio = <&pmic 7 GPIO_ACTIVE_HIGH>;
  366. vin-supply = <&vdd_5v_in_reg>;
  367. };
  368. vdd_5v_sata_reg: regulator@3 {
  369. compatible = "regulator-fixed";
  370. reg = <3>;
  371. regulator-name = "vdd_5v_sata";
  372. regulator-min-microvolt = <5000000>;
  373. regulator-max-microvolt = <5000000>;
  374. regulator-always-on;
  375. regulator-boot-on;
  376. enable-active-high;
  377. gpio = <&gpio TEGRA_GPIO(D, 6) GPIO_ACTIVE_HIGH>;
  378. vin-supply = <&vdd_5v_in_reg>;
  379. };
  380. usb1_vbus_reg: regulator@4 {
  381. compatible = "regulator-fixed";
  382. reg = <4>;
  383. regulator-name = "usb1_vbus";
  384. regulator-min-microvolt = <5000000>;
  385. regulator-max-microvolt = <5000000>;
  386. enable-active-high;
  387. gpio = <&gpio TEGRA_GPIO(DD, 6) GPIO_ACTIVE_HIGH>;
  388. gpio-open-drain;
  389. vin-supply = <&vdd_5v_in_reg>;
  390. };
  391. usb3_vbus_reg: regulator@5 {
  392. compatible = "regulator-fixed";
  393. reg = <5>;
  394. regulator-name = "usb3_vbus";
  395. regulator-min-microvolt = <5000000>;
  396. regulator-max-microvolt = <5000000>;
  397. enable-active-high;
  398. gpio = <&gpio TEGRA_GPIO(DD, 4) GPIO_ACTIVE_HIGH>;
  399. gpio-open-drain;
  400. vin-supply = <&vdd_5v_in_reg>;
  401. };
  402. sys_3v3_reg: regulator@6 {
  403. compatible = "regulator-fixed";
  404. reg = <6>;
  405. regulator-name = "sys_3v3,vdd_3v3_alw";
  406. regulator-min-microvolt = <3300000>;
  407. regulator-max-microvolt = <3300000>;
  408. regulator-always-on;
  409. regulator-boot-on;
  410. enable-active-high;
  411. gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
  412. vin-supply = <&vdd_5v_in_reg>;
  413. };
  414. sys_3v3_pexs_reg: regulator@7 {
  415. compatible = "regulator-fixed";
  416. reg = <7>;
  417. regulator-name = "sys_3v3_pexs";
  418. regulator-min-microvolt = <3300000>;
  419. regulator-max-microvolt = <3300000>;
  420. regulator-always-on;
  421. regulator-boot-on;
  422. enable-active-high;
  423. gpio = <&gpio TEGRA_GPIO(L, 7) GPIO_ACTIVE_HIGH>;
  424. vin-supply = <&sys_3v3_reg>;
  425. };
  426. vdd_5v0_hdmi: regulator@8 {
  427. compatible = "regulator-fixed";
  428. reg = <8>;
  429. regulator-name = "+VDD_5V_HDMI";
  430. regulator-min-microvolt = <5000000>;
  431. regulator-max-microvolt = <5000000>;
  432. regulator-always-on;
  433. regulator-boot-on;
  434. vin-supply = <&sys_3v3_reg>;
  435. };
  436. };
  437. sound {
  438. compatible = "nvidia,tegra-audio-rt5640-beaver",
  439. "nvidia,tegra-audio-rt5640";
  440. nvidia,model = "NVIDIA Tegra Beaver";
  441. nvidia,audio-routing =
  442. "Headphones", "HPOR",
  443. "Headphones", "HPOL",
  444. "Mic Jack", "MICBIAS1",
  445. "IN2P", "Mic Jack";
  446. nvidia,i2s-controller = <&tegra_i2s1>;
  447. nvidia,audio-codec = <&rt5640>;
  448. nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>;
  449. clocks = <&tegra_car TEGRA30_CLK_PLL_A>,
  450. <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
  451. <&tegra_car TEGRA30_CLK_EXTERN1>;
  452. clock-names = "pll_a", "pll_a_out0", "mclk";
  453. };
  454. };