bpf_jit_comp.c 33 KB

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  1. /* bpf_jit_comp.c : BPF JIT compiler
  2. *
  3. * Copyright (C) 2011-2013 Eric Dumazet (eric.dumazet@gmail.com)
  4. * Internal BPF Copyright (c) 2011-2014 PLUMgrid, http://plumgrid.com
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; version 2
  9. * of the License.
  10. */
  11. #include <linux/netdevice.h>
  12. #include <linux/filter.h>
  13. #include <linux/if_vlan.h>
  14. #include <linux/bpf.h>
  15. #include <asm/set_memory.h>
  16. #include <asm/nospec-branch.h>
  17. /*
  18. * assembly code in arch/x86/net/bpf_jit.S
  19. */
  20. extern u8 sk_load_word[], sk_load_half[], sk_load_byte[];
  21. extern u8 sk_load_word_positive_offset[], sk_load_half_positive_offset[];
  22. extern u8 sk_load_byte_positive_offset[];
  23. extern u8 sk_load_word_negative_offset[], sk_load_half_negative_offset[];
  24. extern u8 sk_load_byte_negative_offset[];
  25. static u8 *emit_code(u8 *ptr, u32 bytes, unsigned int len)
  26. {
  27. if (len == 1)
  28. *ptr = bytes;
  29. else if (len == 2)
  30. *(u16 *)ptr = bytes;
  31. else {
  32. *(u32 *)ptr = bytes;
  33. barrier();
  34. }
  35. return ptr + len;
  36. }
  37. #define EMIT(bytes, len) \
  38. do { prog = emit_code(prog, bytes, len); cnt += len; } while (0)
  39. #define EMIT1(b1) EMIT(b1, 1)
  40. #define EMIT2(b1, b2) EMIT((b1) + ((b2) << 8), 2)
  41. #define EMIT3(b1, b2, b3) EMIT((b1) + ((b2) << 8) + ((b3) << 16), 3)
  42. #define EMIT4(b1, b2, b3, b4) EMIT((b1) + ((b2) << 8) + ((b3) << 16) + ((b4) << 24), 4)
  43. #define EMIT1_off32(b1, off) \
  44. do {EMIT1(b1); EMIT(off, 4); } while (0)
  45. #define EMIT2_off32(b1, b2, off) \
  46. do {EMIT2(b1, b2); EMIT(off, 4); } while (0)
  47. #define EMIT3_off32(b1, b2, b3, off) \
  48. do {EMIT3(b1, b2, b3); EMIT(off, 4); } while (0)
  49. #define EMIT4_off32(b1, b2, b3, b4, off) \
  50. do {EMIT4(b1, b2, b3, b4); EMIT(off, 4); } while (0)
  51. static bool is_imm8(int value)
  52. {
  53. return value <= 127 && value >= -128;
  54. }
  55. static bool is_simm32(s64 value)
  56. {
  57. return value == (s64)(s32)value;
  58. }
  59. static bool is_uimm32(u64 value)
  60. {
  61. return value == (u64)(u32)value;
  62. }
  63. /* mov dst, src */
  64. #define EMIT_mov(DST, SRC) \
  65. do {if (DST != SRC) \
  66. EMIT3(add_2mod(0x48, DST, SRC), 0x89, add_2reg(0xC0, DST, SRC)); \
  67. } while (0)
  68. static int bpf_size_to_x86_bytes(int bpf_size)
  69. {
  70. if (bpf_size == BPF_W)
  71. return 4;
  72. else if (bpf_size == BPF_H)
  73. return 2;
  74. else if (bpf_size == BPF_B)
  75. return 1;
  76. else if (bpf_size == BPF_DW)
  77. return 4; /* imm32 */
  78. else
  79. return 0;
  80. }
  81. /* list of x86 cond jumps opcodes (. + s8)
  82. * Add 0x10 (and an extra 0x0f) to generate far jumps (. + s32)
  83. */
  84. #define X86_JB 0x72
  85. #define X86_JAE 0x73
  86. #define X86_JE 0x74
  87. #define X86_JNE 0x75
  88. #define X86_JBE 0x76
  89. #define X86_JA 0x77
  90. #define X86_JL 0x7C
  91. #define X86_JGE 0x7D
  92. #define X86_JLE 0x7E
  93. #define X86_JG 0x7F
  94. #define CHOOSE_LOAD_FUNC(K, func) \
  95. ((int)K < 0 ? ((int)K >= SKF_LL_OFF ? func##_negative_offset : func) : func##_positive_offset)
  96. /* pick a register outside of BPF range for JIT internal work */
  97. #define AUX_REG (MAX_BPF_JIT_REG + 1)
  98. /* The following table maps BPF registers to x64 registers.
  99. *
  100. * x64 register r12 is unused, since if used as base address
  101. * register in load/store instructions, it always needs an
  102. * extra byte of encoding and is callee saved.
  103. *
  104. * r9 caches skb->len - skb->data_len
  105. * r10 caches skb->data, and used for blinding (if enabled)
  106. */
  107. static const int reg2hex[] = {
  108. [BPF_REG_0] = 0, /* rax */
  109. [BPF_REG_1] = 7, /* rdi */
  110. [BPF_REG_2] = 6, /* rsi */
  111. [BPF_REG_3] = 2, /* rdx */
  112. [BPF_REG_4] = 1, /* rcx */
  113. [BPF_REG_5] = 0, /* r8 */
  114. [BPF_REG_6] = 3, /* rbx callee saved */
  115. [BPF_REG_7] = 5, /* r13 callee saved */
  116. [BPF_REG_8] = 6, /* r14 callee saved */
  117. [BPF_REG_9] = 7, /* r15 callee saved */
  118. [BPF_REG_FP] = 5, /* rbp readonly */
  119. [BPF_REG_AX] = 2, /* r10 temp register */
  120. [AUX_REG] = 3, /* r11 temp register */
  121. };
  122. /* is_ereg() == true if BPF register 'reg' maps to x64 r8..r15
  123. * which need extra byte of encoding.
  124. * rax,rcx,...,rbp have simpler encoding
  125. */
  126. static bool is_ereg(u32 reg)
  127. {
  128. return (1 << reg) & (BIT(BPF_REG_5) |
  129. BIT(AUX_REG) |
  130. BIT(BPF_REG_7) |
  131. BIT(BPF_REG_8) |
  132. BIT(BPF_REG_9) |
  133. BIT(BPF_REG_AX));
  134. }
  135. static bool is_axreg(u32 reg)
  136. {
  137. return reg == BPF_REG_0;
  138. }
  139. /* add modifiers if 'reg' maps to x64 registers r8..r15 */
  140. static u8 add_1mod(u8 byte, u32 reg)
  141. {
  142. if (is_ereg(reg))
  143. byte |= 1;
  144. return byte;
  145. }
  146. static u8 add_2mod(u8 byte, u32 r1, u32 r2)
  147. {
  148. if (is_ereg(r1))
  149. byte |= 1;
  150. if (is_ereg(r2))
  151. byte |= 4;
  152. return byte;
  153. }
  154. /* encode 'dst_reg' register into x64 opcode 'byte' */
  155. static u8 add_1reg(u8 byte, u32 dst_reg)
  156. {
  157. return byte + reg2hex[dst_reg];
  158. }
  159. /* encode 'dst_reg' and 'src_reg' registers into x64 opcode 'byte' */
  160. static u8 add_2reg(u8 byte, u32 dst_reg, u32 src_reg)
  161. {
  162. return byte + reg2hex[dst_reg] + (reg2hex[src_reg] << 3);
  163. }
  164. static void jit_fill_hole(void *area, unsigned int size)
  165. {
  166. /* fill whole space with int3 instructions */
  167. memset(area, 0xcc, size);
  168. }
  169. struct jit_context {
  170. int cleanup_addr; /* epilogue code offset */
  171. bool seen_ld_abs;
  172. bool seen_ax_reg;
  173. };
  174. /* maximum number of bytes emitted while JITing one eBPF insn */
  175. #define BPF_MAX_INSN_SIZE 128
  176. #define BPF_INSN_SAFETY 64
  177. #define AUX_STACK_SPACE \
  178. (32 /* space for rbx, r13, r14, r15 */ + \
  179. 8 /* space for skb_copy_bits() buffer */)
  180. #define PROLOGUE_SIZE 37
  181. /* emit x64 prologue code for BPF program and check it's size.
  182. * bpf_tail_call helper will skip it while jumping into another program
  183. */
  184. static void emit_prologue(u8 **pprog, u32 stack_depth, bool ebpf_from_cbpf)
  185. {
  186. u8 *prog = *pprog;
  187. int cnt = 0;
  188. EMIT1(0x55); /* push rbp */
  189. EMIT3(0x48, 0x89, 0xE5); /* mov rbp,rsp */
  190. /* sub rsp, rounded_stack_depth + AUX_STACK_SPACE */
  191. EMIT3_off32(0x48, 0x81, 0xEC,
  192. round_up(stack_depth, 8) + AUX_STACK_SPACE);
  193. /* sub rbp, AUX_STACK_SPACE */
  194. EMIT4(0x48, 0x83, 0xED, AUX_STACK_SPACE);
  195. /* all classic BPF filters use R6(rbx) save it */
  196. /* mov qword ptr [rbp+0],rbx */
  197. EMIT4(0x48, 0x89, 0x5D, 0);
  198. /* bpf_convert_filter() maps classic BPF register X to R7 and uses R8
  199. * as temporary, so all tcpdump filters need to spill/fill R7(r13) and
  200. * R8(r14). R9(r15) spill could be made conditional, but there is only
  201. * one 'bpf_error' return path out of helper functions inside bpf_jit.S
  202. * The overhead of extra spill is negligible for any filter other
  203. * than synthetic ones. Therefore not worth adding complexity.
  204. */
  205. /* mov qword ptr [rbp+8],r13 */
  206. EMIT4(0x4C, 0x89, 0x6D, 8);
  207. /* mov qword ptr [rbp+16],r14 */
  208. EMIT4(0x4C, 0x89, 0x75, 16);
  209. /* mov qword ptr [rbp+24],r15 */
  210. EMIT4(0x4C, 0x89, 0x7D, 24);
  211. if (!ebpf_from_cbpf) {
  212. /* Clear the tail call counter (tail_call_cnt): for eBPF tail
  213. * calls we need to reset the counter to 0. It's done in two
  214. * instructions, resetting rax register to 0, and moving it
  215. * to the counter location.
  216. */
  217. /* xor eax, eax */
  218. EMIT2(0x31, 0xc0);
  219. /* mov qword ptr [rbp+32], rax */
  220. EMIT4(0x48, 0x89, 0x45, 32);
  221. BUILD_BUG_ON(cnt != PROLOGUE_SIZE);
  222. }
  223. *pprog = prog;
  224. }
  225. /* generate the following code:
  226. * ... bpf_tail_call(void *ctx, struct bpf_array *array, u64 index) ...
  227. * if (index >= array->map.max_entries)
  228. * goto out;
  229. * if (++tail_call_cnt > MAX_TAIL_CALL_CNT)
  230. * goto out;
  231. * prog = array->ptrs[index];
  232. * if (prog == NULL)
  233. * goto out;
  234. * goto *(prog->bpf_func + prologue_size);
  235. * out:
  236. */
  237. static void emit_bpf_tail_call(u8 **pprog)
  238. {
  239. u8 *prog = *pprog;
  240. int label1, label2, label3;
  241. int cnt = 0;
  242. /* rdi - pointer to ctx
  243. * rsi - pointer to bpf_array
  244. * rdx - index in bpf_array
  245. */
  246. /* if (index >= array->map.max_entries)
  247. * goto out;
  248. */
  249. EMIT2(0x89, 0xD2); /* mov edx, edx */
  250. EMIT3(0x39, 0x56, /* cmp dword ptr [rsi + 16], edx */
  251. offsetof(struct bpf_array, map.max_entries));
  252. #define OFFSET1 (41 + RETPOLINE_RAX_BPF_JIT_SIZE) /* number of bytes to jump */
  253. EMIT2(X86_JBE, OFFSET1); /* jbe out */
  254. label1 = cnt;
  255. /* if (tail_call_cnt > MAX_TAIL_CALL_CNT)
  256. * goto out;
  257. */
  258. EMIT2_off32(0x8B, 0x85, 36); /* mov eax, dword ptr [rbp + 36] */
  259. EMIT3(0x83, 0xF8, MAX_TAIL_CALL_CNT); /* cmp eax, MAX_TAIL_CALL_CNT */
  260. #define OFFSET2 (30 + RETPOLINE_RAX_BPF_JIT_SIZE)
  261. EMIT2(X86_JA, OFFSET2); /* ja out */
  262. label2 = cnt;
  263. EMIT3(0x83, 0xC0, 0x01); /* add eax, 1 */
  264. EMIT2_off32(0x89, 0x85, 36); /* mov dword ptr [rbp + 36], eax */
  265. /* prog = array->ptrs[index]; */
  266. EMIT4_off32(0x48, 0x8B, 0x84, 0xD6, /* mov rax, [rsi + rdx * 8 + offsetof(...)] */
  267. offsetof(struct bpf_array, ptrs));
  268. /* if (prog == NULL)
  269. * goto out;
  270. */
  271. EMIT3(0x48, 0x85, 0xC0); /* test rax,rax */
  272. #define OFFSET3 (8 + RETPOLINE_RAX_BPF_JIT_SIZE)
  273. EMIT2(X86_JE, OFFSET3); /* je out */
  274. label3 = cnt;
  275. /* goto *(prog->bpf_func + prologue_size); */
  276. EMIT4(0x48, 0x8B, 0x40, /* mov rax, qword ptr [rax + 32] */
  277. offsetof(struct bpf_prog, bpf_func));
  278. EMIT4(0x48, 0x83, 0xC0, PROLOGUE_SIZE); /* add rax, prologue_size */
  279. /* now we're ready to jump into next BPF program
  280. * rdi == ctx (1st arg)
  281. * rax == prog->bpf_func + prologue_size
  282. */
  283. RETPOLINE_RAX_BPF_JIT();
  284. /* out: */
  285. BUILD_BUG_ON(cnt - label1 != OFFSET1);
  286. BUILD_BUG_ON(cnt - label2 != OFFSET2);
  287. BUILD_BUG_ON(cnt - label3 != OFFSET3);
  288. *pprog = prog;
  289. }
  290. static void emit_load_skb_data_hlen(u8 **pprog)
  291. {
  292. u8 *prog = *pprog;
  293. int cnt = 0;
  294. /* r9d = skb->len - skb->data_len (headlen)
  295. * r10 = skb->data
  296. */
  297. /* mov %r9d, off32(%rdi) */
  298. EMIT3_off32(0x44, 0x8b, 0x8f, offsetof(struct sk_buff, len));
  299. /* sub %r9d, off32(%rdi) */
  300. EMIT3_off32(0x44, 0x2b, 0x8f, offsetof(struct sk_buff, data_len));
  301. /* mov %r10, off32(%rdi) */
  302. EMIT3_off32(0x4c, 0x8b, 0x97, offsetof(struct sk_buff, data));
  303. *pprog = prog;
  304. }
  305. static void emit_mov_imm32(u8 **pprog, bool sign_propagate,
  306. u32 dst_reg, const u32 imm32)
  307. {
  308. u8 *prog = *pprog;
  309. u8 b1, b2, b3;
  310. int cnt = 0;
  311. /* optimization: if imm32 is positive, use 'mov %eax, imm32'
  312. * (which zero-extends imm32) to save 2 bytes.
  313. */
  314. if (sign_propagate && (s32)imm32 < 0) {
  315. /* 'mov %rax, imm32' sign extends imm32 */
  316. b1 = add_1mod(0x48, dst_reg);
  317. b2 = 0xC7;
  318. b3 = 0xC0;
  319. EMIT3_off32(b1, b2, add_1reg(b3, dst_reg), imm32);
  320. goto done;
  321. }
  322. /* optimization: if imm32 is zero, use 'xor %eax, %eax'
  323. * to save 3 bytes.
  324. */
  325. if (imm32 == 0) {
  326. if (is_ereg(dst_reg))
  327. EMIT1(add_2mod(0x40, dst_reg, dst_reg));
  328. b2 = 0x31; /* xor */
  329. b3 = 0xC0;
  330. EMIT2(b2, add_2reg(b3, dst_reg, dst_reg));
  331. goto done;
  332. }
  333. /* mov %eax, imm32 */
  334. if (is_ereg(dst_reg))
  335. EMIT1(add_1mod(0x40, dst_reg));
  336. EMIT1_off32(add_1reg(0xB8, dst_reg), imm32);
  337. done:
  338. *pprog = prog;
  339. }
  340. static void emit_mov_imm64(u8 **pprog, u32 dst_reg,
  341. const u32 imm32_hi, const u32 imm32_lo)
  342. {
  343. u8 *prog = *pprog;
  344. int cnt = 0;
  345. if (is_uimm32(((u64)imm32_hi << 32) | (u32)imm32_lo)) {
  346. /* For emitting plain u32, where sign bit must not be
  347. * propagated LLVM tends to load imm64 over mov32
  348. * directly, so save couple of bytes by just doing
  349. * 'mov %eax, imm32' instead.
  350. */
  351. emit_mov_imm32(&prog, false, dst_reg, imm32_lo);
  352. } else {
  353. /* movabsq %rax, imm64 */
  354. EMIT2(add_1mod(0x48, dst_reg), add_1reg(0xB8, dst_reg));
  355. EMIT(imm32_lo, 4);
  356. EMIT(imm32_hi, 4);
  357. }
  358. *pprog = prog;
  359. }
  360. static void emit_mov_reg(u8 **pprog, bool is64, u32 dst_reg, u32 src_reg)
  361. {
  362. u8 *prog = *pprog;
  363. int cnt = 0;
  364. if (is64) {
  365. /* mov dst, src */
  366. EMIT_mov(dst_reg, src_reg);
  367. } else {
  368. /* mov32 dst, src */
  369. if (is_ereg(dst_reg) || is_ereg(src_reg))
  370. EMIT1(add_2mod(0x40, dst_reg, src_reg));
  371. EMIT2(0x89, add_2reg(0xC0, dst_reg, src_reg));
  372. }
  373. *pprog = prog;
  374. }
  375. static int do_jit(struct bpf_prog *bpf_prog, int *addrs, u8 *image,
  376. int oldproglen, struct jit_context *ctx)
  377. {
  378. struct bpf_insn *insn = bpf_prog->insnsi;
  379. int insn_cnt = bpf_prog->len;
  380. bool seen_ld_abs = ctx->seen_ld_abs | (oldproglen == 0);
  381. bool seen_ax_reg = ctx->seen_ax_reg | (oldproglen == 0);
  382. bool seen_exit = false;
  383. u8 temp[BPF_MAX_INSN_SIZE + BPF_INSN_SAFETY];
  384. int i, cnt = 0;
  385. int proglen = 0;
  386. u8 *prog = temp;
  387. emit_prologue(&prog, bpf_prog->aux->stack_depth,
  388. bpf_prog_was_classic(bpf_prog));
  389. if (seen_ld_abs)
  390. emit_load_skb_data_hlen(&prog);
  391. for (i = 0; i < insn_cnt; i++, insn++) {
  392. const s32 imm32 = insn->imm;
  393. u32 dst_reg = insn->dst_reg;
  394. u32 src_reg = insn->src_reg;
  395. u8 b2 = 0, b3 = 0;
  396. s64 jmp_offset;
  397. u8 jmp_cond;
  398. bool reload_skb_data;
  399. int ilen;
  400. u8 *func;
  401. if (dst_reg == BPF_REG_AX || src_reg == BPF_REG_AX)
  402. ctx->seen_ax_reg = seen_ax_reg = true;
  403. switch (insn->code) {
  404. /* ALU */
  405. case BPF_ALU | BPF_ADD | BPF_X:
  406. case BPF_ALU | BPF_SUB | BPF_X:
  407. case BPF_ALU | BPF_AND | BPF_X:
  408. case BPF_ALU | BPF_OR | BPF_X:
  409. case BPF_ALU | BPF_XOR | BPF_X:
  410. case BPF_ALU64 | BPF_ADD | BPF_X:
  411. case BPF_ALU64 | BPF_SUB | BPF_X:
  412. case BPF_ALU64 | BPF_AND | BPF_X:
  413. case BPF_ALU64 | BPF_OR | BPF_X:
  414. case BPF_ALU64 | BPF_XOR | BPF_X:
  415. switch (BPF_OP(insn->code)) {
  416. case BPF_ADD: b2 = 0x01; break;
  417. case BPF_SUB: b2 = 0x29; break;
  418. case BPF_AND: b2 = 0x21; break;
  419. case BPF_OR: b2 = 0x09; break;
  420. case BPF_XOR: b2 = 0x31; break;
  421. }
  422. if (BPF_CLASS(insn->code) == BPF_ALU64)
  423. EMIT1(add_2mod(0x48, dst_reg, src_reg));
  424. else if (is_ereg(dst_reg) || is_ereg(src_reg))
  425. EMIT1(add_2mod(0x40, dst_reg, src_reg));
  426. EMIT2(b2, add_2reg(0xC0, dst_reg, src_reg));
  427. break;
  428. case BPF_ALU64 | BPF_MOV | BPF_X:
  429. case BPF_ALU | BPF_MOV | BPF_X:
  430. emit_mov_reg(&prog,
  431. BPF_CLASS(insn->code) == BPF_ALU64,
  432. dst_reg, src_reg);
  433. break;
  434. /* neg dst */
  435. case BPF_ALU | BPF_NEG:
  436. case BPF_ALU64 | BPF_NEG:
  437. if (BPF_CLASS(insn->code) == BPF_ALU64)
  438. EMIT1(add_1mod(0x48, dst_reg));
  439. else if (is_ereg(dst_reg))
  440. EMIT1(add_1mod(0x40, dst_reg));
  441. EMIT2(0xF7, add_1reg(0xD8, dst_reg));
  442. break;
  443. case BPF_ALU | BPF_ADD | BPF_K:
  444. case BPF_ALU | BPF_SUB | BPF_K:
  445. case BPF_ALU | BPF_AND | BPF_K:
  446. case BPF_ALU | BPF_OR | BPF_K:
  447. case BPF_ALU | BPF_XOR | BPF_K:
  448. case BPF_ALU64 | BPF_ADD | BPF_K:
  449. case BPF_ALU64 | BPF_SUB | BPF_K:
  450. case BPF_ALU64 | BPF_AND | BPF_K:
  451. case BPF_ALU64 | BPF_OR | BPF_K:
  452. case BPF_ALU64 | BPF_XOR | BPF_K:
  453. if (BPF_CLASS(insn->code) == BPF_ALU64)
  454. EMIT1(add_1mod(0x48, dst_reg));
  455. else if (is_ereg(dst_reg))
  456. EMIT1(add_1mod(0x40, dst_reg));
  457. /* b3 holds 'normal' opcode, b2 short form only valid
  458. * in case dst is eax/rax.
  459. */
  460. switch (BPF_OP(insn->code)) {
  461. case BPF_ADD:
  462. b3 = 0xC0;
  463. b2 = 0x05;
  464. break;
  465. case BPF_SUB:
  466. b3 = 0xE8;
  467. b2 = 0x2D;
  468. break;
  469. case BPF_AND:
  470. b3 = 0xE0;
  471. b2 = 0x25;
  472. break;
  473. case BPF_OR:
  474. b3 = 0xC8;
  475. b2 = 0x0D;
  476. break;
  477. case BPF_XOR:
  478. b3 = 0xF0;
  479. b2 = 0x35;
  480. break;
  481. }
  482. if (is_imm8(imm32))
  483. EMIT3(0x83, add_1reg(b3, dst_reg), imm32);
  484. else if (is_axreg(dst_reg))
  485. EMIT1_off32(b2, imm32);
  486. else
  487. EMIT2_off32(0x81, add_1reg(b3, dst_reg), imm32);
  488. break;
  489. case BPF_ALU64 | BPF_MOV | BPF_K:
  490. case BPF_ALU | BPF_MOV | BPF_K:
  491. emit_mov_imm32(&prog, BPF_CLASS(insn->code) == BPF_ALU64,
  492. dst_reg, imm32);
  493. break;
  494. case BPF_LD | BPF_IMM | BPF_DW:
  495. emit_mov_imm64(&prog, dst_reg, insn[1].imm, insn[0].imm);
  496. insn++;
  497. i++;
  498. break;
  499. /* dst %= src, dst /= src, dst %= imm32, dst /= imm32 */
  500. case BPF_ALU | BPF_MOD | BPF_X:
  501. case BPF_ALU | BPF_DIV | BPF_X:
  502. case BPF_ALU | BPF_MOD | BPF_K:
  503. case BPF_ALU | BPF_DIV | BPF_K:
  504. case BPF_ALU64 | BPF_MOD | BPF_X:
  505. case BPF_ALU64 | BPF_DIV | BPF_X:
  506. case BPF_ALU64 | BPF_MOD | BPF_K:
  507. case BPF_ALU64 | BPF_DIV | BPF_K:
  508. EMIT1(0x50); /* push rax */
  509. EMIT1(0x52); /* push rdx */
  510. if (BPF_SRC(insn->code) == BPF_X)
  511. /* mov r11, src_reg */
  512. EMIT_mov(AUX_REG, src_reg);
  513. else
  514. /* mov r11, imm32 */
  515. EMIT3_off32(0x49, 0xC7, 0xC3, imm32);
  516. /* mov rax, dst_reg */
  517. EMIT_mov(BPF_REG_0, dst_reg);
  518. /* xor edx, edx
  519. * equivalent to 'xor rdx, rdx', but one byte less
  520. */
  521. EMIT2(0x31, 0xd2);
  522. if (BPF_CLASS(insn->code) == BPF_ALU64)
  523. /* div r11 */
  524. EMIT3(0x49, 0xF7, 0xF3);
  525. else
  526. /* div r11d */
  527. EMIT3(0x41, 0xF7, 0xF3);
  528. if (BPF_OP(insn->code) == BPF_MOD)
  529. /* mov r11, rdx */
  530. EMIT3(0x49, 0x89, 0xD3);
  531. else
  532. /* mov r11, rax */
  533. EMIT3(0x49, 0x89, 0xC3);
  534. EMIT1(0x5A); /* pop rdx */
  535. EMIT1(0x58); /* pop rax */
  536. /* mov dst_reg, r11 */
  537. EMIT_mov(dst_reg, AUX_REG);
  538. break;
  539. case BPF_ALU | BPF_MUL | BPF_K:
  540. case BPF_ALU | BPF_MUL | BPF_X:
  541. case BPF_ALU64 | BPF_MUL | BPF_K:
  542. case BPF_ALU64 | BPF_MUL | BPF_X:
  543. {
  544. bool is64 = BPF_CLASS(insn->code) == BPF_ALU64;
  545. if (dst_reg != BPF_REG_0)
  546. EMIT1(0x50); /* push rax */
  547. if (dst_reg != BPF_REG_3)
  548. EMIT1(0x52); /* push rdx */
  549. /* mov r11, dst_reg */
  550. EMIT_mov(AUX_REG, dst_reg);
  551. if (BPF_SRC(insn->code) == BPF_X)
  552. emit_mov_reg(&prog, is64, BPF_REG_0, src_reg);
  553. else
  554. emit_mov_imm32(&prog, is64, BPF_REG_0, imm32);
  555. if (is64)
  556. EMIT1(add_1mod(0x48, AUX_REG));
  557. else if (is_ereg(AUX_REG))
  558. EMIT1(add_1mod(0x40, AUX_REG));
  559. /* mul(q) r11 */
  560. EMIT2(0xF7, add_1reg(0xE0, AUX_REG));
  561. if (dst_reg != BPF_REG_3)
  562. EMIT1(0x5A); /* pop rdx */
  563. if (dst_reg != BPF_REG_0) {
  564. /* mov dst_reg, rax */
  565. EMIT_mov(dst_reg, BPF_REG_0);
  566. EMIT1(0x58); /* pop rax */
  567. }
  568. break;
  569. }
  570. /* shifts */
  571. case BPF_ALU | BPF_LSH | BPF_K:
  572. case BPF_ALU | BPF_RSH | BPF_K:
  573. case BPF_ALU | BPF_ARSH | BPF_K:
  574. case BPF_ALU64 | BPF_LSH | BPF_K:
  575. case BPF_ALU64 | BPF_RSH | BPF_K:
  576. case BPF_ALU64 | BPF_ARSH | BPF_K:
  577. if (BPF_CLASS(insn->code) == BPF_ALU64)
  578. EMIT1(add_1mod(0x48, dst_reg));
  579. else if (is_ereg(dst_reg))
  580. EMIT1(add_1mod(0x40, dst_reg));
  581. switch (BPF_OP(insn->code)) {
  582. case BPF_LSH: b3 = 0xE0; break;
  583. case BPF_RSH: b3 = 0xE8; break;
  584. case BPF_ARSH: b3 = 0xF8; break;
  585. }
  586. if (imm32 == 1)
  587. EMIT2(0xD1, add_1reg(b3, dst_reg));
  588. else
  589. EMIT3(0xC1, add_1reg(b3, dst_reg), imm32);
  590. break;
  591. case BPF_ALU | BPF_LSH | BPF_X:
  592. case BPF_ALU | BPF_RSH | BPF_X:
  593. case BPF_ALU | BPF_ARSH | BPF_X:
  594. case BPF_ALU64 | BPF_LSH | BPF_X:
  595. case BPF_ALU64 | BPF_RSH | BPF_X:
  596. case BPF_ALU64 | BPF_ARSH | BPF_X:
  597. /* check for bad case when dst_reg == rcx */
  598. if (dst_reg == BPF_REG_4) {
  599. /* mov r11, dst_reg */
  600. EMIT_mov(AUX_REG, dst_reg);
  601. dst_reg = AUX_REG;
  602. }
  603. if (src_reg != BPF_REG_4) { /* common case */
  604. EMIT1(0x51); /* push rcx */
  605. /* mov rcx, src_reg */
  606. EMIT_mov(BPF_REG_4, src_reg);
  607. }
  608. /* shl %rax, %cl | shr %rax, %cl | sar %rax, %cl */
  609. if (BPF_CLASS(insn->code) == BPF_ALU64)
  610. EMIT1(add_1mod(0x48, dst_reg));
  611. else if (is_ereg(dst_reg))
  612. EMIT1(add_1mod(0x40, dst_reg));
  613. switch (BPF_OP(insn->code)) {
  614. case BPF_LSH: b3 = 0xE0; break;
  615. case BPF_RSH: b3 = 0xE8; break;
  616. case BPF_ARSH: b3 = 0xF8; break;
  617. }
  618. EMIT2(0xD3, add_1reg(b3, dst_reg));
  619. if (src_reg != BPF_REG_4)
  620. EMIT1(0x59); /* pop rcx */
  621. if (insn->dst_reg == BPF_REG_4)
  622. /* mov dst_reg, r11 */
  623. EMIT_mov(insn->dst_reg, AUX_REG);
  624. break;
  625. case BPF_ALU | BPF_END | BPF_FROM_BE:
  626. switch (imm32) {
  627. case 16:
  628. /* emit 'ror %ax, 8' to swap lower 2 bytes */
  629. EMIT1(0x66);
  630. if (is_ereg(dst_reg))
  631. EMIT1(0x41);
  632. EMIT3(0xC1, add_1reg(0xC8, dst_reg), 8);
  633. /* emit 'movzwl eax, ax' */
  634. if (is_ereg(dst_reg))
  635. EMIT3(0x45, 0x0F, 0xB7);
  636. else
  637. EMIT2(0x0F, 0xB7);
  638. EMIT1(add_2reg(0xC0, dst_reg, dst_reg));
  639. break;
  640. case 32:
  641. /* emit 'bswap eax' to swap lower 4 bytes */
  642. if (is_ereg(dst_reg))
  643. EMIT2(0x41, 0x0F);
  644. else
  645. EMIT1(0x0F);
  646. EMIT1(add_1reg(0xC8, dst_reg));
  647. break;
  648. case 64:
  649. /* emit 'bswap rax' to swap 8 bytes */
  650. EMIT3(add_1mod(0x48, dst_reg), 0x0F,
  651. add_1reg(0xC8, dst_reg));
  652. break;
  653. }
  654. break;
  655. case BPF_ALU | BPF_END | BPF_FROM_LE:
  656. switch (imm32) {
  657. case 16:
  658. /* emit 'movzwl eax, ax' to zero extend 16-bit
  659. * into 64 bit
  660. */
  661. if (is_ereg(dst_reg))
  662. EMIT3(0x45, 0x0F, 0xB7);
  663. else
  664. EMIT2(0x0F, 0xB7);
  665. EMIT1(add_2reg(0xC0, dst_reg, dst_reg));
  666. break;
  667. case 32:
  668. /* emit 'mov eax, eax' to clear upper 32-bits */
  669. if (is_ereg(dst_reg))
  670. EMIT1(0x45);
  671. EMIT2(0x89, add_2reg(0xC0, dst_reg, dst_reg));
  672. break;
  673. case 64:
  674. /* nop */
  675. break;
  676. }
  677. break;
  678. /* ST: *(u8*)(dst_reg + off) = imm */
  679. case BPF_ST | BPF_MEM | BPF_B:
  680. if (is_ereg(dst_reg))
  681. EMIT2(0x41, 0xC6);
  682. else
  683. EMIT1(0xC6);
  684. goto st;
  685. case BPF_ST | BPF_MEM | BPF_H:
  686. if (is_ereg(dst_reg))
  687. EMIT3(0x66, 0x41, 0xC7);
  688. else
  689. EMIT2(0x66, 0xC7);
  690. goto st;
  691. case BPF_ST | BPF_MEM | BPF_W:
  692. if (is_ereg(dst_reg))
  693. EMIT2(0x41, 0xC7);
  694. else
  695. EMIT1(0xC7);
  696. goto st;
  697. case BPF_ST | BPF_MEM | BPF_DW:
  698. EMIT2(add_1mod(0x48, dst_reg), 0xC7);
  699. st: if (is_imm8(insn->off))
  700. EMIT2(add_1reg(0x40, dst_reg), insn->off);
  701. else
  702. EMIT1_off32(add_1reg(0x80, dst_reg), insn->off);
  703. EMIT(imm32, bpf_size_to_x86_bytes(BPF_SIZE(insn->code)));
  704. break;
  705. /* STX: *(u8*)(dst_reg + off) = src_reg */
  706. case BPF_STX | BPF_MEM | BPF_B:
  707. /* emit 'mov byte ptr [rax + off], al' */
  708. if (is_ereg(dst_reg) || is_ereg(src_reg) ||
  709. /* have to add extra byte for x86 SIL, DIL regs */
  710. src_reg == BPF_REG_1 || src_reg == BPF_REG_2)
  711. EMIT2(add_2mod(0x40, dst_reg, src_reg), 0x88);
  712. else
  713. EMIT1(0x88);
  714. goto stx;
  715. case BPF_STX | BPF_MEM | BPF_H:
  716. if (is_ereg(dst_reg) || is_ereg(src_reg))
  717. EMIT3(0x66, add_2mod(0x40, dst_reg, src_reg), 0x89);
  718. else
  719. EMIT2(0x66, 0x89);
  720. goto stx;
  721. case BPF_STX | BPF_MEM | BPF_W:
  722. if (is_ereg(dst_reg) || is_ereg(src_reg))
  723. EMIT2(add_2mod(0x40, dst_reg, src_reg), 0x89);
  724. else
  725. EMIT1(0x89);
  726. goto stx;
  727. case BPF_STX | BPF_MEM | BPF_DW:
  728. EMIT2(add_2mod(0x48, dst_reg, src_reg), 0x89);
  729. stx: if (is_imm8(insn->off))
  730. EMIT2(add_2reg(0x40, dst_reg, src_reg), insn->off);
  731. else
  732. EMIT1_off32(add_2reg(0x80, dst_reg, src_reg),
  733. insn->off);
  734. break;
  735. /* LDX: dst_reg = *(u8*)(src_reg + off) */
  736. case BPF_LDX | BPF_MEM | BPF_B:
  737. /* emit 'movzx rax, byte ptr [rax + off]' */
  738. EMIT3(add_2mod(0x48, src_reg, dst_reg), 0x0F, 0xB6);
  739. goto ldx;
  740. case BPF_LDX | BPF_MEM | BPF_H:
  741. /* emit 'movzx rax, word ptr [rax + off]' */
  742. EMIT3(add_2mod(0x48, src_reg, dst_reg), 0x0F, 0xB7);
  743. goto ldx;
  744. case BPF_LDX | BPF_MEM | BPF_W:
  745. /* emit 'mov eax, dword ptr [rax+0x14]' */
  746. if (is_ereg(dst_reg) || is_ereg(src_reg))
  747. EMIT2(add_2mod(0x40, src_reg, dst_reg), 0x8B);
  748. else
  749. EMIT1(0x8B);
  750. goto ldx;
  751. case BPF_LDX | BPF_MEM | BPF_DW:
  752. /* emit 'mov rax, qword ptr [rax+0x14]' */
  753. EMIT2(add_2mod(0x48, src_reg, dst_reg), 0x8B);
  754. ldx: /* if insn->off == 0 we can save one extra byte, but
  755. * special case of x86 r13 which always needs an offset
  756. * is not worth the hassle
  757. */
  758. if (is_imm8(insn->off))
  759. EMIT2(add_2reg(0x40, src_reg, dst_reg), insn->off);
  760. else
  761. EMIT1_off32(add_2reg(0x80, src_reg, dst_reg),
  762. insn->off);
  763. break;
  764. /* STX XADD: lock *(u32*)(dst_reg + off) += src_reg */
  765. case BPF_STX | BPF_XADD | BPF_W:
  766. /* emit 'lock add dword ptr [rax + off], eax' */
  767. if (is_ereg(dst_reg) || is_ereg(src_reg))
  768. EMIT3(0xF0, add_2mod(0x40, dst_reg, src_reg), 0x01);
  769. else
  770. EMIT2(0xF0, 0x01);
  771. goto xadd;
  772. case BPF_STX | BPF_XADD | BPF_DW:
  773. EMIT3(0xF0, add_2mod(0x48, dst_reg, src_reg), 0x01);
  774. xadd: if (is_imm8(insn->off))
  775. EMIT2(add_2reg(0x40, dst_reg, src_reg), insn->off);
  776. else
  777. EMIT1_off32(add_2reg(0x80, dst_reg, src_reg),
  778. insn->off);
  779. break;
  780. /* call */
  781. case BPF_JMP | BPF_CALL:
  782. func = (u8 *) __bpf_call_base + imm32;
  783. jmp_offset = func - (image + addrs[i]);
  784. if (seen_ld_abs) {
  785. reload_skb_data = bpf_helper_changes_pkt_data(func);
  786. if (reload_skb_data) {
  787. EMIT1(0x57); /* push %rdi */
  788. jmp_offset += 22; /* pop, mov, sub, mov */
  789. } else {
  790. EMIT2(0x41, 0x52); /* push %r10 */
  791. EMIT2(0x41, 0x51); /* push %r9 */
  792. /* need to adjust jmp offset, since
  793. * pop %r9, pop %r10 take 4 bytes after call insn
  794. */
  795. jmp_offset += 4;
  796. }
  797. }
  798. if (!imm32 || !is_simm32(jmp_offset)) {
  799. pr_err("unsupported bpf func %d addr %p image %p\n",
  800. imm32, func, image);
  801. return -EINVAL;
  802. }
  803. EMIT1_off32(0xE8, jmp_offset);
  804. if (seen_ld_abs) {
  805. if (reload_skb_data) {
  806. EMIT1(0x5F); /* pop %rdi */
  807. emit_load_skb_data_hlen(&prog);
  808. } else {
  809. EMIT2(0x41, 0x59); /* pop %r9 */
  810. EMIT2(0x41, 0x5A); /* pop %r10 */
  811. }
  812. }
  813. break;
  814. case BPF_JMP | BPF_TAIL_CALL:
  815. emit_bpf_tail_call(&prog);
  816. break;
  817. /* cond jump */
  818. case BPF_JMP | BPF_JEQ | BPF_X:
  819. case BPF_JMP | BPF_JNE | BPF_X:
  820. case BPF_JMP | BPF_JGT | BPF_X:
  821. case BPF_JMP | BPF_JLT | BPF_X:
  822. case BPF_JMP | BPF_JGE | BPF_X:
  823. case BPF_JMP | BPF_JLE | BPF_X:
  824. case BPF_JMP | BPF_JSGT | BPF_X:
  825. case BPF_JMP | BPF_JSLT | BPF_X:
  826. case BPF_JMP | BPF_JSGE | BPF_X:
  827. case BPF_JMP | BPF_JSLE | BPF_X:
  828. /* cmp dst_reg, src_reg */
  829. EMIT3(add_2mod(0x48, dst_reg, src_reg), 0x39,
  830. add_2reg(0xC0, dst_reg, src_reg));
  831. goto emit_cond_jmp;
  832. case BPF_JMP | BPF_JSET | BPF_X:
  833. /* test dst_reg, src_reg */
  834. EMIT3(add_2mod(0x48, dst_reg, src_reg), 0x85,
  835. add_2reg(0xC0, dst_reg, src_reg));
  836. goto emit_cond_jmp;
  837. case BPF_JMP | BPF_JSET | BPF_K:
  838. /* test dst_reg, imm32 */
  839. EMIT1(add_1mod(0x48, dst_reg));
  840. EMIT2_off32(0xF7, add_1reg(0xC0, dst_reg), imm32);
  841. goto emit_cond_jmp;
  842. case BPF_JMP | BPF_JEQ | BPF_K:
  843. case BPF_JMP | BPF_JNE | BPF_K:
  844. case BPF_JMP | BPF_JGT | BPF_K:
  845. case BPF_JMP | BPF_JLT | BPF_K:
  846. case BPF_JMP | BPF_JGE | BPF_K:
  847. case BPF_JMP | BPF_JLE | BPF_K:
  848. case BPF_JMP | BPF_JSGT | BPF_K:
  849. case BPF_JMP | BPF_JSLT | BPF_K:
  850. case BPF_JMP | BPF_JSGE | BPF_K:
  851. case BPF_JMP | BPF_JSLE | BPF_K:
  852. /* cmp dst_reg, imm8/32 */
  853. EMIT1(add_1mod(0x48, dst_reg));
  854. if (is_imm8(imm32))
  855. EMIT3(0x83, add_1reg(0xF8, dst_reg), imm32);
  856. else
  857. EMIT2_off32(0x81, add_1reg(0xF8, dst_reg), imm32);
  858. emit_cond_jmp: /* convert BPF opcode to x86 */
  859. switch (BPF_OP(insn->code)) {
  860. case BPF_JEQ:
  861. jmp_cond = X86_JE;
  862. break;
  863. case BPF_JSET:
  864. case BPF_JNE:
  865. jmp_cond = X86_JNE;
  866. break;
  867. case BPF_JGT:
  868. /* GT is unsigned '>', JA in x86 */
  869. jmp_cond = X86_JA;
  870. break;
  871. case BPF_JLT:
  872. /* LT is unsigned '<', JB in x86 */
  873. jmp_cond = X86_JB;
  874. break;
  875. case BPF_JGE:
  876. /* GE is unsigned '>=', JAE in x86 */
  877. jmp_cond = X86_JAE;
  878. break;
  879. case BPF_JLE:
  880. /* LE is unsigned '<=', JBE in x86 */
  881. jmp_cond = X86_JBE;
  882. break;
  883. case BPF_JSGT:
  884. /* signed '>', GT in x86 */
  885. jmp_cond = X86_JG;
  886. break;
  887. case BPF_JSLT:
  888. /* signed '<', LT in x86 */
  889. jmp_cond = X86_JL;
  890. break;
  891. case BPF_JSGE:
  892. /* signed '>=', GE in x86 */
  893. jmp_cond = X86_JGE;
  894. break;
  895. case BPF_JSLE:
  896. /* signed '<=', LE in x86 */
  897. jmp_cond = X86_JLE;
  898. break;
  899. default: /* to silence gcc warning */
  900. return -EFAULT;
  901. }
  902. jmp_offset = addrs[i + insn->off] - addrs[i];
  903. if (is_imm8(jmp_offset)) {
  904. EMIT2(jmp_cond, jmp_offset);
  905. } else if (is_simm32(jmp_offset)) {
  906. EMIT2_off32(0x0F, jmp_cond + 0x10, jmp_offset);
  907. } else {
  908. pr_err("cond_jmp gen bug %llx\n", jmp_offset);
  909. return -EFAULT;
  910. }
  911. break;
  912. case BPF_JMP | BPF_JA:
  913. if (insn->off == -1)
  914. /* -1 jmp instructions will always jump
  915. * backwards two bytes. Explicitly handling
  916. * this case avoids wasting too many passes
  917. * when there are long sequences of replaced
  918. * dead code.
  919. */
  920. jmp_offset = -2;
  921. else
  922. jmp_offset = addrs[i + insn->off] - addrs[i];
  923. if (!jmp_offset)
  924. /* optimize out nop jumps */
  925. break;
  926. emit_jmp:
  927. if (is_imm8(jmp_offset)) {
  928. EMIT2(0xEB, jmp_offset);
  929. } else if (is_simm32(jmp_offset)) {
  930. EMIT1_off32(0xE9, jmp_offset);
  931. } else {
  932. pr_err("jmp gen bug %llx\n", jmp_offset);
  933. return -EFAULT;
  934. }
  935. break;
  936. case BPF_LD | BPF_IND | BPF_W:
  937. func = sk_load_word;
  938. goto common_load;
  939. case BPF_LD | BPF_ABS | BPF_W:
  940. func = CHOOSE_LOAD_FUNC(imm32, sk_load_word);
  941. common_load:
  942. ctx->seen_ld_abs = seen_ld_abs = true;
  943. jmp_offset = func - (image + addrs[i]);
  944. if (!func || !is_simm32(jmp_offset)) {
  945. pr_err("unsupported bpf func %d addr %p image %p\n",
  946. imm32, func, image);
  947. return -EINVAL;
  948. }
  949. if (BPF_MODE(insn->code) == BPF_ABS) {
  950. /* mov %esi, imm32 */
  951. EMIT1_off32(0xBE, imm32);
  952. } else {
  953. /* mov %rsi, src_reg */
  954. EMIT_mov(BPF_REG_2, src_reg);
  955. if (imm32) {
  956. if (is_imm8(imm32))
  957. /* add %esi, imm8 */
  958. EMIT3(0x83, 0xC6, imm32);
  959. else
  960. /* add %esi, imm32 */
  961. EMIT2_off32(0x81, 0xC6, imm32);
  962. }
  963. }
  964. /* skb pointer is in R6 (%rbx), it will be copied into
  965. * %rdi if skb_copy_bits() call is necessary.
  966. * sk_load_* helpers also use %r10 and %r9d.
  967. * See bpf_jit.S
  968. */
  969. if (seen_ax_reg)
  970. /* r10 = skb->data, mov %r10, off32(%rbx) */
  971. EMIT3_off32(0x4c, 0x8b, 0x93,
  972. offsetof(struct sk_buff, data));
  973. EMIT1_off32(0xE8, jmp_offset); /* call */
  974. break;
  975. case BPF_LD | BPF_IND | BPF_H:
  976. func = sk_load_half;
  977. goto common_load;
  978. case BPF_LD | BPF_ABS | BPF_H:
  979. func = CHOOSE_LOAD_FUNC(imm32, sk_load_half);
  980. goto common_load;
  981. case BPF_LD | BPF_IND | BPF_B:
  982. func = sk_load_byte;
  983. goto common_load;
  984. case BPF_LD | BPF_ABS | BPF_B:
  985. func = CHOOSE_LOAD_FUNC(imm32, sk_load_byte);
  986. goto common_load;
  987. case BPF_JMP | BPF_EXIT:
  988. if (seen_exit) {
  989. jmp_offset = ctx->cleanup_addr - addrs[i];
  990. goto emit_jmp;
  991. }
  992. seen_exit = true;
  993. /* update cleanup_addr */
  994. ctx->cleanup_addr = proglen;
  995. /* mov rbx, qword ptr [rbp+0] */
  996. EMIT4(0x48, 0x8B, 0x5D, 0);
  997. /* mov r13, qword ptr [rbp+8] */
  998. EMIT4(0x4C, 0x8B, 0x6D, 8);
  999. /* mov r14, qword ptr [rbp+16] */
  1000. EMIT4(0x4C, 0x8B, 0x75, 16);
  1001. /* mov r15, qword ptr [rbp+24] */
  1002. EMIT4(0x4C, 0x8B, 0x7D, 24);
  1003. /* add rbp, AUX_STACK_SPACE */
  1004. EMIT4(0x48, 0x83, 0xC5, AUX_STACK_SPACE);
  1005. EMIT1(0xC9); /* leave */
  1006. EMIT1(0xC3); /* ret */
  1007. break;
  1008. default:
  1009. /* By design x64 JIT should support all BPF instructions
  1010. * This error will be seen if new instruction was added
  1011. * to interpreter, but not to JIT
  1012. * or if there is junk in bpf_prog
  1013. */
  1014. pr_err("bpf_jit: unknown opcode %02x\n", insn->code);
  1015. return -EINVAL;
  1016. }
  1017. ilen = prog - temp;
  1018. if (ilen > BPF_MAX_INSN_SIZE) {
  1019. pr_err("bpf_jit: fatal insn size error\n");
  1020. return -EFAULT;
  1021. }
  1022. if (image) {
  1023. if (unlikely(proglen + ilen > oldproglen)) {
  1024. pr_err("bpf_jit: fatal error\n");
  1025. return -EFAULT;
  1026. }
  1027. memcpy(image + proglen, temp, ilen);
  1028. }
  1029. proglen += ilen;
  1030. addrs[i] = proglen;
  1031. prog = temp;
  1032. }
  1033. return proglen;
  1034. }
  1035. struct x64_jit_data {
  1036. struct bpf_binary_header *header;
  1037. int *addrs;
  1038. u8 *image;
  1039. int proglen;
  1040. struct jit_context ctx;
  1041. };
  1042. struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
  1043. {
  1044. struct bpf_binary_header *header = NULL;
  1045. struct bpf_prog *tmp, *orig_prog = prog;
  1046. struct x64_jit_data *jit_data;
  1047. int proglen, oldproglen = 0;
  1048. struct jit_context ctx = {};
  1049. bool tmp_blinded = false;
  1050. bool extra_pass = false;
  1051. u8 *image = NULL;
  1052. int *addrs;
  1053. int pass;
  1054. int i;
  1055. if (!prog->jit_requested)
  1056. return orig_prog;
  1057. tmp = bpf_jit_blind_constants(prog);
  1058. /* If blinding was requested and we failed during blinding,
  1059. * we must fall back to the interpreter.
  1060. */
  1061. if (IS_ERR(tmp))
  1062. return orig_prog;
  1063. if (tmp != prog) {
  1064. tmp_blinded = true;
  1065. prog = tmp;
  1066. }
  1067. jit_data = prog->aux->jit_data;
  1068. if (!jit_data) {
  1069. jit_data = kzalloc(sizeof(*jit_data), GFP_KERNEL);
  1070. if (!jit_data) {
  1071. prog = orig_prog;
  1072. goto out;
  1073. }
  1074. prog->aux->jit_data = jit_data;
  1075. }
  1076. addrs = jit_data->addrs;
  1077. if (addrs) {
  1078. ctx = jit_data->ctx;
  1079. oldproglen = jit_data->proglen;
  1080. image = jit_data->image;
  1081. header = jit_data->header;
  1082. extra_pass = true;
  1083. goto skip_init_addrs;
  1084. }
  1085. addrs = kmalloc(prog->len * sizeof(*addrs), GFP_KERNEL);
  1086. if (!addrs) {
  1087. prog = orig_prog;
  1088. goto out_addrs;
  1089. }
  1090. /* Before first pass, make a rough estimation of addrs[]
  1091. * each bpf instruction is translated to less than 64 bytes
  1092. */
  1093. for (proglen = 0, i = 0; i < prog->len; i++) {
  1094. proglen += 64;
  1095. addrs[i] = proglen;
  1096. }
  1097. ctx.cleanup_addr = proglen;
  1098. skip_init_addrs:
  1099. /* JITed image shrinks with every pass and the loop iterates
  1100. * until the image stops shrinking. Very large bpf programs
  1101. * may converge on the last pass. In such case do one more
  1102. * pass to emit the final image
  1103. */
  1104. for (pass = 0; pass < 20 || image; pass++) {
  1105. proglen = do_jit(prog, addrs, image, oldproglen, &ctx);
  1106. if (proglen <= 0) {
  1107. image = NULL;
  1108. if (header)
  1109. bpf_jit_binary_free(header);
  1110. prog = orig_prog;
  1111. goto out_addrs;
  1112. }
  1113. if (image) {
  1114. if (proglen != oldproglen) {
  1115. pr_err("bpf_jit: proglen=%d != oldproglen=%d\n",
  1116. proglen, oldproglen);
  1117. prog = orig_prog;
  1118. goto out_addrs;
  1119. }
  1120. break;
  1121. }
  1122. if (proglen == oldproglen) {
  1123. header = bpf_jit_binary_alloc(proglen, &image,
  1124. 1, jit_fill_hole);
  1125. if (!header) {
  1126. prog = orig_prog;
  1127. goto out_addrs;
  1128. }
  1129. }
  1130. oldproglen = proglen;
  1131. cond_resched();
  1132. }
  1133. if (bpf_jit_enable > 1)
  1134. bpf_jit_dump(prog->len, proglen, pass + 1, image);
  1135. if (image) {
  1136. if (!prog->is_func || extra_pass) {
  1137. bpf_jit_binary_lock_ro(header);
  1138. } else {
  1139. jit_data->addrs = addrs;
  1140. jit_data->ctx = ctx;
  1141. jit_data->proglen = proglen;
  1142. jit_data->image = image;
  1143. jit_data->header = header;
  1144. }
  1145. prog->bpf_func = (void *)image;
  1146. prog->jited = 1;
  1147. prog->jited_len = proglen;
  1148. } else {
  1149. prog = orig_prog;
  1150. }
  1151. if (!prog->is_func || extra_pass) {
  1152. out_addrs:
  1153. kfree(addrs);
  1154. kfree(jit_data);
  1155. prog->aux->jit_data = NULL;
  1156. }
  1157. out:
  1158. if (tmp_blinded)
  1159. bpf_jit_prog_release_other(prog, prog == orig_prog ?
  1160. tmp : orig_prog);
  1161. return prog;
  1162. }