intel_pstate.c 22 KB

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  1. /*
  2. * intel_pstate.c: Native P state management for Intel processors
  3. *
  4. * (C) Copyright 2012 Intel Corporation
  5. * Author: Dirk Brandewie <dirk.j.brandewie@intel.com>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; version 2
  10. * of the License.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/kernel_stat.h>
  14. #include <linux/module.h>
  15. #include <linux/ktime.h>
  16. #include <linux/hrtimer.h>
  17. #include <linux/tick.h>
  18. #include <linux/slab.h>
  19. #include <linux/sched.h>
  20. #include <linux/list.h>
  21. #include <linux/cpu.h>
  22. #include <linux/cpufreq.h>
  23. #include <linux/sysfs.h>
  24. #include <linux/types.h>
  25. #include <linux/fs.h>
  26. #include <linux/debugfs.h>
  27. #include <linux/acpi.h>
  28. #include <trace/events/power.h>
  29. #include <asm/div64.h>
  30. #include <asm/msr.h>
  31. #include <asm/cpu_device_id.h>
  32. #define SAMPLE_COUNT 3
  33. #define BYT_RATIOS 0x66a
  34. #define BYT_VIDS 0x66b
  35. #define FRAC_BITS 8
  36. #define int_tofp(X) ((int64_t)(X) << FRAC_BITS)
  37. #define fp_toint(X) ((X) >> FRAC_BITS)
  38. static inline int32_t mul_fp(int32_t x, int32_t y)
  39. {
  40. return ((int64_t)x * (int64_t)y) >> FRAC_BITS;
  41. }
  42. static inline int32_t div_fp(int32_t x, int32_t y)
  43. {
  44. return div_s64((int64_t)x << FRAC_BITS, (int64_t)y);
  45. }
  46. static u64 energy_divisor;
  47. struct sample {
  48. int32_t core_pct_busy;
  49. u64 aperf;
  50. u64 mperf;
  51. unsigned long long tsc;
  52. int freq;
  53. };
  54. struct pstate_data {
  55. int current_pstate;
  56. int min_pstate;
  57. int max_pstate;
  58. int turbo_pstate;
  59. };
  60. struct vid_data {
  61. int32_t min;
  62. int32_t max;
  63. int32_t ratio;
  64. };
  65. struct _pid {
  66. int setpoint;
  67. int32_t integral;
  68. int32_t p_gain;
  69. int32_t i_gain;
  70. int32_t d_gain;
  71. int deadband;
  72. int32_t last_err;
  73. };
  74. struct cpudata {
  75. int cpu;
  76. char name[64];
  77. struct timer_list timer;
  78. struct pstate_data pstate;
  79. struct vid_data vid;
  80. struct _pid pid;
  81. u64 prev_aperf;
  82. u64 prev_mperf;
  83. unsigned long long prev_tsc;
  84. int sample_ptr;
  85. struct sample samples[SAMPLE_COUNT];
  86. };
  87. static struct cpudata **all_cpu_data;
  88. struct pstate_adjust_policy {
  89. int sample_rate_ms;
  90. int deadband;
  91. int setpoint;
  92. int p_gain_pct;
  93. int d_gain_pct;
  94. int i_gain_pct;
  95. };
  96. struct pstate_funcs {
  97. int (*get_max)(void);
  98. int (*get_min)(void);
  99. int (*get_turbo)(void);
  100. void (*set)(struct cpudata*, int pstate);
  101. void (*get_vid)(struct cpudata *);
  102. };
  103. struct cpu_defaults {
  104. struct pstate_adjust_policy pid_policy;
  105. struct pstate_funcs funcs;
  106. };
  107. static struct pstate_adjust_policy pid_params;
  108. static struct pstate_funcs pstate_funcs;
  109. struct perf_limits {
  110. int no_turbo;
  111. int max_perf_pct;
  112. int min_perf_pct;
  113. int32_t max_perf;
  114. int32_t min_perf;
  115. int max_policy_pct;
  116. int max_sysfs_pct;
  117. };
  118. static struct perf_limits limits = {
  119. .no_turbo = 0,
  120. .max_perf_pct = 100,
  121. .max_perf = int_tofp(1),
  122. .min_perf_pct = 0,
  123. .min_perf = 0,
  124. .max_policy_pct = 100,
  125. .max_sysfs_pct = 100,
  126. };
  127. static inline void pid_reset(struct _pid *pid, int setpoint, int busy,
  128. int deadband, int integral) {
  129. pid->setpoint = setpoint;
  130. pid->deadband = deadband;
  131. pid->integral = int_tofp(integral);
  132. pid->last_err = setpoint - busy;
  133. }
  134. static inline void pid_p_gain_set(struct _pid *pid, int percent)
  135. {
  136. pid->p_gain = div_fp(int_tofp(percent), int_tofp(100));
  137. }
  138. static inline void pid_i_gain_set(struct _pid *pid, int percent)
  139. {
  140. pid->i_gain = div_fp(int_tofp(percent), int_tofp(100));
  141. }
  142. static inline void pid_d_gain_set(struct _pid *pid, int percent)
  143. {
  144. pid->d_gain = div_fp(int_tofp(percent), int_tofp(100));
  145. }
  146. static signed int pid_calc(struct _pid *pid, int32_t busy)
  147. {
  148. signed int result;
  149. int32_t pterm, dterm, fp_error;
  150. int32_t integral_limit;
  151. fp_error = int_tofp(pid->setpoint) - busy;
  152. if (abs(fp_error) <= int_tofp(pid->deadband))
  153. return 0;
  154. pterm = mul_fp(pid->p_gain, fp_error);
  155. pid->integral += fp_error;
  156. /* limit the integral term */
  157. integral_limit = int_tofp(30);
  158. if (pid->integral > integral_limit)
  159. pid->integral = integral_limit;
  160. if (pid->integral < -integral_limit)
  161. pid->integral = -integral_limit;
  162. dterm = mul_fp(pid->d_gain, fp_error - pid->last_err);
  163. pid->last_err = fp_error;
  164. result = pterm + mul_fp(pid->integral, pid->i_gain) + dterm;
  165. return (signed int)fp_toint(result);
  166. }
  167. static inline void intel_pstate_busy_pid_reset(struct cpudata *cpu)
  168. {
  169. pid_p_gain_set(&cpu->pid, pid_params.p_gain_pct);
  170. pid_d_gain_set(&cpu->pid, pid_params.d_gain_pct);
  171. pid_i_gain_set(&cpu->pid, pid_params.i_gain_pct);
  172. pid_reset(&cpu->pid,
  173. pid_params.setpoint,
  174. 100,
  175. pid_params.deadband,
  176. 0);
  177. }
  178. static inline void intel_pstate_reset_all_pid(void)
  179. {
  180. unsigned int cpu;
  181. for_each_online_cpu(cpu) {
  182. if (all_cpu_data[cpu])
  183. intel_pstate_busy_pid_reset(all_cpu_data[cpu]);
  184. }
  185. }
  186. /************************** debugfs begin ************************/
  187. static int pid_param_set(void *data, u64 val)
  188. {
  189. *(u32 *)data = val;
  190. intel_pstate_reset_all_pid();
  191. return 0;
  192. }
  193. static int pid_param_get(void *data, u64 *val)
  194. {
  195. *val = *(u32 *)data;
  196. return 0;
  197. }
  198. DEFINE_SIMPLE_ATTRIBUTE(fops_pid_param, pid_param_get,
  199. pid_param_set, "%llu\n");
  200. struct pid_param {
  201. char *name;
  202. void *value;
  203. };
  204. static struct pid_param pid_files[] = {
  205. {"sample_rate_ms", &pid_params.sample_rate_ms},
  206. {"d_gain_pct", &pid_params.d_gain_pct},
  207. {"i_gain_pct", &pid_params.i_gain_pct},
  208. {"deadband", &pid_params.deadband},
  209. {"setpoint", &pid_params.setpoint},
  210. {"p_gain_pct", &pid_params.p_gain_pct},
  211. {NULL, NULL}
  212. };
  213. static struct dentry *debugfs_parent;
  214. static void intel_pstate_debug_expose_params(void)
  215. {
  216. int i = 0;
  217. debugfs_parent = debugfs_create_dir("pstate_snb", NULL);
  218. if (IS_ERR_OR_NULL(debugfs_parent))
  219. return;
  220. while (pid_files[i].name) {
  221. debugfs_create_file(pid_files[i].name, 0660,
  222. debugfs_parent, pid_files[i].value,
  223. &fops_pid_param);
  224. i++;
  225. }
  226. }
  227. /************************** debugfs end ************************/
  228. /************************** sysfs begin ************************/
  229. #define show_one(file_name, object) \
  230. static ssize_t show_##file_name \
  231. (struct kobject *kobj, struct attribute *attr, char *buf) \
  232. { \
  233. return sprintf(buf, "%u\n", limits.object); \
  234. }
  235. static ssize_t store_no_turbo(struct kobject *a, struct attribute *b,
  236. const char *buf, size_t count)
  237. {
  238. unsigned int input;
  239. int ret;
  240. ret = sscanf(buf, "%u", &input);
  241. if (ret != 1)
  242. return -EINVAL;
  243. limits.no_turbo = clamp_t(int, input, 0 , 1);
  244. return count;
  245. }
  246. static ssize_t store_max_perf_pct(struct kobject *a, struct attribute *b,
  247. const char *buf, size_t count)
  248. {
  249. unsigned int input;
  250. int ret;
  251. ret = sscanf(buf, "%u", &input);
  252. if (ret != 1)
  253. return -EINVAL;
  254. limits.max_sysfs_pct = clamp_t(int, input, 0 , 100);
  255. limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct);
  256. limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100));
  257. return count;
  258. }
  259. static ssize_t store_min_perf_pct(struct kobject *a, struct attribute *b,
  260. const char *buf, size_t count)
  261. {
  262. unsigned int input;
  263. int ret;
  264. ret = sscanf(buf, "%u", &input);
  265. if (ret != 1)
  266. return -EINVAL;
  267. limits.min_perf_pct = clamp_t(int, input, 0 , 100);
  268. limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100));
  269. return count;
  270. }
  271. show_one(no_turbo, no_turbo);
  272. show_one(max_perf_pct, max_perf_pct);
  273. show_one(min_perf_pct, min_perf_pct);
  274. define_one_global_rw(no_turbo);
  275. define_one_global_rw(max_perf_pct);
  276. define_one_global_rw(min_perf_pct);
  277. static struct attribute *intel_pstate_attributes[] = {
  278. &no_turbo.attr,
  279. &max_perf_pct.attr,
  280. &min_perf_pct.attr,
  281. NULL
  282. };
  283. static struct attribute_group intel_pstate_attr_group = {
  284. .attrs = intel_pstate_attributes,
  285. };
  286. static struct kobject *intel_pstate_kobject;
  287. static void intel_pstate_sysfs_expose_params(void)
  288. {
  289. int rc;
  290. intel_pstate_kobject = kobject_create_and_add("intel_pstate",
  291. &cpu_subsys.dev_root->kobj);
  292. BUG_ON(!intel_pstate_kobject);
  293. rc = sysfs_create_group(intel_pstate_kobject,
  294. &intel_pstate_attr_group);
  295. BUG_ON(rc);
  296. }
  297. /************************** sysfs end ************************/
  298. static int byt_get_min_pstate(void)
  299. {
  300. u64 value;
  301. rdmsrl(BYT_RATIOS, value);
  302. return value & 0xFF;
  303. }
  304. static int byt_get_max_pstate(void)
  305. {
  306. u64 value;
  307. rdmsrl(BYT_RATIOS, value);
  308. return (value >> 16) & 0xFF;
  309. }
  310. static void byt_set_pstate(struct cpudata *cpudata, int pstate)
  311. {
  312. u64 val;
  313. int32_t vid_fp;
  314. u32 vid;
  315. val = pstate << 8;
  316. if (limits.no_turbo)
  317. val |= (u64)1 << 32;
  318. vid_fp = cpudata->vid.min + mul_fp(
  319. int_tofp(pstate - cpudata->pstate.min_pstate),
  320. cpudata->vid.ratio);
  321. vid_fp = clamp_t(int32_t, vid_fp, cpudata->vid.min, cpudata->vid.max);
  322. vid = fp_toint(vid_fp);
  323. val |= vid;
  324. wrmsrl(MSR_IA32_PERF_CTL, val);
  325. }
  326. static void byt_get_vid(struct cpudata *cpudata)
  327. {
  328. u64 value;
  329. rdmsrl(BYT_VIDS, value);
  330. cpudata->vid.min = int_tofp((value >> 8) & 0x7f);
  331. cpudata->vid.max = int_tofp((value >> 16) & 0x7f);
  332. cpudata->vid.ratio = div_fp(
  333. cpudata->vid.max - cpudata->vid.min,
  334. int_tofp(cpudata->pstate.max_pstate -
  335. cpudata->pstate.min_pstate));
  336. }
  337. static int core_get_min_pstate(void)
  338. {
  339. u64 value;
  340. rdmsrl(MSR_PLATFORM_INFO, value);
  341. return (value >> 40) & 0xFF;
  342. }
  343. static int core_get_max_pstate(void)
  344. {
  345. u64 value;
  346. rdmsrl(MSR_PLATFORM_INFO, value);
  347. return (value >> 8) & 0xFF;
  348. }
  349. static int core_get_turbo_pstate(void)
  350. {
  351. u64 value;
  352. int nont, ret;
  353. rdmsrl(MSR_NHM_TURBO_RATIO_LIMIT, value);
  354. nont = core_get_max_pstate();
  355. ret = ((value) & 255);
  356. if (ret <= nont)
  357. ret = nont;
  358. return ret;
  359. }
  360. static void core_set_pstate(struct cpudata *cpudata, int pstate)
  361. {
  362. u64 val;
  363. val = pstate << 8;
  364. if (limits.no_turbo)
  365. val |= (u64)1 << 32;
  366. wrmsrl(MSR_IA32_PERF_CTL, val);
  367. }
  368. static struct cpu_defaults core_params = {
  369. .pid_policy = {
  370. .sample_rate_ms = 10,
  371. .deadband = 0,
  372. .setpoint = 97,
  373. .p_gain_pct = 20,
  374. .d_gain_pct = 0,
  375. .i_gain_pct = 0,
  376. },
  377. .funcs = {
  378. .get_max = core_get_max_pstate,
  379. .get_min = core_get_min_pstate,
  380. .get_turbo = core_get_turbo_pstate,
  381. .set = core_set_pstate,
  382. },
  383. };
  384. static struct cpu_defaults byt_params = {
  385. .pid_policy = {
  386. .sample_rate_ms = 10,
  387. .deadband = 0,
  388. .setpoint = 97,
  389. .p_gain_pct = 14,
  390. .d_gain_pct = 0,
  391. .i_gain_pct = 4,
  392. },
  393. .funcs = {
  394. .get_max = byt_get_max_pstate,
  395. .get_min = byt_get_min_pstate,
  396. .get_turbo = byt_get_max_pstate,
  397. .set = byt_set_pstate,
  398. .get_vid = byt_get_vid,
  399. },
  400. };
  401. static void intel_pstate_get_min_max(struct cpudata *cpu, int *min, int *max)
  402. {
  403. int max_perf = cpu->pstate.turbo_pstate;
  404. int max_perf_adj;
  405. int min_perf;
  406. if (limits.no_turbo)
  407. max_perf = cpu->pstate.max_pstate;
  408. max_perf_adj = fp_toint(mul_fp(int_tofp(max_perf), limits.max_perf));
  409. *max = clamp_t(int, max_perf_adj,
  410. cpu->pstate.min_pstate, cpu->pstate.turbo_pstate);
  411. min_perf = fp_toint(mul_fp(int_tofp(max_perf), limits.min_perf));
  412. *min = clamp_t(int, min_perf,
  413. cpu->pstate.min_pstate, max_perf);
  414. }
  415. static void intel_pstate_set_pstate(struct cpudata *cpu, int pstate)
  416. {
  417. int max_perf, min_perf;
  418. intel_pstate_get_min_max(cpu, &min_perf, &max_perf);
  419. pstate = clamp_t(int, pstate, min_perf, max_perf);
  420. if (pstate == cpu->pstate.current_pstate)
  421. return;
  422. trace_cpu_frequency(pstate * 100000, cpu->cpu);
  423. cpu->pstate.current_pstate = pstate;
  424. pstate_funcs.set(cpu, pstate);
  425. }
  426. static inline void intel_pstate_pstate_increase(struct cpudata *cpu, int steps)
  427. {
  428. int target;
  429. target = cpu->pstate.current_pstate + steps;
  430. intel_pstate_set_pstate(cpu, target);
  431. }
  432. static inline void intel_pstate_pstate_decrease(struct cpudata *cpu, int steps)
  433. {
  434. int target;
  435. target = cpu->pstate.current_pstate - steps;
  436. intel_pstate_set_pstate(cpu, target);
  437. }
  438. static void intel_pstate_get_cpu_pstates(struct cpudata *cpu)
  439. {
  440. sprintf(cpu->name, "Intel 2nd generation core");
  441. cpu->pstate.min_pstate = pstate_funcs.get_min();
  442. cpu->pstate.max_pstate = pstate_funcs.get_max();
  443. cpu->pstate.turbo_pstate = pstate_funcs.get_turbo();
  444. if (pstate_funcs.get_vid)
  445. pstate_funcs.get_vid(cpu);
  446. /*
  447. * goto max pstate so we don't slow up boot if we are built-in if we are
  448. * a module we will take care of it during normal operation
  449. */
  450. intel_pstate_set_pstate(cpu, cpu->pstate.max_pstate);
  451. }
  452. static inline void intel_pstate_calc_busy(struct cpudata *cpu,
  453. struct sample *sample)
  454. {
  455. u64 core_pct;
  456. u64 c0_pct;
  457. core_pct = div64_u64(sample->aperf * 100, sample->mperf);
  458. c0_pct = div64_u64(sample->mperf * 100, sample->tsc);
  459. sample->freq = fp_toint(
  460. mul_fp(int_tofp(cpu->pstate.max_pstate),
  461. int_tofp(core_pct * 1000)));
  462. sample->core_pct_busy = mul_fp(int_tofp(core_pct),
  463. div_fp(int_tofp(c0_pct + 1), int_tofp(100)));
  464. }
  465. static inline void intel_pstate_sample(struct cpudata *cpu)
  466. {
  467. u64 aperf, mperf;
  468. unsigned long long tsc;
  469. rdmsrl(MSR_IA32_APERF, aperf);
  470. rdmsrl(MSR_IA32_MPERF, mperf);
  471. tsc = native_read_tsc();
  472. cpu->sample_ptr = (cpu->sample_ptr + 1) % SAMPLE_COUNT;
  473. cpu->samples[cpu->sample_ptr].aperf = aperf;
  474. cpu->samples[cpu->sample_ptr].mperf = mperf;
  475. cpu->samples[cpu->sample_ptr].tsc = tsc;
  476. cpu->samples[cpu->sample_ptr].aperf -= cpu->prev_aperf;
  477. cpu->samples[cpu->sample_ptr].mperf -= cpu->prev_mperf;
  478. cpu->samples[cpu->sample_ptr].tsc -= cpu->prev_tsc;
  479. intel_pstate_calc_busy(cpu, &cpu->samples[cpu->sample_ptr]);
  480. cpu->prev_aperf = aperf;
  481. cpu->prev_mperf = mperf;
  482. cpu->prev_tsc = tsc;
  483. }
  484. static inline void intel_pstate_set_sample_time(struct cpudata *cpu)
  485. {
  486. int sample_time, delay;
  487. sample_time = pid_params.sample_rate_ms;
  488. delay = msecs_to_jiffies(sample_time);
  489. mod_timer_pinned(&cpu->timer, jiffies + delay);
  490. }
  491. static inline int32_t intel_pstate_get_scaled_busy(struct cpudata *cpu)
  492. {
  493. int32_t core_busy, max_pstate, current_pstate;
  494. core_busy = cpu->samples[cpu->sample_ptr].core_pct_busy;
  495. max_pstate = int_tofp(cpu->pstate.max_pstate);
  496. current_pstate = int_tofp(cpu->pstate.current_pstate);
  497. return mul_fp(core_busy, div_fp(max_pstate, current_pstate));
  498. }
  499. static inline void intel_pstate_adjust_busy_pstate(struct cpudata *cpu)
  500. {
  501. int32_t busy_scaled;
  502. struct _pid *pid;
  503. signed int ctl = 0;
  504. int steps;
  505. pid = &cpu->pid;
  506. busy_scaled = intel_pstate_get_scaled_busy(cpu);
  507. ctl = pid_calc(pid, busy_scaled);
  508. steps = abs(ctl);
  509. if (ctl < 0)
  510. intel_pstate_pstate_increase(cpu, steps);
  511. else
  512. intel_pstate_pstate_decrease(cpu, steps);
  513. }
  514. static void intel_pstate_timer_func(unsigned long __data)
  515. {
  516. struct cpudata *cpu = (struct cpudata *) __data;
  517. struct sample *sample;
  518. u64 energy;
  519. intel_pstate_sample(cpu);
  520. sample = &cpu->samples[cpu->sample_ptr];
  521. rdmsrl(MSR_PKG_ENERGY_STATUS, energy);
  522. intel_pstate_adjust_busy_pstate(cpu);
  523. trace_pstate_sample(fp_toint(sample->core_pct_busy),
  524. fp_toint(intel_pstate_get_scaled_busy(cpu)),
  525. cpu->pstate.current_pstate,
  526. sample->mperf,
  527. sample->aperf,
  528. div64_u64(energy, energy_divisor),
  529. sample->freq);
  530. intel_pstate_set_sample_time(cpu);
  531. }
  532. #define ICPU(model, policy) \
  533. { X86_VENDOR_INTEL, 6, model, X86_FEATURE_APERFMPERF,\
  534. (unsigned long)&policy }
  535. static const struct x86_cpu_id intel_pstate_cpu_ids[] = {
  536. ICPU(0x2a, core_params),
  537. ICPU(0x2d, core_params),
  538. ICPU(0x37, byt_params),
  539. ICPU(0x3a, core_params),
  540. ICPU(0x3c, core_params),
  541. ICPU(0x3e, core_params),
  542. ICPU(0x3f, core_params),
  543. ICPU(0x45, core_params),
  544. ICPU(0x46, core_params),
  545. {}
  546. };
  547. MODULE_DEVICE_TABLE(x86cpu, intel_pstate_cpu_ids);
  548. static int intel_pstate_init_cpu(unsigned int cpunum)
  549. {
  550. const struct x86_cpu_id *id;
  551. struct cpudata *cpu;
  552. id = x86_match_cpu(intel_pstate_cpu_ids);
  553. if (!id)
  554. return -ENODEV;
  555. all_cpu_data[cpunum] = kzalloc(sizeof(struct cpudata), GFP_KERNEL);
  556. if (!all_cpu_data[cpunum])
  557. return -ENOMEM;
  558. cpu = all_cpu_data[cpunum];
  559. intel_pstate_get_cpu_pstates(cpu);
  560. if (!cpu->pstate.current_pstate) {
  561. all_cpu_data[cpunum] = NULL;
  562. kfree(cpu);
  563. return -ENODATA;
  564. }
  565. cpu->cpu = cpunum;
  566. init_timer_deferrable(&cpu->timer);
  567. cpu->timer.function = intel_pstate_timer_func;
  568. cpu->timer.data =
  569. (unsigned long)cpu;
  570. cpu->timer.expires = jiffies + HZ/100;
  571. intel_pstate_busy_pid_reset(cpu);
  572. intel_pstate_sample(cpu);
  573. intel_pstate_set_pstate(cpu, cpu->pstate.max_pstate);
  574. add_timer_on(&cpu->timer, cpunum);
  575. pr_info("Intel pstate controlling: cpu %d\n", cpunum);
  576. return 0;
  577. }
  578. static unsigned int intel_pstate_get(unsigned int cpu_num)
  579. {
  580. struct sample *sample;
  581. struct cpudata *cpu;
  582. cpu = all_cpu_data[cpu_num];
  583. if (!cpu)
  584. return 0;
  585. sample = &cpu->samples[cpu->sample_ptr];
  586. return sample->freq;
  587. }
  588. static int intel_pstate_set_policy(struct cpufreq_policy *policy)
  589. {
  590. struct cpudata *cpu;
  591. cpu = all_cpu_data[policy->cpu];
  592. if (!policy->cpuinfo.max_freq)
  593. return -ENODEV;
  594. if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) {
  595. limits.min_perf_pct = 100;
  596. limits.min_perf = int_tofp(1);
  597. limits.max_perf_pct = 100;
  598. limits.max_perf = int_tofp(1);
  599. limits.no_turbo = 0;
  600. return 0;
  601. }
  602. limits.min_perf_pct = (policy->min * 100) / policy->cpuinfo.max_freq;
  603. limits.min_perf_pct = clamp_t(int, limits.min_perf_pct, 0 , 100);
  604. limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100));
  605. limits.max_policy_pct = policy->max * 100 / policy->cpuinfo.max_freq;
  606. limits.max_policy_pct = clamp_t(int, limits.max_policy_pct, 0 , 100);
  607. limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct);
  608. limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100));
  609. return 0;
  610. }
  611. static int intel_pstate_verify_policy(struct cpufreq_policy *policy)
  612. {
  613. cpufreq_verify_within_cpu_limits(policy);
  614. if ((policy->policy != CPUFREQ_POLICY_POWERSAVE) &&
  615. (policy->policy != CPUFREQ_POLICY_PERFORMANCE))
  616. return -EINVAL;
  617. return 0;
  618. }
  619. static int intel_pstate_cpu_exit(struct cpufreq_policy *policy)
  620. {
  621. int cpu = policy->cpu;
  622. del_timer(&all_cpu_data[cpu]->timer);
  623. kfree(all_cpu_data[cpu]);
  624. all_cpu_data[cpu] = NULL;
  625. return 0;
  626. }
  627. static int intel_pstate_cpu_init(struct cpufreq_policy *policy)
  628. {
  629. struct cpudata *cpu;
  630. int rc;
  631. rc = intel_pstate_init_cpu(policy->cpu);
  632. if (rc)
  633. return rc;
  634. cpu = all_cpu_data[policy->cpu];
  635. if (!limits.no_turbo &&
  636. limits.min_perf_pct == 100 && limits.max_perf_pct == 100)
  637. policy->policy = CPUFREQ_POLICY_PERFORMANCE;
  638. else
  639. policy->policy = CPUFREQ_POLICY_POWERSAVE;
  640. policy->min = cpu->pstate.min_pstate * 100000;
  641. policy->max = cpu->pstate.turbo_pstate * 100000;
  642. /* cpuinfo and default policy values */
  643. policy->cpuinfo.min_freq = cpu->pstate.min_pstate * 100000;
  644. policy->cpuinfo.max_freq = cpu->pstate.turbo_pstate * 100000;
  645. policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
  646. cpumask_set_cpu(policy->cpu, policy->cpus);
  647. return 0;
  648. }
  649. static struct cpufreq_driver intel_pstate_driver = {
  650. .flags = CPUFREQ_CONST_LOOPS,
  651. .verify = intel_pstate_verify_policy,
  652. .setpolicy = intel_pstate_set_policy,
  653. .get = intel_pstate_get,
  654. .init = intel_pstate_cpu_init,
  655. .exit = intel_pstate_cpu_exit,
  656. .name = "intel_pstate",
  657. };
  658. static int __initdata no_load;
  659. static int intel_pstate_msrs_not_valid(void)
  660. {
  661. /* Check that all the msr's we are using are valid. */
  662. u64 aperf, mperf, tmp;
  663. rdmsrl(MSR_IA32_APERF, aperf);
  664. rdmsrl(MSR_IA32_MPERF, mperf);
  665. if (!pstate_funcs.get_max() ||
  666. !pstate_funcs.get_min() ||
  667. !pstate_funcs.get_turbo())
  668. return -ENODEV;
  669. rdmsrl(MSR_IA32_APERF, tmp);
  670. if (!(tmp - aperf))
  671. return -ENODEV;
  672. rdmsrl(MSR_IA32_MPERF, tmp);
  673. if (!(tmp - mperf))
  674. return -ENODEV;
  675. return 0;
  676. }
  677. static void copy_pid_params(struct pstate_adjust_policy *policy)
  678. {
  679. pid_params.sample_rate_ms = policy->sample_rate_ms;
  680. pid_params.p_gain_pct = policy->p_gain_pct;
  681. pid_params.i_gain_pct = policy->i_gain_pct;
  682. pid_params.d_gain_pct = policy->d_gain_pct;
  683. pid_params.deadband = policy->deadband;
  684. pid_params.setpoint = policy->setpoint;
  685. }
  686. static void copy_cpu_funcs(struct pstate_funcs *funcs)
  687. {
  688. pstate_funcs.get_max = funcs->get_max;
  689. pstate_funcs.get_min = funcs->get_min;
  690. pstate_funcs.get_turbo = funcs->get_turbo;
  691. pstate_funcs.set = funcs->set;
  692. pstate_funcs.get_vid = funcs->get_vid;
  693. }
  694. #if IS_ENABLED(CONFIG_ACPI)
  695. #include <acpi/processor.h>
  696. static bool intel_pstate_no_acpi_pss(void)
  697. {
  698. int i;
  699. for_each_possible_cpu(i) {
  700. acpi_status status;
  701. union acpi_object *pss;
  702. struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
  703. struct acpi_processor *pr = per_cpu(processors, i);
  704. if (!pr)
  705. continue;
  706. status = acpi_evaluate_object(pr->handle, "_PSS", NULL, &buffer);
  707. if (ACPI_FAILURE(status))
  708. continue;
  709. pss = buffer.pointer;
  710. if (pss && pss->type == ACPI_TYPE_PACKAGE) {
  711. kfree(pss);
  712. return false;
  713. }
  714. kfree(pss);
  715. }
  716. return true;
  717. }
  718. struct hw_vendor_info {
  719. u16 valid;
  720. char oem_id[ACPI_OEM_ID_SIZE];
  721. char oem_table_id[ACPI_OEM_TABLE_ID_SIZE];
  722. };
  723. /* Hardware vendor-specific info that has its own power management modes */
  724. static struct hw_vendor_info vendor_info[] = {
  725. {1, "HP ", "ProLiant"},
  726. {0, "", ""},
  727. };
  728. static bool intel_pstate_platform_pwr_mgmt_exists(void)
  729. {
  730. struct acpi_table_header hdr;
  731. struct hw_vendor_info *v_info;
  732. if (acpi_disabled
  733. || ACPI_FAILURE(acpi_get_table_header(ACPI_SIG_FADT, 0, &hdr)))
  734. return false;
  735. for (v_info = vendor_info; v_info->valid; v_info++) {
  736. if (!strncmp(hdr.oem_id, v_info->oem_id, ACPI_OEM_ID_SIZE)
  737. && !strncmp(hdr.oem_table_id, v_info->oem_table_id, ACPI_OEM_TABLE_ID_SIZE)
  738. && intel_pstate_no_acpi_pss())
  739. return true;
  740. }
  741. return false;
  742. }
  743. #else /* CONFIG_ACPI not enabled */
  744. static inline bool intel_pstate_platform_pwr_mgmt_exists(void) { return false; }
  745. #endif /* CONFIG_ACPI */
  746. static int __init intel_pstate_init(void)
  747. {
  748. int cpu, rc = 0;
  749. const struct x86_cpu_id *id;
  750. struct cpu_defaults *cpu_info;
  751. u64 units;
  752. if (no_load)
  753. return -ENODEV;
  754. id = x86_match_cpu(intel_pstate_cpu_ids);
  755. if (!id)
  756. return -ENODEV;
  757. /*
  758. * The Intel pstate driver will be ignored if the platform
  759. * firmware has its own power management modes.
  760. */
  761. if (intel_pstate_platform_pwr_mgmt_exists())
  762. return -ENODEV;
  763. cpu_info = (struct cpu_defaults *)id->driver_data;
  764. copy_pid_params(&cpu_info->pid_policy);
  765. copy_cpu_funcs(&cpu_info->funcs);
  766. if (intel_pstate_msrs_not_valid())
  767. return -ENODEV;
  768. pr_info("Intel P-state driver initializing.\n");
  769. all_cpu_data = vzalloc(sizeof(void *) * num_possible_cpus());
  770. if (!all_cpu_data)
  771. return -ENOMEM;
  772. rc = cpufreq_register_driver(&intel_pstate_driver);
  773. if (rc)
  774. goto out;
  775. rdmsrl(MSR_RAPL_POWER_UNIT, units);
  776. energy_divisor = 1 << ((units >> 8) & 0x1f); /* bits{12:8} */
  777. intel_pstate_debug_expose_params();
  778. intel_pstate_sysfs_expose_params();
  779. return rc;
  780. out:
  781. get_online_cpus();
  782. for_each_online_cpu(cpu) {
  783. if (all_cpu_data[cpu]) {
  784. del_timer_sync(&all_cpu_data[cpu]->timer);
  785. kfree(all_cpu_data[cpu]);
  786. }
  787. }
  788. put_online_cpus();
  789. vfree(all_cpu_data);
  790. return -ENODEV;
  791. }
  792. device_initcall(intel_pstate_init);
  793. static int __init intel_pstate_setup(char *str)
  794. {
  795. if (!str)
  796. return -EINVAL;
  797. if (!strcmp(str, "disable"))
  798. no_load = 1;
  799. return 0;
  800. }
  801. early_param("intel_pstate", intel_pstate_setup);
  802. MODULE_AUTHOR("Dirk Brandewie <dirk.j.brandewie@intel.com>");
  803. MODULE_DESCRIPTION("'intel_pstate' - P state driver Intel Core processors");
  804. MODULE_LICENSE("GPL");