wmi.c 280 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627262826292630263126322633263426352636263726382639264026412642264326442645264626472648264926502651265226532654265526562657265826592660266126622663266426652666266726682669267026712672267326742675267626772678267926802681268226832684268526862687268826892690269126922693269426952696269726982699270027012702270327042705270627072708270927102711271227132714271527162717271827192720272127222723272427252726272727282729273027312732273327342735273627372738273927402741274227432744274527462747274827492750275127522753275427552756275727582759276027612762276327642765276627672768276927702771277227732774277527762777277827792780278127822783278427852786278727882789279027912792279327942795279627972798279928002801280228032804280528062807280828092810281128122813281428152816281728182819282028212822282328242825282628272828282928302831283228332834283528362837283828392840284128422843284428452846284728482849285028512852285328542855285628572858285928602861286228632864286528662867286828692870287128722873287428752876287728782879288028812882288328842885288628872888288928902891289228932894289528962897289828992900290129022903290429052906290729082909291029112912291329142915291629172918291929202921292229232924292529262927292829292930293129322933293429352936293729382939294029412942294329442945294629472948294929502951295229532954295529562957295829592960296129622963296429652966296729682969297029712972297329742975297629772978297929802981298229832984298529862987298829892990299129922993299429952996299729982999300030013002300330043005300630073008300930103011301230133014301530163017301830193020302130223023302430253026302730283029303030313032303330343035303630373038303930403041304230433044304530463047304830493050305130523053305430553056305730583059306030613062306330643065306630673068306930703071307230733074307530763077307830793080308130823083308430853086308730883089309030913092309330943095309630973098309931003101310231033104310531063107310831093110311131123113311431153116311731183119312031213122312331243125312631273128312931303131313231333134313531363137313831393140314131423143314431453146314731483149315031513152315331543155315631573158315931603161316231633164316531663167316831693170317131723173317431753176317731783179318031813182318331843185318631873188318931903191319231933194319531963197319831993200320132023203320432053206320732083209321032113212321332143215321632173218321932203221322232233224322532263227322832293230323132323233323432353236323732383239324032413242324332443245324632473248324932503251325232533254325532563257325832593260326132623263326432653266326732683269327032713272327332743275327632773278327932803281328232833284328532863287328832893290329132923293329432953296329732983299330033013302330333043305330633073308330933103311331233133314331533163317331833193320332133223323332433253326332733283329333033313332333333343335333633373338333933403341334233433344334533463347334833493350335133523353335433553356335733583359336033613362336333643365336633673368336933703371337233733374337533763377337833793380338133823383338433853386338733883389339033913392339333943395339633973398339934003401340234033404340534063407340834093410341134123413341434153416341734183419342034213422342334243425342634273428342934303431343234333434343534363437343834393440344134423443344434453446344734483449345034513452345334543455345634573458345934603461346234633464346534663467346834693470347134723473347434753476347734783479348034813482348334843485348634873488348934903491349234933494349534963497349834993500350135023503350435053506350735083509351035113512351335143515351635173518351935203521352235233524352535263527352835293530353135323533353435353536353735383539354035413542354335443545354635473548354935503551355235533554355535563557355835593560356135623563356435653566356735683569357035713572357335743575357635773578357935803581358235833584358535863587358835893590359135923593359435953596359735983599360036013602360336043605360636073608360936103611361236133614361536163617361836193620362136223623362436253626362736283629363036313632363336343635363636373638363936403641364236433644364536463647364836493650365136523653365436553656365736583659366036613662366336643665366636673668366936703671367236733674367536763677367836793680368136823683368436853686368736883689369036913692369336943695369636973698369937003701370237033704370537063707370837093710371137123713371437153716371737183719372037213722372337243725372637273728372937303731373237333734373537363737373837393740374137423743374437453746374737483749375037513752375337543755375637573758375937603761376237633764376537663767376837693770377137723773377437753776377737783779378037813782378337843785378637873788378937903791379237933794379537963797379837993800380138023803380438053806380738083809381038113812381338143815381638173818381938203821382238233824382538263827382838293830383138323833383438353836383738383839384038413842384338443845384638473848384938503851385238533854385538563857385838593860386138623863386438653866386738683869387038713872387338743875387638773878387938803881388238833884388538863887388838893890389138923893389438953896389738983899390039013902390339043905390639073908390939103911391239133914391539163917391839193920392139223923392439253926392739283929393039313932393339343935393639373938393939403941394239433944394539463947394839493950395139523953395439553956395739583959396039613962396339643965396639673968396939703971397239733974397539763977397839793980398139823983398439853986398739883989399039913992399339943995399639973998399940004001400240034004400540064007400840094010401140124013401440154016401740184019402040214022402340244025402640274028402940304031403240334034403540364037403840394040404140424043404440454046404740484049405040514052405340544055405640574058405940604061406240634064406540664067406840694070407140724073407440754076407740784079408040814082408340844085408640874088408940904091409240934094409540964097409840994100410141024103410441054106410741084109411041114112411341144115411641174118411941204121412241234124412541264127412841294130413141324133413441354136413741384139414041414142414341444145414641474148414941504151415241534154415541564157415841594160416141624163416441654166416741684169417041714172417341744175417641774178417941804181418241834184418541864187418841894190419141924193419441954196419741984199420042014202420342044205420642074208420942104211421242134214421542164217421842194220422142224223422442254226422742284229423042314232423342344235423642374238423942404241424242434244424542464247424842494250425142524253425442554256425742584259426042614262426342644265426642674268426942704271427242734274427542764277427842794280428142824283428442854286428742884289429042914292429342944295429642974298429943004301430243034304430543064307430843094310431143124313431443154316431743184319432043214322432343244325432643274328432943304331433243334334433543364337433843394340434143424343434443454346434743484349435043514352435343544355435643574358435943604361436243634364436543664367436843694370437143724373437443754376437743784379438043814382438343844385438643874388438943904391439243934394439543964397439843994400440144024403440444054406440744084409441044114412441344144415441644174418441944204421442244234424442544264427442844294430443144324433443444354436443744384439444044414442444344444445444644474448444944504451445244534454445544564457445844594460446144624463446444654466446744684469447044714472447344744475447644774478447944804481448244834484448544864487448844894490449144924493449444954496449744984499450045014502450345044505450645074508450945104511451245134514451545164517451845194520452145224523452445254526452745284529453045314532453345344535453645374538453945404541454245434544454545464547454845494550455145524553455445554556455745584559456045614562456345644565456645674568456945704571457245734574457545764577457845794580458145824583458445854586458745884589459045914592459345944595459645974598459946004601460246034604460546064607460846094610461146124613461446154616461746184619462046214622462346244625462646274628462946304631463246334634463546364637463846394640464146424643464446454646464746484649465046514652465346544655465646574658465946604661466246634664466546664667466846694670467146724673467446754676467746784679468046814682468346844685468646874688468946904691469246934694469546964697469846994700470147024703470447054706470747084709471047114712471347144715471647174718471947204721472247234724472547264727472847294730473147324733473447354736473747384739474047414742474347444745474647474748474947504751475247534754475547564757475847594760476147624763476447654766476747684769477047714772477347744775477647774778477947804781478247834784478547864787478847894790479147924793479447954796479747984799480048014802480348044805480648074808480948104811481248134814481548164817481848194820482148224823482448254826482748284829483048314832483348344835483648374838483948404841484248434844484548464847484848494850485148524853485448554856485748584859486048614862486348644865486648674868486948704871487248734874487548764877487848794880488148824883488448854886488748884889489048914892489348944895489648974898489949004901490249034904490549064907490849094910491149124913491449154916491749184919492049214922492349244925492649274928492949304931493249334934493549364937493849394940494149424943494449454946494749484949495049514952495349544955495649574958495949604961496249634964496549664967496849694970497149724973497449754976497749784979498049814982498349844985498649874988498949904991499249934994499549964997499849995000500150025003500450055006500750085009501050115012501350145015501650175018501950205021502250235024502550265027502850295030503150325033503450355036503750385039504050415042504350445045504650475048504950505051505250535054505550565057505850595060506150625063506450655066506750685069507050715072507350745075507650775078507950805081508250835084508550865087508850895090509150925093509450955096509750985099510051015102510351045105510651075108510951105111511251135114511551165117511851195120512151225123512451255126512751285129513051315132513351345135513651375138513951405141514251435144514551465147514851495150515151525153515451555156515751585159516051615162516351645165516651675168516951705171517251735174517551765177517851795180518151825183518451855186518751885189519051915192519351945195519651975198519952005201520252035204520552065207520852095210521152125213521452155216521752185219522052215222522352245225522652275228522952305231523252335234523552365237523852395240524152425243524452455246524752485249525052515252525352545255525652575258525952605261526252635264526552665267526852695270527152725273527452755276527752785279528052815282528352845285528652875288528952905291529252935294529552965297529852995300530153025303530453055306530753085309531053115312531353145315531653175318531953205321532253235324532553265327532853295330533153325333533453355336533753385339534053415342534353445345534653475348534953505351535253535354535553565357535853595360536153625363536453655366536753685369537053715372537353745375537653775378537953805381538253835384538553865387538853895390539153925393539453955396539753985399540054015402540354045405540654075408540954105411541254135414541554165417541854195420542154225423542454255426542754285429543054315432543354345435543654375438543954405441544254435444544554465447544854495450545154525453545454555456545754585459546054615462546354645465546654675468546954705471547254735474547554765477547854795480548154825483548454855486548754885489549054915492549354945495549654975498549955005501550255035504550555065507550855095510551155125513551455155516551755185519552055215522552355245525552655275528552955305531553255335534553555365537553855395540554155425543554455455546554755485549555055515552555355545555555655575558555955605561556255635564556555665567556855695570557155725573557455755576557755785579558055815582558355845585558655875588558955905591559255935594559555965597559855995600560156025603560456055606560756085609561056115612561356145615561656175618561956205621562256235624562556265627562856295630563156325633563456355636563756385639564056415642564356445645564656475648564956505651565256535654565556565657565856595660566156625663566456655666566756685669567056715672567356745675567656775678567956805681568256835684568556865687568856895690569156925693569456955696569756985699570057015702570357045705570657075708570957105711571257135714571557165717571857195720572157225723572457255726572757285729573057315732573357345735573657375738573957405741574257435744574557465747574857495750575157525753575457555756575757585759576057615762576357645765576657675768576957705771577257735774577557765777577857795780578157825783578457855786578757885789579057915792579357945795579657975798579958005801580258035804580558065807580858095810581158125813581458155816581758185819582058215822582358245825582658275828582958305831583258335834583558365837583858395840584158425843584458455846584758485849585058515852585358545855585658575858585958605861586258635864586558665867586858695870587158725873587458755876587758785879588058815882588358845885588658875888588958905891589258935894589558965897589858995900590159025903590459055906590759085909591059115912591359145915591659175918591959205921592259235924592559265927592859295930593159325933593459355936593759385939594059415942594359445945594659475948594959505951595259535954595559565957595859595960596159625963596459655966596759685969597059715972597359745975597659775978597959805981598259835984598559865987598859895990599159925993599459955996599759985999600060016002600360046005600660076008600960106011601260136014601560166017601860196020602160226023602460256026602760286029603060316032603360346035603660376038603960406041604260436044604560466047604860496050605160526053605460556056605760586059606060616062606360646065606660676068606960706071607260736074607560766077607860796080608160826083608460856086608760886089609060916092609360946095609660976098609961006101610261036104610561066107610861096110611161126113611461156116611761186119612061216122612361246125612661276128612961306131613261336134613561366137613861396140614161426143614461456146614761486149615061516152615361546155615661576158615961606161616261636164616561666167616861696170617161726173617461756176617761786179618061816182618361846185618661876188618961906191619261936194619561966197619861996200620162026203620462056206620762086209621062116212621362146215621662176218621962206221622262236224622562266227622862296230623162326233623462356236623762386239624062416242624362446245624662476248624962506251625262536254625562566257625862596260626162626263626462656266626762686269627062716272627362746275627662776278627962806281628262836284628562866287628862896290629162926293629462956296629762986299630063016302630363046305630663076308630963106311631263136314631563166317631863196320632163226323632463256326632763286329633063316332633363346335633663376338633963406341634263436344634563466347634863496350635163526353635463556356635763586359636063616362636363646365636663676368636963706371637263736374637563766377637863796380638163826383638463856386638763886389639063916392639363946395639663976398639964006401640264036404640564066407640864096410641164126413641464156416641764186419642064216422642364246425642664276428642964306431643264336434643564366437643864396440644164426443644464456446644764486449645064516452645364546455645664576458645964606461646264636464646564666467646864696470647164726473647464756476647764786479648064816482648364846485648664876488648964906491649264936494649564966497649864996500650165026503650465056506650765086509651065116512651365146515651665176518651965206521652265236524652565266527652865296530653165326533653465356536653765386539654065416542654365446545654665476548654965506551655265536554655565566557655865596560656165626563656465656566656765686569657065716572657365746575657665776578657965806581658265836584658565866587658865896590659165926593659465956596659765986599660066016602660366046605660666076608660966106611661266136614661566166617661866196620662166226623662466256626662766286629663066316632663366346635663666376638663966406641664266436644664566466647664866496650665166526653665466556656665766586659666066616662666366646665666666676668666966706671667266736674667566766677667866796680668166826683668466856686668766886689669066916692669366946695669666976698669967006701670267036704670567066707670867096710671167126713671467156716671767186719672067216722672367246725672667276728672967306731673267336734673567366737673867396740674167426743674467456746674767486749675067516752675367546755675667576758675967606761676267636764676567666767676867696770677167726773677467756776677767786779678067816782678367846785678667876788678967906791679267936794679567966797679867996800680168026803680468056806680768086809681068116812681368146815681668176818681968206821682268236824682568266827682868296830683168326833683468356836683768386839684068416842684368446845684668476848684968506851685268536854685568566857685868596860686168626863686468656866686768686869687068716872687368746875687668776878687968806881688268836884688568866887688868896890689168926893689468956896689768986899690069016902690369046905690669076908690969106911691269136914691569166917691869196920692169226923692469256926692769286929693069316932693369346935693669376938693969406941694269436944694569466947694869496950695169526953695469556956695769586959696069616962696369646965696669676968696969706971697269736974697569766977697869796980698169826983698469856986698769886989699069916992699369946995699669976998699970007001700270037004700570067007700870097010701170127013701470157016701770187019702070217022702370247025702670277028702970307031703270337034703570367037703870397040704170427043704470457046704770487049705070517052705370547055705670577058705970607061706270637064706570667067706870697070707170727073707470757076707770787079708070817082708370847085708670877088708970907091709270937094709570967097709870997100710171027103710471057106710771087109711071117112711371147115711671177118711971207121712271237124712571267127712871297130713171327133713471357136713771387139714071417142714371447145714671477148714971507151715271537154715571567157715871597160716171627163716471657166716771687169717071717172717371747175717671777178717971807181718271837184718571867187718871897190719171927193719471957196719771987199720072017202720372047205720672077208720972107211721272137214721572167217721872197220722172227223722472257226722772287229723072317232723372347235723672377238723972407241724272437244724572467247724872497250725172527253725472557256725772587259726072617262726372647265726672677268726972707271727272737274727572767277727872797280728172827283728472857286728772887289729072917292729372947295729672977298729973007301730273037304730573067307730873097310731173127313731473157316731773187319732073217322732373247325732673277328732973307331733273337334733573367337733873397340734173427343734473457346734773487349735073517352735373547355735673577358735973607361736273637364736573667367736873697370737173727373737473757376737773787379738073817382738373847385738673877388738973907391739273937394739573967397739873997400740174027403740474057406740774087409741074117412741374147415741674177418741974207421742274237424742574267427742874297430743174327433743474357436743774387439744074417442744374447445744674477448744974507451745274537454745574567457745874597460746174627463746474657466746774687469747074717472747374747475747674777478747974807481748274837484748574867487748874897490749174927493749474957496749774987499750075017502750375047505750675077508750975107511751275137514751575167517751875197520752175227523752475257526752775287529753075317532753375347535753675377538753975407541754275437544754575467547754875497550755175527553755475557556755775587559756075617562756375647565756675677568756975707571757275737574757575767577757875797580758175827583758475857586758775887589759075917592759375947595759675977598759976007601760276037604760576067607760876097610761176127613761476157616761776187619762076217622762376247625762676277628762976307631763276337634763576367637763876397640764176427643764476457646764776487649765076517652765376547655765676577658765976607661766276637664766576667667766876697670767176727673767476757676767776787679768076817682768376847685768676877688768976907691769276937694769576967697769876997700770177027703770477057706770777087709771077117712771377147715771677177718771977207721772277237724772577267727772877297730773177327733773477357736773777387739774077417742774377447745774677477748774977507751775277537754775577567757775877597760776177627763776477657766776777687769777077717772777377747775777677777778777977807781778277837784778577867787778877897790779177927793779477957796779777987799780078017802780378047805780678077808780978107811781278137814781578167817781878197820782178227823782478257826782778287829783078317832783378347835783678377838783978407841784278437844784578467847784878497850785178527853785478557856785778587859786078617862786378647865786678677868786978707871787278737874787578767877787878797880788178827883788478857886788778887889789078917892789378947895789678977898789979007901790279037904790579067907790879097910791179127913791479157916791779187919792079217922792379247925792679277928792979307931793279337934793579367937793879397940794179427943794479457946794779487949795079517952795379547955795679577958795979607961796279637964796579667967796879697970797179727973797479757976797779787979798079817982798379847985798679877988798979907991799279937994799579967997799879998000800180028003800480058006800780088009801080118012801380148015801680178018801980208021802280238024802580268027802880298030803180328033803480358036803780388039804080418042804380448045804680478048804980508051805280538054805580568057805880598060806180628063806480658066806780688069807080718072807380748075807680778078807980808081808280838084808580868087808880898090809180928093809480958096809780988099810081018102810381048105810681078108810981108111811281138114811581168117811881198120812181228123812481258126812781288129813081318132813381348135813681378138813981408141814281438144814581468147814881498150815181528153815481558156815781588159816081618162816381648165816681678168816981708171817281738174817581768177817881798180818181828183818481858186818781888189819081918192819381948195819681978198819982008201820282038204820582068207820882098210821182128213821482158216821782188219822082218222822382248225822682278228822982308231823282338234823582368237823882398240824182428243824482458246824782488249825082518252825382548255825682578258825982608261826282638264826582668267826882698270827182728273827482758276827782788279828082818282828382848285828682878288828982908291829282938294829582968297829882998300830183028303830483058306830783088309831083118312831383148315831683178318831983208321832283238324832583268327832883298330833183328333833483358336833783388339834083418342834383448345834683478348834983508351835283538354835583568357835883598360836183628363836483658366836783688369837083718372837383748375837683778378837983808381838283838384838583868387838883898390839183928393839483958396839783988399840084018402840384048405840684078408840984108411841284138414841584168417841884198420842184228423842484258426842784288429843084318432843384348435843684378438843984408441844284438444844584468447844884498450845184528453845484558456845784588459846084618462846384648465846684678468846984708471847284738474847584768477847884798480848184828483848484858486848784888489849084918492849384948495849684978498849985008501850285038504850585068507850885098510851185128513851485158516851785188519852085218522
  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #include <linux/skbuff.h>
  18. #include <linux/ctype.h>
  19. #include "core.h"
  20. #include "htc.h"
  21. #include "debug.h"
  22. #include "wmi.h"
  23. #include "wmi-tlv.h"
  24. #include "mac.h"
  25. #include "testmode.h"
  26. #include "wmi-ops.h"
  27. #include "p2p.h"
  28. #include "hw.h"
  29. #include "hif.h"
  30. #include "txrx.h"
  31. #define ATH10K_WMI_BARRIER_ECHO_ID 0xBA991E9
  32. #define ATH10K_WMI_BARRIER_TIMEOUT_HZ (3 * HZ)
  33. /* MAIN WMI cmd track */
  34. static struct wmi_cmd_map wmi_cmd_map = {
  35. .init_cmdid = WMI_INIT_CMDID,
  36. .start_scan_cmdid = WMI_START_SCAN_CMDID,
  37. .stop_scan_cmdid = WMI_STOP_SCAN_CMDID,
  38. .scan_chan_list_cmdid = WMI_SCAN_CHAN_LIST_CMDID,
  39. .scan_sch_prio_tbl_cmdid = WMI_SCAN_SCH_PRIO_TBL_CMDID,
  40. .pdev_set_regdomain_cmdid = WMI_PDEV_SET_REGDOMAIN_CMDID,
  41. .pdev_set_channel_cmdid = WMI_PDEV_SET_CHANNEL_CMDID,
  42. .pdev_set_param_cmdid = WMI_PDEV_SET_PARAM_CMDID,
  43. .pdev_pktlog_enable_cmdid = WMI_PDEV_PKTLOG_ENABLE_CMDID,
  44. .pdev_pktlog_disable_cmdid = WMI_PDEV_PKTLOG_DISABLE_CMDID,
  45. .pdev_set_wmm_params_cmdid = WMI_PDEV_SET_WMM_PARAMS_CMDID,
  46. .pdev_set_ht_cap_ie_cmdid = WMI_PDEV_SET_HT_CAP_IE_CMDID,
  47. .pdev_set_vht_cap_ie_cmdid = WMI_PDEV_SET_VHT_CAP_IE_CMDID,
  48. .pdev_set_dscp_tid_map_cmdid = WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
  49. .pdev_set_quiet_mode_cmdid = WMI_PDEV_SET_QUIET_MODE_CMDID,
  50. .pdev_green_ap_ps_enable_cmdid = WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  51. .pdev_get_tpc_config_cmdid = WMI_PDEV_GET_TPC_CONFIG_CMDID,
  52. .pdev_set_base_macaddr_cmdid = WMI_PDEV_SET_BASE_MACADDR_CMDID,
  53. .vdev_create_cmdid = WMI_VDEV_CREATE_CMDID,
  54. .vdev_delete_cmdid = WMI_VDEV_DELETE_CMDID,
  55. .vdev_start_request_cmdid = WMI_VDEV_START_REQUEST_CMDID,
  56. .vdev_restart_request_cmdid = WMI_VDEV_RESTART_REQUEST_CMDID,
  57. .vdev_up_cmdid = WMI_VDEV_UP_CMDID,
  58. .vdev_stop_cmdid = WMI_VDEV_STOP_CMDID,
  59. .vdev_down_cmdid = WMI_VDEV_DOWN_CMDID,
  60. .vdev_set_param_cmdid = WMI_VDEV_SET_PARAM_CMDID,
  61. .vdev_install_key_cmdid = WMI_VDEV_INSTALL_KEY_CMDID,
  62. .peer_create_cmdid = WMI_PEER_CREATE_CMDID,
  63. .peer_delete_cmdid = WMI_PEER_DELETE_CMDID,
  64. .peer_flush_tids_cmdid = WMI_PEER_FLUSH_TIDS_CMDID,
  65. .peer_set_param_cmdid = WMI_PEER_SET_PARAM_CMDID,
  66. .peer_assoc_cmdid = WMI_PEER_ASSOC_CMDID,
  67. .peer_add_wds_entry_cmdid = WMI_PEER_ADD_WDS_ENTRY_CMDID,
  68. .peer_remove_wds_entry_cmdid = WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
  69. .peer_mcast_group_cmdid = WMI_PEER_MCAST_GROUP_CMDID,
  70. .bcn_tx_cmdid = WMI_BCN_TX_CMDID,
  71. .pdev_send_bcn_cmdid = WMI_PDEV_SEND_BCN_CMDID,
  72. .bcn_tmpl_cmdid = WMI_BCN_TMPL_CMDID,
  73. .bcn_filter_rx_cmdid = WMI_BCN_FILTER_RX_CMDID,
  74. .prb_req_filter_rx_cmdid = WMI_PRB_REQ_FILTER_RX_CMDID,
  75. .mgmt_tx_cmdid = WMI_MGMT_TX_CMDID,
  76. .prb_tmpl_cmdid = WMI_PRB_TMPL_CMDID,
  77. .addba_clear_resp_cmdid = WMI_ADDBA_CLEAR_RESP_CMDID,
  78. .addba_send_cmdid = WMI_ADDBA_SEND_CMDID,
  79. .addba_status_cmdid = WMI_ADDBA_STATUS_CMDID,
  80. .delba_send_cmdid = WMI_DELBA_SEND_CMDID,
  81. .addba_set_resp_cmdid = WMI_ADDBA_SET_RESP_CMDID,
  82. .send_singleamsdu_cmdid = WMI_SEND_SINGLEAMSDU_CMDID,
  83. .sta_powersave_mode_cmdid = WMI_STA_POWERSAVE_MODE_CMDID,
  84. .sta_powersave_param_cmdid = WMI_STA_POWERSAVE_PARAM_CMDID,
  85. .sta_mimo_ps_mode_cmdid = WMI_STA_MIMO_PS_MODE_CMDID,
  86. .pdev_dfs_enable_cmdid = WMI_PDEV_DFS_ENABLE_CMDID,
  87. .pdev_dfs_disable_cmdid = WMI_PDEV_DFS_DISABLE_CMDID,
  88. .roam_scan_mode = WMI_ROAM_SCAN_MODE,
  89. .roam_scan_rssi_threshold = WMI_ROAM_SCAN_RSSI_THRESHOLD,
  90. .roam_scan_period = WMI_ROAM_SCAN_PERIOD,
  91. .roam_scan_rssi_change_threshold = WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  92. .roam_ap_profile = WMI_ROAM_AP_PROFILE,
  93. .ofl_scan_add_ap_profile = WMI_ROAM_AP_PROFILE,
  94. .ofl_scan_remove_ap_profile = WMI_OFL_SCAN_REMOVE_AP_PROFILE,
  95. .ofl_scan_period = WMI_OFL_SCAN_PERIOD,
  96. .p2p_dev_set_device_info = WMI_P2P_DEV_SET_DEVICE_INFO,
  97. .p2p_dev_set_discoverability = WMI_P2P_DEV_SET_DISCOVERABILITY,
  98. .p2p_go_set_beacon_ie = WMI_P2P_GO_SET_BEACON_IE,
  99. .p2p_go_set_probe_resp_ie = WMI_P2P_GO_SET_PROBE_RESP_IE,
  100. .p2p_set_vendor_ie_data_cmdid = WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
  101. .ap_ps_peer_param_cmdid = WMI_AP_PS_PEER_PARAM_CMDID,
  102. .ap_ps_peer_uapsd_coex_cmdid = WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
  103. .peer_rate_retry_sched_cmdid = WMI_PEER_RATE_RETRY_SCHED_CMDID,
  104. .wlan_profile_trigger_cmdid = WMI_WLAN_PROFILE_TRIGGER_CMDID,
  105. .wlan_profile_set_hist_intvl_cmdid =
  106. WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  107. .wlan_profile_get_profile_data_cmdid =
  108. WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  109. .wlan_profile_enable_profile_id_cmdid =
  110. WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  111. .wlan_profile_list_profile_id_cmdid =
  112. WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  113. .pdev_suspend_cmdid = WMI_PDEV_SUSPEND_CMDID,
  114. .pdev_resume_cmdid = WMI_PDEV_RESUME_CMDID,
  115. .add_bcn_filter_cmdid = WMI_ADD_BCN_FILTER_CMDID,
  116. .rmv_bcn_filter_cmdid = WMI_RMV_BCN_FILTER_CMDID,
  117. .wow_add_wake_pattern_cmdid = WMI_WOW_ADD_WAKE_PATTERN_CMDID,
  118. .wow_del_wake_pattern_cmdid = WMI_WOW_DEL_WAKE_PATTERN_CMDID,
  119. .wow_enable_disable_wake_event_cmdid =
  120. WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  121. .wow_enable_cmdid = WMI_WOW_ENABLE_CMDID,
  122. .wow_hostwakeup_from_sleep_cmdid = WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  123. .rtt_measreq_cmdid = WMI_RTT_MEASREQ_CMDID,
  124. .rtt_tsf_cmdid = WMI_RTT_TSF_CMDID,
  125. .vdev_spectral_scan_configure_cmdid =
  126. WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  127. .vdev_spectral_scan_enable_cmdid = WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  128. .request_stats_cmdid = WMI_REQUEST_STATS_CMDID,
  129. .set_arp_ns_offload_cmdid = WMI_SET_ARP_NS_OFFLOAD_CMDID,
  130. .network_list_offload_config_cmdid =
  131. WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID,
  132. .gtk_offload_cmdid = WMI_GTK_OFFLOAD_CMDID,
  133. .csa_offload_enable_cmdid = WMI_CSA_OFFLOAD_ENABLE_CMDID,
  134. .csa_offload_chanswitch_cmdid = WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
  135. .chatter_set_mode_cmdid = WMI_CHATTER_SET_MODE_CMDID,
  136. .peer_tid_addba_cmdid = WMI_PEER_TID_ADDBA_CMDID,
  137. .peer_tid_delba_cmdid = WMI_PEER_TID_DELBA_CMDID,
  138. .sta_dtim_ps_method_cmdid = WMI_STA_DTIM_PS_METHOD_CMDID,
  139. .sta_uapsd_auto_trig_cmdid = WMI_STA_UAPSD_AUTO_TRIG_CMDID,
  140. .sta_keepalive_cmd = WMI_STA_KEEPALIVE_CMD,
  141. .echo_cmdid = WMI_ECHO_CMDID,
  142. .pdev_utf_cmdid = WMI_PDEV_UTF_CMDID,
  143. .dbglog_cfg_cmdid = WMI_DBGLOG_CFG_CMDID,
  144. .pdev_qvit_cmdid = WMI_PDEV_QVIT_CMDID,
  145. .pdev_ftm_intg_cmdid = WMI_PDEV_FTM_INTG_CMDID,
  146. .vdev_set_keepalive_cmdid = WMI_VDEV_SET_KEEPALIVE_CMDID,
  147. .vdev_get_keepalive_cmdid = WMI_VDEV_GET_KEEPALIVE_CMDID,
  148. .force_fw_hang_cmdid = WMI_FORCE_FW_HANG_CMDID,
  149. .gpio_config_cmdid = WMI_GPIO_CONFIG_CMDID,
  150. .gpio_output_cmdid = WMI_GPIO_OUTPUT_CMDID,
  151. .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
  152. .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
  153. .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
  154. .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
  155. .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
  156. .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
  157. .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
  158. .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
  159. .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
  160. .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
  161. .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
  162. .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  163. .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
  164. .nan_cmdid = WMI_CMD_UNSUPPORTED,
  165. .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
  166. .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
  167. .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
  168. .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  169. .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  170. .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
  171. .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
  172. .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
  173. .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
  174. .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
  175. .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
  176. .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
  177. .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
  178. .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
  179. .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
  180. .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  181. .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  182. .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
  183. .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
  184. .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
  185. .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
  186. .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
  187. .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
  188. .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
  189. .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  190. .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  191. .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
  192. .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
  193. .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
  194. .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED,
  195. };
  196. /* 10.X WMI cmd track */
  197. static struct wmi_cmd_map wmi_10x_cmd_map = {
  198. .init_cmdid = WMI_10X_INIT_CMDID,
  199. .start_scan_cmdid = WMI_10X_START_SCAN_CMDID,
  200. .stop_scan_cmdid = WMI_10X_STOP_SCAN_CMDID,
  201. .scan_chan_list_cmdid = WMI_10X_SCAN_CHAN_LIST_CMDID,
  202. .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
  203. .pdev_set_regdomain_cmdid = WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
  204. .pdev_set_channel_cmdid = WMI_10X_PDEV_SET_CHANNEL_CMDID,
  205. .pdev_set_param_cmdid = WMI_10X_PDEV_SET_PARAM_CMDID,
  206. .pdev_pktlog_enable_cmdid = WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
  207. .pdev_pktlog_disable_cmdid = WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
  208. .pdev_set_wmm_params_cmdid = WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
  209. .pdev_set_ht_cap_ie_cmdid = WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
  210. .pdev_set_vht_cap_ie_cmdid = WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
  211. .pdev_set_dscp_tid_map_cmdid = WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
  212. .pdev_set_quiet_mode_cmdid = WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
  213. .pdev_green_ap_ps_enable_cmdid = WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  214. .pdev_get_tpc_config_cmdid = WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
  215. .pdev_set_base_macaddr_cmdid = WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
  216. .vdev_create_cmdid = WMI_10X_VDEV_CREATE_CMDID,
  217. .vdev_delete_cmdid = WMI_10X_VDEV_DELETE_CMDID,
  218. .vdev_start_request_cmdid = WMI_10X_VDEV_START_REQUEST_CMDID,
  219. .vdev_restart_request_cmdid = WMI_10X_VDEV_RESTART_REQUEST_CMDID,
  220. .vdev_up_cmdid = WMI_10X_VDEV_UP_CMDID,
  221. .vdev_stop_cmdid = WMI_10X_VDEV_STOP_CMDID,
  222. .vdev_down_cmdid = WMI_10X_VDEV_DOWN_CMDID,
  223. .vdev_set_param_cmdid = WMI_10X_VDEV_SET_PARAM_CMDID,
  224. .vdev_install_key_cmdid = WMI_10X_VDEV_INSTALL_KEY_CMDID,
  225. .peer_create_cmdid = WMI_10X_PEER_CREATE_CMDID,
  226. .peer_delete_cmdid = WMI_10X_PEER_DELETE_CMDID,
  227. .peer_flush_tids_cmdid = WMI_10X_PEER_FLUSH_TIDS_CMDID,
  228. .peer_set_param_cmdid = WMI_10X_PEER_SET_PARAM_CMDID,
  229. .peer_assoc_cmdid = WMI_10X_PEER_ASSOC_CMDID,
  230. .peer_add_wds_entry_cmdid = WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
  231. .peer_remove_wds_entry_cmdid = WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
  232. .peer_mcast_group_cmdid = WMI_10X_PEER_MCAST_GROUP_CMDID,
  233. .bcn_tx_cmdid = WMI_10X_BCN_TX_CMDID,
  234. .pdev_send_bcn_cmdid = WMI_10X_PDEV_SEND_BCN_CMDID,
  235. .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  236. .bcn_filter_rx_cmdid = WMI_10X_BCN_FILTER_RX_CMDID,
  237. .prb_req_filter_rx_cmdid = WMI_10X_PRB_REQ_FILTER_RX_CMDID,
  238. .mgmt_tx_cmdid = WMI_10X_MGMT_TX_CMDID,
  239. .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  240. .addba_clear_resp_cmdid = WMI_10X_ADDBA_CLEAR_RESP_CMDID,
  241. .addba_send_cmdid = WMI_10X_ADDBA_SEND_CMDID,
  242. .addba_status_cmdid = WMI_10X_ADDBA_STATUS_CMDID,
  243. .delba_send_cmdid = WMI_10X_DELBA_SEND_CMDID,
  244. .addba_set_resp_cmdid = WMI_10X_ADDBA_SET_RESP_CMDID,
  245. .send_singleamsdu_cmdid = WMI_10X_SEND_SINGLEAMSDU_CMDID,
  246. .sta_powersave_mode_cmdid = WMI_10X_STA_POWERSAVE_MODE_CMDID,
  247. .sta_powersave_param_cmdid = WMI_10X_STA_POWERSAVE_PARAM_CMDID,
  248. .sta_mimo_ps_mode_cmdid = WMI_10X_STA_MIMO_PS_MODE_CMDID,
  249. .pdev_dfs_enable_cmdid = WMI_10X_PDEV_DFS_ENABLE_CMDID,
  250. .pdev_dfs_disable_cmdid = WMI_10X_PDEV_DFS_DISABLE_CMDID,
  251. .roam_scan_mode = WMI_10X_ROAM_SCAN_MODE,
  252. .roam_scan_rssi_threshold = WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
  253. .roam_scan_period = WMI_10X_ROAM_SCAN_PERIOD,
  254. .roam_scan_rssi_change_threshold =
  255. WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  256. .roam_ap_profile = WMI_10X_ROAM_AP_PROFILE,
  257. .ofl_scan_add_ap_profile = WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
  258. .ofl_scan_remove_ap_profile = WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
  259. .ofl_scan_period = WMI_10X_OFL_SCAN_PERIOD,
  260. .p2p_dev_set_device_info = WMI_10X_P2P_DEV_SET_DEVICE_INFO,
  261. .p2p_dev_set_discoverability = WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
  262. .p2p_go_set_beacon_ie = WMI_10X_P2P_GO_SET_BEACON_IE,
  263. .p2p_go_set_probe_resp_ie = WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
  264. .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
  265. .ap_ps_peer_param_cmdid = WMI_10X_AP_PS_PEER_PARAM_CMDID,
  266. .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
  267. .peer_rate_retry_sched_cmdid = WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
  268. .wlan_profile_trigger_cmdid = WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
  269. .wlan_profile_set_hist_intvl_cmdid =
  270. WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  271. .wlan_profile_get_profile_data_cmdid =
  272. WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  273. .wlan_profile_enable_profile_id_cmdid =
  274. WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  275. .wlan_profile_list_profile_id_cmdid =
  276. WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  277. .pdev_suspend_cmdid = WMI_10X_PDEV_SUSPEND_CMDID,
  278. .pdev_resume_cmdid = WMI_10X_PDEV_RESUME_CMDID,
  279. .add_bcn_filter_cmdid = WMI_10X_ADD_BCN_FILTER_CMDID,
  280. .rmv_bcn_filter_cmdid = WMI_10X_RMV_BCN_FILTER_CMDID,
  281. .wow_add_wake_pattern_cmdid = WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
  282. .wow_del_wake_pattern_cmdid = WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
  283. .wow_enable_disable_wake_event_cmdid =
  284. WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  285. .wow_enable_cmdid = WMI_10X_WOW_ENABLE_CMDID,
  286. .wow_hostwakeup_from_sleep_cmdid =
  287. WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  288. .rtt_measreq_cmdid = WMI_10X_RTT_MEASREQ_CMDID,
  289. .rtt_tsf_cmdid = WMI_10X_RTT_TSF_CMDID,
  290. .vdev_spectral_scan_configure_cmdid =
  291. WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  292. .vdev_spectral_scan_enable_cmdid =
  293. WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  294. .request_stats_cmdid = WMI_10X_REQUEST_STATS_CMDID,
  295. .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
  296. .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
  297. .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
  298. .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
  299. .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
  300. .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
  301. .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
  302. .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
  303. .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
  304. .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
  305. .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
  306. .echo_cmdid = WMI_10X_ECHO_CMDID,
  307. .pdev_utf_cmdid = WMI_10X_PDEV_UTF_CMDID,
  308. .dbglog_cfg_cmdid = WMI_10X_DBGLOG_CFG_CMDID,
  309. .pdev_qvit_cmdid = WMI_10X_PDEV_QVIT_CMDID,
  310. .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
  311. .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  312. .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  313. .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
  314. .gpio_config_cmdid = WMI_10X_GPIO_CONFIG_CMDID,
  315. .gpio_output_cmdid = WMI_10X_GPIO_OUTPUT_CMDID,
  316. .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
  317. .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
  318. .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
  319. .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
  320. .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
  321. .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
  322. .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
  323. .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
  324. .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
  325. .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
  326. .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
  327. .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  328. .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
  329. .nan_cmdid = WMI_CMD_UNSUPPORTED,
  330. .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
  331. .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
  332. .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
  333. .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  334. .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  335. .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
  336. .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
  337. .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
  338. .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
  339. .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
  340. .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
  341. .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
  342. .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
  343. .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
  344. .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
  345. .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  346. .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  347. .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
  348. .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
  349. .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
  350. .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
  351. .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
  352. .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
  353. .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
  354. .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  355. .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  356. .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
  357. .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
  358. .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
  359. .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED,
  360. };
  361. /* 10.2.4 WMI cmd track */
  362. static struct wmi_cmd_map wmi_10_2_4_cmd_map = {
  363. .init_cmdid = WMI_10_2_INIT_CMDID,
  364. .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
  365. .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
  366. .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
  367. .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
  368. .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
  369. .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
  370. .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
  371. .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
  372. .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
  373. .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
  374. .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
  375. .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
  376. .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
  377. .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  378. .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
  379. .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
  380. .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
  381. .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
  382. .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
  383. .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
  384. .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
  385. .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
  386. .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
  387. .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
  388. .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
  389. .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
  390. .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
  391. .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
  392. .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
  393. .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
  394. .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
  395. .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
  396. .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
  397. .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
  398. .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
  399. .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  400. .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
  401. .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
  402. .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
  403. .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  404. .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
  405. .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
  406. .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
  407. .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
  408. .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
  409. .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
  410. .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
  411. .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
  412. .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
  413. .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
  414. .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
  415. .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
  416. .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
  417. .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
  418. .roam_scan_rssi_change_threshold =
  419. WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  420. .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
  421. .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
  422. .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
  423. .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
  424. .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
  425. .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
  426. .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
  427. .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
  428. .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
  429. .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
  430. .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
  431. .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
  432. .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
  433. .wlan_profile_set_hist_intvl_cmdid =
  434. WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  435. .wlan_profile_get_profile_data_cmdid =
  436. WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  437. .wlan_profile_enable_profile_id_cmdid =
  438. WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  439. .wlan_profile_list_profile_id_cmdid =
  440. WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  441. .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
  442. .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
  443. .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
  444. .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
  445. .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
  446. .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
  447. .wow_enable_disable_wake_event_cmdid =
  448. WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  449. .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
  450. .wow_hostwakeup_from_sleep_cmdid =
  451. WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  452. .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
  453. .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
  454. .vdev_spectral_scan_configure_cmdid =
  455. WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  456. .vdev_spectral_scan_enable_cmdid =
  457. WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  458. .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
  459. .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
  460. .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
  461. .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
  462. .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
  463. .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
  464. .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
  465. .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
  466. .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
  467. .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
  468. .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
  469. .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
  470. .echo_cmdid = WMI_10_2_ECHO_CMDID,
  471. .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
  472. .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
  473. .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
  474. .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
  475. .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  476. .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  477. .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
  478. .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
  479. .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
  480. .pdev_get_temperature_cmdid = WMI_10_2_PDEV_GET_TEMPERATURE_CMDID,
  481. .pdev_enable_adaptive_cca_cmdid = WMI_10_2_SET_CCA_PARAMS,
  482. .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
  483. .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
  484. .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
  485. .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
  486. .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
  487. .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
  488. .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
  489. .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
  490. .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
  491. .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  492. .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
  493. .nan_cmdid = WMI_CMD_UNSUPPORTED,
  494. .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
  495. .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
  496. .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
  497. .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  498. .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  499. .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
  500. .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
  501. .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
  502. .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
  503. .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
  504. .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
  505. .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
  506. .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
  507. .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
  508. .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
  509. .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  510. .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  511. .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
  512. .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
  513. .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
  514. .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
  515. .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
  516. .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
  517. .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
  518. .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  519. .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  520. .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
  521. .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
  522. .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
  523. .pdev_bss_chan_info_request_cmdid =
  524. WMI_10_2_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
  525. };
  526. /* 10.4 WMI cmd track */
  527. static struct wmi_cmd_map wmi_10_4_cmd_map = {
  528. .init_cmdid = WMI_10_4_INIT_CMDID,
  529. .start_scan_cmdid = WMI_10_4_START_SCAN_CMDID,
  530. .stop_scan_cmdid = WMI_10_4_STOP_SCAN_CMDID,
  531. .scan_chan_list_cmdid = WMI_10_4_SCAN_CHAN_LIST_CMDID,
  532. .scan_sch_prio_tbl_cmdid = WMI_10_4_SCAN_SCH_PRIO_TBL_CMDID,
  533. .pdev_set_regdomain_cmdid = WMI_10_4_PDEV_SET_REGDOMAIN_CMDID,
  534. .pdev_set_channel_cmdid = WMI_10_4_PDEV_SET_CHANNEL_CMDID,
  535. .pdev_set_param_cmdid = WMI_10_4_PDEV_SET_PARAM_CMDID,
  536. .pdev_pktlog_enable_cmdid = WMI_10_4_PDEV_PKTLOG_ENABLE_CMDID,
  537. .pdev_pktlog_disable_cmdid = WMI_10_4_PDEV_PKTLOG_DISABLE_CMDID,
  538. .pdev_set_wmm_params_cmdid = WMI_10_4_PDEV_SET_WMM_PARAMS_CMDID,
  539. .pdev_set_ht_cap_ie_cmdid = WMI_10_4_PDEV_SET_HT_CAP_IE_CMDID,
  540. .pdev_set_vht_cap_ie_cmdid = WMI_10_4_PDEV_SET_VHT_CAP_IE_CMDID,
  541. .pdev_set_dscp_tid_map_cmdid = WMI_10_4_PDEV_SET_DSCP_TID_MAP_CMDID,
  542. .pdev_set_quiet_mode_cmdid = WMI_10_4_PDEV_SET_QUIET_MODE_CMDID,
  543. .pdev_green_ap_ps_enable_cmdid = WMI_10_4_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  544. .pdev_get_tpc_config_cmdid = WMI_10_4_PDEV_GET_TPC_CONFIG_CMDID,
  545. .pdev_set_base_macaddr_cmdid = WMI_10_4_PDEV_SET_BASE_MACADDR_CMDID,
  546. .vdev_create_cmdid = WMI_10_4_VDEV_CREATE_CMDID,
  547. .vdev_delete_cmdid = WMI_10_4_VDEV_DELETE_CMDID,
  548. .vdev_start_request_cmdid = WMI_10_4_VDEV_START_REQUEST_CMDID,
  549. .vdev_restart_request_cmdid = WMI_10_4_VDEV_RESTART_REQUEST_CMDID,
  550. .vdev_up_cmdid = WMI_10_4_VDEV_UP_CMDID,
  551. .vdev_stop_cmdid = WMI_10_4_VDEV_STOP_CMDID,
  552. .vdev_down_cmdid = WMI_10_4_VDEV_DOWN_CMDID,
  553. .vdev_set_param_cmdid = WMI_10_4_VDEV_SET_PARAM_CMDID,
  554. .vdev_install_key_cmdid = WMI_10_4_VDEV_INSTALL_KEY_CMDID,
  555. .peer_create_cmdid = WMI_10_4_PEER_CREATE_CMDID,
  556. .peer_delete_cmdid = WMI_10_4_PEER_DELETE_CMDID,
  557. .peer_flush_tids_cmdid = WMI_10_4_PEER_FLUSH_TIDS_CMDID,
  558. .peer_set_param_cmdid = WMI_10_4_PEER_SET_PARAM_CMDID,
  559. .peer_assoc_cmdid = WMI_10_4_PEER_ASSOC_CMDID,
  560. .peer_add_wds_entry_cmdid = WMI_10_4_PEER_ADD_WDS_ENTRY_CMDID,
  561. .peer_remove_wds_entry_cmdid = WMI_10_4_PEER_REMOVE_WDS_ENTRY_CMDID,
  562. .peer_mcast_group_cmdid = WMI_10_4_PEER_MCAST_GROUP_CMDID,
  563. .bcn_tx_cmdid = WMI_10_4_BCN_TX_CMDID,
  564. .pdev_send_bcn_cmdid = WMI_10_4_PDEV_SEND_BCN_CMDID,
  565. .bcn_tmpl_cmdid = WMI_10_4_BCN_PRB_TMPL_CMDID,
  566. .bcn_filter_rx_cmdid = WMI_10_4_BCN_FILTER_RX_CMDID,
  567. .prb_req_filter_rx_cmdid = WMI_10_4_PRB_REQ_FILTER_RX_CMDID,
  568. .mgmt_tx_cmdid = WMI_10_4_MGMT_TX_CMDID,
  569. .prb_tmpl_cmdid = WMI_10_4_PRB_TMPL_CMDID,
  570. .addba_clear_resp_cmdid = WMI_10_4_ADDBA_CLEAR_RESP_CMDID,
  571. .addba_send_cmdid = WMI_10_4_ADDBA_SEND_CMDID,
  572. .addba_status_cmdid = WMI_10_4_ADDBA_STATUS_CMDID,
  573. .delba_send_cmdid = WMI_10_4_DELBA_SEND_CMDID,
  574. .addba_set_resp_cmdid = WMI_10_4_ADDBA_SET_RESP_CMDID,
  575. .send_singleamsdu_cmdid = WMI_10_4_SEND_SINGLEAMSDU_CMDID,
  576. .sta_powersave_mode_cmdid = WMI_10_4_STA_POWERSAVE_MODE_CMDID,
  577. .sta_powersave_param_cmdid = WMI_10_4_STA_POWERSAVE_PARAM_CMDID,
  578. .sta_mimo_ps_mode_cmdid = WMI_10_4_STA_MIMO_PS_MODE_CMDID,
  579. .pdev_dfs_enable_cmdid = WMI_10_4_PDEV_DFS_ENABLE_CMDID,
  580. .pdev_dfs_disable_cmdid = WMI_10_4_PDEV_DFS_DISABLE_CMDID,
  581. .roam_scan_mode = WMI_10_4_ROAM_SCAN_MODE,
  582. .roam_scan_rssi_threshold = WMI_10_4_ROAM_SCAN_RSSI_THRESHOLD,
  583. .roam_scan_period = WMI_10_4_ROAM_SCAN_PERIOD,
  584. .roam_scan_rssi_change_threshold =
  585. WMI_10_4_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  586. .roam_ap_profile = WMI_10_4_ROAM_AP_PROFILE,
  587. .ofl_scan_add_ap_profile = WMI_10_4_OFL_SCAN_ADD_AP_PROFILE,
  588. .ofl_scan_remove_ap_profile = WMI_10_4_OFL_SCAN_REMOVE_AP_PROFILE,
  589. .ofl_scan_period = WMI_10_4_OFL_SCAN_PERIOD,
  590. .p2p_dev_set_device_info = WMI_10_4_P2P_DEV_SET_DEVICE_INFO,
  591. .p2p_dev_set_discoverability = WMI_10_4_P2P_DEV_SET_DISCOVERABILITY,
  592. .p2p_go_set_beacon_ie = WMI_10_4_P2P_GO_SET_BEACON_IE,
  593. .p2p_go_set_probe_resp_ie = WMI_10_4_P2P_GO_SET_PROBE_RESP_IE,
  594. .p2p_set_vendor_ie_data_cmdid = WMI_10_4_P2P_SET_VENDOR_IE_DATA_CMDID,
  595. .ap_ps_peer_param_cmdid = WMI_10_4_AP_PS_PEER_PARAM_CMDID,
  596. .ap_ps_peer_uapsd_coex_cmdid = WMI_10_4_AP_PS_PEER_UAPSD_COEX_CMDID,
  597. .peer_rate_retry_sched_cmdid = WMI_10_4_PEER_RATE_RETRY_SCHED_CMDID,
  598. .wlan_profile_trigger_cmdid = WMI_10_4_WLAN_PROFILE_TRIGGER_CMDID,
  599. .wlan_profile_set_hist_intvl_cmdid =
  600. WMI_10_4_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  601. .wlan_profile_get_profile_data_cmdid =
  602. WMI_10_4_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  603. .wlan_profile_enable_profile_id_cmdid =
  604. WMI_10_4_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  605. .wlan_profile_list_profile_id_cmdid =
  606. WMI_10_4_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  607. .pdev_suspend_cmdid = WMI_10_4_PDEV_SUSPEND_CMDID,
  608. .pdev_resume_cmdid = WMI_10_4_PDEV_RESUME_CMDID,
  609. .add_bcn_filter_cmdid = WMI_10_4_ADD_BCN_FILTER_CMDID,
  610. .rmv_bcn_filter_cmdid = WMI_10_4_RMV_BCN_FILTER_CMDID,
  611. .wow_add_wake_pattern_cmdid = WMI_10_4_WOW_ADD_WAKE_PATTERN_CMDID,
  612. .wow_del_wake_pattern_cmdid = WMI_10_4_WOW_DEL_WAKE_PATTERN_CMDID,
  613. .wow_enable_disable_wake_event_cmdid =
  614. WMI_10_4_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  615. .wow_enable_cmdid = WMI_10_4_WOW_ENABLE_CMDID,
  616. .wow_hostwakeup_from_sleep_cmdid =
  617. WMI_10_4_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  618. .rtt_measreq_cmdid = WMI_10_4_RTT_MEASREQ_CMDID,
  619. .rtt_tsf_cmdid = WMI_10_4_RTT_TSF_CMDID,
  620. .vdev_spectral_scan_configure_cmdid =
  621. WMI_10_4_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  622. .vdev_spectral_scan_enable_cmdid =
  623. WMI_10_4_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  624. .request_stats_cmdid = WMI_10_4_REQUEST_STATS_CMDID,
  625. .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
  626. .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
  627. .gtk_offload_cmdid = WMI_10_4_GTK_OFFLOAD_CMDID,
  628. .csa_offload_enable_cmdid = WMI_10_4_CSA_OFFLOAD_ENABLE_CMDID,
  629. .csa_offload_chanswitch_cmdid = WMI_10_4_CSA_OFFLOAD_CHANSWITCH_CMDID,
  630. .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
  631. .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
  632. .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
  633. .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
  634. .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
  635. .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
  636. .echo_cmdid = WMI_10_4_ECHO_CMDID,
  637. .pdev_utf_cmdid = WMI_10_4_PDEV_UTF_CMDID,
  638. .dbglog_cfg_cmdid = WMI_10_4_DBGLOG_CFG_CMDID,
  639. .pdev_qvit_cmdid = WMI_10_4_PDEV_QVIT_CMDID,
  640. .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
  641. .vdev_set_keepalive_cmdid = WMI_10_4_VDEV_SET_KEEPALIVE_CMDID,
  642. .vdev_get_keepalive_cmdid = WMI_10_4_VDEV_GET_KEEPALIVE_CMDID,
  643. .force_fw_hang_cmdid = WMI_10_4_FORCE_FW_HANG_CMDID,
  644. .gpio_config_cmdid = WMI_10_4_GPIO_CONFIG_CMDID,
  645. .gpio_output_cmdid = WMI_10_4_GPIO_OUTPUT_CMDID,
  646. .pdev_get_temperature_cmdid = WMI_10_4_PDEV_GET_TEMPERATURE_CMDID,
  647. .vdev_set_wmm_params_cmdid = WMI_CMD_UNSUPPORTED,
  648. .adaptive_qcs_cmdid = WMI_CMD_UNSUPPORTED,
  649. .scan_update_request_cmdid = WMI_10_4_SCAN_UPDATE_REQUEST_CMDID,
  650. .vdev_standby_response_cmdid = WMI_10_4_VDEV_STANDBY_RESPONSE_CMDID,
  651. .vdev_resume_response_cmdid = WMI_10_4_VDEV_RESUME_RESPONSE_CMDID,
  652. .wlan_peer_caching_add_peer_cmdid =
  653. WMI_10_4_WLAN_PEER_CACHING_ADD_PEER_CMDID,
  654. .wlan_peer_caching_evict_peer_cmdid =
  655. WMI_10_4_WLAN_PEER_CACHING_EVICT_PEER_CMDID,
  656. .wlan_peer_caching_restore_peer_cmdid =
  657. WMI_10_4_WLAN_PEER_CACHING_RESTORE_PEER_CMDID,
  658. .wlan_peer_caching_print_all_peers_info_cmdid =
  659. WMI_10_4_WLAN_PEER_CACHING_PRINT_ALL_PEERS_INFO_CMDID,
  660. .peer_update_wds_entry_cmdid = WMI_10_4_PEER_UPDATE_WDS_ENTRY_CMDID,
  661. .peer_add_proxy_sta_entry_cmdid =
  662. WMI_10_4_PEER_ADD_PROXY_STA_ENTRY_CMDID,
  663. .rtt_keepalive_cmdid = WMI_10_4_RTT_KEEPALIVE_CMDID,
  664. .oem_req_cmdid = WMI_10_4_OEM_REQ_CMDID,
  665. .nan_cmdid = WMI_10_4_NAN_CMDID,
  666. .vdev_ratemask_cmdid = WMI_10_4_VDEV_RATEMASK_CMDID,
  667. .qboost_cfg_cmdid = WMI_10_4_QBOOST_CFG_CMDID,
  668. .pdev_smart_ant_enable_cmdid = WMI_10_4_PDEV_SMART_ANT_ENABLE_CMDID,
  669. .pdev_smart_ant_set_rx_antenna_cmdid =
  670. WMI_10_4_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
  671. .peer_smart_ant_set_tx_antenna_cmdid =
  672. WMI_10_4_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
  673. .peer_smart_ant_set_train_info_cmdid =
  674. WMI_10_4_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
  675. .peer_smart_ant_set_node_config_ops_cmdid =
  676. WMI_10_4_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
  677. .pdev_set_antenna_switch_table_cmdid =
  678. WMI_10_4_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
  679. .pdev_set_ctl_table_cmdid = WMI_10_4_PDEV_SET_CTL_TABLE_CMDID,
  680. .pdev_set_mimogain_table_cmdid = WMI_10_4_PDEV_SET_MIMOGAIN_TABLE_CMDID,
  681. .pdev_ratepwr_table_cmdid = WMI_10_4_PDEV_RATEPWR_TABLE_CMDID,
  682. .pdev_ratepwr_chainmsk_table_cmdid =
  683. WMI_10_4_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID,
  684. .pdev_fips_cmdid = WMI_10_4_PDEV_FIPS_CMDID,
  685. .tt_set_conf_cmdid = WMI_10_4_TT_SET_CONF_CMDID,
  686. .fwtest_cmdid = WMI_10_4_FWTEST_CMDID,
  687. .vdev_atf_request_cmdid = WMI_10_4_VDEV_ATF_REQUEST_CMDID,
  688. .peer_atf_request_cmdid = WMI_10_4_PEER_ATF_REQUEST_CMDID,
  689. .pdev_get_ani_cck_config_cmdid = WMI_10_4_PDEV_GET_ANI_CCK_CONFIG_CMDID,
  690. .pdev_get_ani_ofdm_config_cmdid =
  691. WMI_10_4_PDEV_GET_ANI_OFDM_CONFIG_CMDID,
  692. .pdev_reserve_ast_entry_cmdid = WMI_10_4_PDEV_RESERVE_AST_ENTRY_CMDID,
  693. .pdev_get_nfcal_power_cmdid = WMI_10_4_PDEV_GET_NFCAL_POWER_CMDID,
  694. .pdev_get_tpc_cmdid = WMI_10_4_PDEV_GET_TPC_CMDID,
  695. .pdev_get_ast_info_cmdid = WMI_10_4_PDEV_GET_AST_INFO_CMDID,
  696. .vdev_set_dscp_tid_map_cmdid = WMI_10_4_VDEV_SET_DSCP_TID_MAP_CMDID,
  697. .pdev_get_info_cmdid = WMI_10_4_PDEV_GET_INFO_CMDID,
  698. .vdev_get_info_cmdid = WMI_10_4_VDEV_GET_INFO_CMDID,
  699. .vdev_filter_neighbor_rx_packets_cmdid =
  700. WMI_10_4_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID,
  701. .mu_cal_start_cmdid = WMI_10_4_MU_CAL_START_CMDID,
  702. .set_cca_params_cmdid = WMI_10_4_SET_CCA_PARAMS_CMDID,
  703. .pdev_bss_chan_info_request_cmdid =
  704. WMI_10_4_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
  705. .ext_resource_cfg_cmdid = WMI_10_4_EXT_RESOURCE_CFG_CMDID,
  706. .vdev_set_ie_cmdid = WMI_10_4_VDEV_SET_IE_CMDID,
  707. .set_lteu_config_cmdid = WMI_10_4_SET_LTEU_CONFIG_CMDID,
  708. .atf_ssid_grouping_request_cmdid =
  709. WMI_10_4_ATF_SSID_GROUPING_REQUEST_CMDID,
  710. .peer_atf_ext_request_cmdid = WMI_10_4_PEER_ATF_EXT_REQUEST_CMDID,
  711. .set_periodic_channel_stats_cfg_cmdid =
  712. WMI_10_4_SET_PERIODIC_CHANNEL_STATS_CONFIG,
  713. .peer_bwf_request_cmdid = WMI_10_4_PEER_BWF_REQUEST_CMDID,
  714. .btcoex_cfg_cmdid = WMI_10_4_BTCOEX_CFG_CMDID,
  715. .peer_tx_mu_txmit_count_cmdid = WMI_10_4_PEER_TX_MU_TXMIT_COUNT_CMDID,
  716. .peer_tx_mu_txmit_rstcnt_cmdid = WMI_10_4_PEER_TX_MU_TXMIT_RSTCNT_CMDID,
  717. .peer_gid_userpos_list_cmdid = WMI_10_4_PEER_GID_USERPOS_LIST_CMDID,
  718. .pdev_check_cal_version_cmdid = WMI_10_4_PDEV_CHECK_CAL_VERSION_CMDID,
  719. .coex_version_cfg_cmid = WMI_10_4_COEX_VERSION_CFG_CMID,
  720. .pdev_get_rx_filter_cmdid = WMI_10_4_PDEV_GET_RX_FILTER_CMDID,
  721. .pdev_extended_nss_cfg_cmdid = WMI_10_4_PDEV_EXTENDED_NSS_CFG_CMDID,
  722. .vdev_set_scan_nac_rssi_cmdid = WMI_10_4_VDEV_SET_SCAN_NAC_RSSI_CMDID,
  723. .prog_gpio_band_select_cmdid = WMI_10_4_PROG_GPIO_BAND_SELECT_CMDID,
  724. .config_smart_logging_cmdid = WMI_10_4_CONFIG_SMART_LOGGING_CMDID,
  725. .debug_fatal_condition_cmdid = WMI_10_4_DEBUG_FATAL_CONDITION_CMDID,
  726. .get_tsf_timer_cmdid = WMI_10_4_GET_TSF_TIMER_CMDID,
  727. .pdev_get_tpc_table_cmdid = WMI_10_4_PDEV_GET_TPC_TABLE_CMDID,
  728. .vdev_sifs_trigger_time_cmdid = WMI_10_4_VDEV_SIFS_TRIGGER_TIME_CMDID,
  729. .pdev_wds_entry_list_cmdid = WMI_10_4_PDEV_WDS_ENTRY_LIST_CMDID,
  730. .tdls_set_state_cmdid = WMI_10_4_TDLS_SET_STATE_CMDID,
  731. .tdls_peer_update_cmdid = WMI_10_4_TDLS_PEER_UPDATE_CMDID,
  732. .tdls_set_offchan_mode_cmdid = WMI_10_4_TDLS_SET_OFFCHAN_MODE_CMDID,
  733. };
  734. /* MAIN WMI VDEV param map */
  735. static struct wmi_vdev_param_map wmi_vdev_param_map = {
  736. .rts_threshold = WMI_VDEV_PARAM_RTS_THRESHOLD,
  737. .fragmentation_threshold = WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
  738. .beacon_interval = WMI_VDEV_PARAM_BEACON_INTERVAL,
  739. .listen_interval = WMI_VDEV_PARAM_LISTEN_INTERVAL,
  740. .multicast_rate = WMI_VDEV_PARAM_MULTICAST_RATE,
  741. .mgmt_tx_rate = WMI_VDEV_PARAM_MGMT_TX_RATE,
  742. .slot_time = WMI_VDEV_PARAM_SLOT_TIME,
  743. .preamble = WMI_VDEV_PARAM_PREAMBLE,
  744. .swba_time = WMI_VDEV_PARAM_SWBA_TIME,
  745. .wmi_vdev_stats_update_period = WMI_VDEV_STATS_UPDATE_PERIOD,
  746. .wmi_vdev_pwrsave_ageout_time = WMI_VDEV_PWRSAVE_AGEOUT_TIME,
  747. .wmi_vdev_host_swba_interval = WMI_VDEV_HOST_SWBA_INTERVAL,
  748. .dtim_period = WMI_VDEV_PARAM_DTIM_PERIOD,
  749. .wmi_vdev_oc_scheduler_air_time_limit =
  750. WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
  751. .wds = WMI_VDEV_PARAM_WDS,
  752. .atim_window = WMI_VDEV_PARAM_ATIM_WINDOW,
  753. .bmiss_count_max = WMI_VDEV_PARAM_BMISS_COUNT_MAX,
  754. .bmiss_first_bcnt = WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
  755. .bmiss_final_bcnt = WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
  756. .feature_wmm = WMI_VDEV_PARAM_FEATURE_WMM,
  757. .chwidth = WMI_VDEV_PARAM_CHWIDTH,
  758. .chextoffset = WMI_VDEV_PARAM_CHEXTOFFSET,
  759. .disable_htprotection = WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
  760. .sta_quickkickout = WMI_VDEV_PARAM_STA_QUICKKICKOUT,
  761. .mgmt_rate = WMI_VDEV_PARAM_MGMT_RATE,
  762. .protection_mode = WMI_VDEV_PARAM_PROTECTION_MODE,
  763. .fixed_rate = WMI_VDEV_PARAM_FIXED_RATE,
  764. .sgi = WMI_VDEV_PARAM_SGI,
  765. .ldpc = WMI_VDEV_PARAM_LDPC,
  766. .tx_stbc = WMI_VDEV_PARAM_TX_STBC,
  767. .rx_stbc = WMI_VDEV_PARAM_RX_STBC,
  768. .intra_bss_fwd = WMI_VDEV_PARAM_INTRA_BSS_FWD,
  769. .def_keyid = WMI_VDEV_PARAM_DEF_KEYID,
  770. .nss = WMI_VDEV_PARAM_NSS,
  771. .bcast_data_rate = WMI_VDEV_PARAM_BCAST_DATA_RATE,
  772. .mcast_data_rate = WMI_VDEV_PARAM_MCAST_DATA_RATE,
  773. .mcast_indicate = WMI_VDEV_PARAM_MCAST_INDICATE,
  774. .dhcp_indicate = WMI_VDEV_PARAM_DHCP_INDICATE,
  775. .unknown_dest_indicate = WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
  776. .ap_keepalive_min_idle_inactive_time_secs =
  777. WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
  778. .ap_keepalive_max_idle_inactive_time_secs =
  779. WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
  780. .ap_keepalive_max_unresponsive_time_secs =
  781. WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
  782. .ap_enable_nawds = WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
  783. .mcast2ucast_set = WMI_VDEV_PARAM_UNSUPPORTED,
  784. .enable_rtscts = WMI_VDEV_PARAM_ENABLE_RTSCTS,
  785. .txbf = WMI_VDEV_PARAM_TXBF,
  786. .packet_powersave = WMI_VDEV_PARAM_PACKET_POWERSAVE,
  787. .drop_unencry = WMI_VDEV_PARAM_DROP_UNENCRY,
  788. .tx_encap_type = WMI_VDEV_PARAM_TX_ENCAP_TYPE,
  789. .ap_detect_out_of_sync_sleeping_sta_time_secs =
  790. WMI_VDEV_PARAM_UNSUPPORTED,
  791. .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
  792. .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
  793. .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
  794. .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
  795. .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
  796. .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  797. .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
  798. .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
  799. .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
  800. .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
  801. .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
  802. .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
  803. .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
  804. .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
  805. .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  806. .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  807. };
  808. /* 10.X WMI VDEV param map */
  809. static struct wmi_vdev_param_map wmi_10x_vdev_param_map = {
  810. .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
  811. .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
  812. .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
  813. .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
  814. .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
  815. .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
  816. .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
  817. .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
  818. .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
  819. .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
  820. .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
  821. .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
  822. .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
  823. .wmi_vdev_oc_scheduler_air_time_limit =
  824. WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
  825. .wds = WMI_10X_VDEV_PARAM_WDS,
  826. .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
  827. .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
  828. .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
  829. .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
  830. .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
  831. .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
  832. .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
  833. .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
  834. .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
  835. .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
  836. .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
  837. .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
  838. .sgi = WMI_10X_VDEV_PARAM_SGI,
  839. .ldpc = WMI_10X_VDEV_PARAM_LDPC,
  840. .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
  841. .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
  842. .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
  843. .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
  844. .nss = WMI_10X_VDEV_PARAM_NSS,
  845. .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
  846. .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
  847. .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
  848. .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
  849. .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
  850. .ap_keepalive_min_idle_inactive_time_secs =
  851. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
  852. .ap_keepalive_max_idle_inactive_time_secs =
  853. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
  854. .ap_keepalive_max_unresponsive_time_secs =
  855. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
  856. .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
  857. .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
  858. .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
  859. .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
  860. .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
  861. .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
  862. .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  863. .ap_detect_out_of_sync_sleeping_sta_time_secs =
  864. WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
  865. .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
  866. .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
  867. .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
  868. .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
  869. .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
  870. .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  871. .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
  872. .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
  873. .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
  874. .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
  875. .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
  876. .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
  877. .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
  878. .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
  879. .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  880. .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  881. };
  882. static struct wmi_vdev_param_map wmi_10_2_4_vdev_param_map = {
  883. .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
  884. .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
  885. .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
  886. .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
  887. .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
  888. .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
  889. .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
  890. .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
  891. .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
  892. .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
  893. .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
  894. .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
  895. .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
  896. .wmi_vdev_oc_scheduler_air_time_limit =
  897. WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
  898. .wds = WMI_10X_VDEV_PARAM_WDS,
  899. .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
  900. .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
  901. .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
  902. .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
  903. .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
  904. .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
  905. .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
  906. .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
  907. .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
  908. .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
  909. .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
  910. .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
  911. .sgi = WMI_10X_VDEV_PARAM_SGI,
  912. .ldpc = WMI_10X_VDEV_PARAM_LDPC,
  913. .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
  914. .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
  915. .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
  916. .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
  917. .nss = WMI_10X_VDEV_PARAM_NSS,
  918. .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
  919. .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
  920. .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
  921. .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
  922. .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
  923. .ap_keepalive_min_idle_inactive_time_secs =
  924. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
  925. .ap_keepalive_max_idle_inactive_time_secs =
  926. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
  927. .ap_keepalive_max_unresponsive_time_secs =
  928. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
  929. .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
  930. .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
  931. .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
  932. .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
  933. .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
  934. .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
  935. .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  936. .ap_detect_out_of_sync_sleeping_sta_time_secs =
  937. WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
  938. .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
  939. .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
  940. .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
  941. .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
  942. .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
  943. .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  944. .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
  945. .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
  946. .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
  947. .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
  948. .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
  949. .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
  950. .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
  951. .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
  952. .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  953. .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  954. };
  955. static struct wmi_vdev_param_map wmi_10_4_vdev_param_map = {
  956. .rts_threshold = WMI_10_4_VDEV_PARAM_RTS_THRESHOLD,
  957. .fragmentation_threshold = WMI_10_4_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
  958. .beacon_interval = WMI_10_4_VDEV_PARAM_BEACON_INTERVAL,
  959. .listen_interval = WMI_10_4_VDEV_PARAM_LISTEN_INTERVAL,
  960. .multicast_rate = WMI_10_4_VDEV_PARAM_MULTICAST_RATE,
  961. .mgmt_tx_rate = WMI_10_4_VDEV_PARAM_MGMT_TX_RATE,
  962. .slot_time = WMI_10_4_VDEV_PARAM_SLOT_TIME,
  963. .preamble = WMI_10_4_VDEV_PARAM_PREAMBLE,
  964. .swba_time = WMI_10_4_VDEV_PARAM_SWBA_TIME,
  965. .wmi_vdev_stats_update_period = WMI_10_4_VDEV_STATS_UPDATE_PERIOD,
  966. .wmi_vdev_pwrsave_ageout_time = WMI_10_4_VDEV_PWRSAVE_AGEOUT_TIME,
  967. .wmi_vdev_host_swba_interval = WMI_10_4_VDEV_HOST_SWBA_INTERVAL,
  968. .dtim_period = WMI_10_4_VDEV_PARAM_DTIM_PERIOD,
  969. .wmi_vdev_oc_scheduler_air_time_limit =
  970. WMI_10_4_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
  971. .wds = WMI_10_4_VDEV_PARAM_WDS,
  972. .atim_window = WMI_10_4_VDEV_PARAM_ATIM_WINDOW,
  973. .bmiss_count_max = WMI_10_4_VDEV_PARAM_BMISS_COUNT_MAX,
  974. .bmiss_first_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FIRST_BCNT,
  975. .bmiss_final_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FINAL_BCNT,
  976. .feature_wmm = WMI_10_4_VDEV_PARAM_FEATURE_WMM,
  977. .chwidth = WMI_10_4_VDEV_PARAM_CHWIDTH,
  978. .chextoffset = WMI_10_4_VDEV_PARAM_CHEXTOFFSET,
  979. .disable_htprotection = WMI_10_4_VDEV_PARAM_DISABLE_HTPROTECTION,
  980. .sta_quickkickout = WMI_10_4_VDEV_PARAM_STA_QUICKKICKOUT,
  981. .mgmt_rate = WMI_10_4_VDEV_PARAM_MGMT_RATE,
  982. .protection_mode = WMI_10_4_VDEV_PARAM_PROTECTION_MODE,
  983. .fixed_rate = WMI_10_4_VDEV_PARAM_FIXED_RATE,
  984. .sgi = WMI_10_4_VDEV_PARAM_SGI,
  985. .ldpc = WMI_10_4_VDEV_PARAM_LDPC,
  986. .tx_stbc = WMI_10_4_VDEV_PARAM_TX_STBC,
  987. .rx_stbc = WMI_10_4_VDEV_PARAM_RX_STBC,
  988. .intra_bss_fwd = WMI_10_4_VDEV_PARAM_INTRA_BSS_FWD,
  989. .def_keyid = WMI_10_4_VDEV_PARAM_DEF_KEYID,
  990. .nss = WMI_10_4_VDEV_PARAM_NSS,
  991. .bcast_data_rate = WMI_10_4_VDEV_PARAM_BCAST_DATA_RATE,
  992. .mcast_data_rate = WMI_10_4_VDEV_PARAM_MCAST_DATA_RATE,
  993. .mcast_indicate = WMI_10_4_VDEV_PARAM_MCAST_INDICATE,
  994. .dhcp_indicate = WMI_10_4_VDEV_PARAM_DHCP_INDICATE,
  995. .unknown_dest_indicate = WMI_10_4_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
  996. .ap_keepalive_min_idle_inactive_time_secs =
  997. WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
  998. .ap_keepalive_max_idle_inactive_time_secs =
  999. WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
  1000. .ap_keepalive_max_unresponsive_time_secs =
  1001. WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
  1002. .ap_enable_nawds = WMI_10_4_VDEV_PARAM_AP_ENABLE_NAWDS,
  1003. .mcast2ucast_set = WMI_10_4_VDEV_PARAM_MCAST2UCAST_SET,
  1004. .enable_rtscts = WMI_10_4_VDEV_PARAM_ENABLE_RTSCTS,
  1005. .txbf = WMI_10_4_VDEV_PARAM_TXBF,
  1006. .packet_powersave = WMI_10_4_VDEV_PARAM_PACKET_POWERSAVE,
  1007. .drop_unencry = WMI_10_4_VDEV_PARAM_DROP_UNENCRY,
  1008. .tx_encap_type = WMI_10_4_VDEV_PARAM_TX_ENCAP_TYPE,
  1009. .ap_detect_out_of_sync_sleeping_sta_time_secs =
  1010. WMI_10_4_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
  1011. .rc_num_retries = WMI_10_4_VDEV_PARAM_RC_NUM_RETRIES,
  1012. .cabq_maxdur = WMI_10_4_VDEV_PARAM_CABQ_MAXDUR,
  1013. .mfptest_set = WMI_10_4_VDEV_PARAM_MFPTEST_SET,
  1014. .rts_fixed_rate = WMI_10_4_VDEV_PARAM_RTS_FIXED_RATE,
  1015. .vht_sgimask = WMI_10_4_VDEV_PARAM_VHT_SGIMASK,
  1016. .vht80_ratemask = WMI_10_4_VDEV_PARAM_VHT80_RATEMASK,
  1017. .early_rx_adjust_enable = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE,
  1018. .early_rx_tgt_bmiss_num = WMI_10_4_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM,
  1019. .early_rx_bmiss_sample_cycle =
  1020. WMI_10_4_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE,
  1021. .early_rx_slop_step = WMI_10_4_VDEV_PARAM_EARLY_RX_SLOP_STEP,
  1022. .early_rx_init_slop = WMI_10_4_VDEV_PARAM_EARLY_RX_INIT_SLOP,
  1023. .early_rx_adjust_pause = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE,
  1024. .proxy_sta = WMI_10_4_VDEV_PARAM_PROXY_STA,
  1025. .meru_vc = WMI_10_4_VDEV_PARAM_MERU_VC,
  1026. .rx_decap_type = WMI_10_4_VDEV_PARAM_RX_DECAP_TYPE,
  1027. .bw_nss_ratemask = WMI_10_4_VDEV_PARAM_BW_NSS_RATEMASK,
  1028. .inc_tsf = WMI_10_4_VDEV_PARAM_TSF_INCREMENT,
  1029. .dec_tsf = WMI_10_4_VDEV_PARAM_TSF_DECREMENT,
  1030. };
  1031. static struct wmi_pdev_param_map wmi_pdev_param_map = {
  1032. .tx_chain_mask = WMI_PDEV_PARAM_TX_CHAIN_MASK,
  1033. .rx_chain_mask = WMI_PDEV_PARAM_RX_CHAIN_MASK,
  1034. .txpower_limit2g = WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
  1035. .txpower_limit5g = WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
  1036. .txpower_scale = WMI_PDEV_PARAM_TXPOWER_SCALE,
  1037. .beacon_gen_mode = WMI_PDEV_PARAM_BEACON_GEN_MODE,
  1038. .beacon_tx_mode = WMI_PDEV_PARAM_BEACON_TX_MODE,
  1039. .resmgr_offchan_mode = WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
  1040. .protection_mode = WMI_PDEV_PARAM_PROTECTION_MODE,
  1041. .dynamic_bw = WMI_PDEV_PARAM_DYNAMIC_BW,
  1042. .non_agg_sw_retry_th = WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
  1043. .agg_sw_retry_th = WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
  1044. .sta_kickout_th = WMI_PDEV_PARAM_STA_KICKOUT_TH,
  1045. .ac_aggrsize_scaling = WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
  1046. .ltr_enable = WMI_PDEV_PARAM_LTR_ENABLE,
  1047. .ltr_ac_latency_be = WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
  1048. .ltr_ac_latency_bk = WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
  1049. .ltr_ac_latency_vi = WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
  1050. .ltr_ac_latency_vo = WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
  1051. .ltr_ac_latency_timeout = WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
  1052. .ltr_sleep_override = WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
  1053. .ltr_rx_override = WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
  1054. .ltr_tx_activity_timeout = WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
  1055. .l1ss_enable = WMI_PDEV_PARAM_L1SS_ENABLE,
  1056. .dsleep_enable = WMI_PDEV_PARAM_DSLEEP_ENABLE,
  1057. .pcielp_txbuf_flush = WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
  1058. .pcielp_txbuf_watermark = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
  1059. .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
  1060. .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
  1061. .pdev_stats_update_period = WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
  1062. .vdev_stats_update_period = WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
  1063. .peer_stats_update_period = WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
  1064. .bcnflt_stats_update_period = WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
  1065. .pmf_qos = WMI_PDEV_PARAM_PMF_QOS,
  1066. .arp_ac_override = WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
  1067. .dcs = WMI_PDEV_PARAM_DCS,
  1068. .ani_enable = WMI_PDEV_PARAM_ANI_ENABLE,
  1069. .ani_poll_period = WMI_PDEV_PARAM_ANI_POLL_PERIOD,
  1070. .ani_listen_period = WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
  1071. .ani_ofdm_level = WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
  1072. .ani_cck_level = WMI_PDEV_PARAM_ANI_CCK_LEVEL,
  1073. .dyntxchain = WMI_PDEV_PARAM_DYNTXCHAIN,
  1074. .proxy_sta = WMI_PDEV_PARAM_PROXY_STA,
  1075. .idle_ps_config = WMI_PDEV_PARAM_IDLE_PS_CONFIG,
  1076. .power_gating_sleep = WMI_PDEV_PARAM_POWER_GATING_SLEEP,
  1077. .fast_channel_reset = WMI_PDEV_PARAM_UNSUPPORTED,
  1078. .burst_dur = WMI_PDEV_PARAM_UNSUPPORTED,
  1079. .burst_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1080. .cal_period = WMI_PDEV_PARAM_UNSUPPORTED,
  1081. .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
  1082. .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1083. .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
  1084. .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1085. .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1086. .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
  1087. .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
  1088. .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1089. .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1090. .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1091. .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1092. .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1093. .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1094. .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1095. .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
  1096. .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1097. .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1098. .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1099. .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1100. .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1101. .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1102. .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
  1103. .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
  1104. .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
  1105. .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1106. .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1107. .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
  1108. .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
  1109. .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
  1110. .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
  1111. .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
  1112. .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
  1113. .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
  1114. .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
  1115. .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1116. .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1117. .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1118. .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
  1119. .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
  1120. .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
  1121. .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1122. .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1123. .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED,
  1124. };
  1125. static struct wmi_pdev_param_map wmi_10x_pdev_param_map = {
  1126. .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
  1127. .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
  1128. .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
  1129. .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
  1130. .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
  1131. .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
  1132. .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
  1133. .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
  1134. .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
  1135. .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
  1136. .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
  1137. .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
  1138. .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
  1139. .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
  1140. .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
  1141. .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
  1142. .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
  1143. .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
  1144. .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
  1145. .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
  1146. .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
  1147. .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
  1148. .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
  1149. .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
  1150. .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
  1151. .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
  1152. .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
  1153. .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
  1154. .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
  1155. .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
  1156. .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
  1157. .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
  1158. .bcnflt_stats_update_period =
  1159. WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
  1160. .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
  1161. .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
  1162. .dcs = WMI_10X_PDEV_PARAM_DCS,
  1163. .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
  1164. .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
  1165. .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
  1166. .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
  1167. .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
  1168. .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
  1169. .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
  1170. .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
  1171. .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
  1172. .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
  1173. .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
  1174. .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
  1175. .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD,
  1176. .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
  1177. .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1178. .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
  1179. .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1180. .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1181. .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
  1182. .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
  1183. .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1184. .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1185. .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1186. .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1187. .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1188. .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1189. .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1190. .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
  1191. .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1192. .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1193. .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1194. .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1195. .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1196. .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1197. .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
  1198. .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
  1199. .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
  1200. .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1201. .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1202. .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
  1203. .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
  1204. .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
  1205. .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
  1206. .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
  1207. .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
  1208. .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
  1209. .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
  1210. .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1211. .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1212. .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1213. .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
  1214. .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
  1215. .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
  1216. .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1217. .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1218. .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED,
  1219. };
  1220. static struct wmi_pdev_param_map wmi_10_2_4_pdev_param_map = {
  1221. .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
  1222. .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
  1223. .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
  1224. .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
  1225. .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
  1226. .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
  1227. .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
  1228. .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
  1229. .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
  1230. .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
  1231. .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
  1232. .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
  1233. .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
  1234. .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
  1235. .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
  1236. .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
  1237. .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
  1238. .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
  1239. .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
  1240. .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
  1241. .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
  1242. .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
  1243. .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
  1244. .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
  1245. .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
  1246. .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
  1247. .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
  1248. .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
  1249. .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
  1250. .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
  1251. .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
  1252. .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
  1253. .bcnflt_stats_update_period =
  1254. WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
  1255. .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
  1256. .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
  1257. .dcs = WMI_10X_PDEV_PARAM_DCS,
  1258. .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
  1259. .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
  1260. .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
  1261. .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
  1262. .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
  1263. .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
  1264. .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
  1265. .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
  1266. .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
  1267. .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
  1268. .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
  1269. .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
  1270. .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD,
  1271. .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
  1272. .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1273. .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
  1274. .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1275. .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1276. .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
  1277. .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
  1278. .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1279. .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1280. .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1281. .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1282. .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1283. .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1284. .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1285. .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
  1286. .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1287. .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1288. .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1289. .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1290. .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1291. .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1292. .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
  1293. .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
  1294. .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
  1295. .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1296. .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1297. .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
  1298. .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
  1299. .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
  1300. .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
  1301. .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
  1302. .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
  1303. .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
  1304. .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
  1305. .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1306. .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1307. .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1308. .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
  1309. .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
  1310. .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
  1311. .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1312. .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1313. .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED,
  1314. };
  1315. /* firmware 10.2 specific mappings */
  1316. static struct wmi_cmd_map wmi_10_2_cmd_map = {
  1317. .init_cmdid = WMI_10_2_INIT_CMDID,
  1318. .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
  1319. .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
  1320. .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
  1321. .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
  1322. .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
  1323. .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
  1324. .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
  1325. .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
  1326. .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
  1327. .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
  1328. .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
  1329. .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
  1330. .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
  1331. .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  1332. .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
  1333. .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
  1334. .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
  1335. .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
  1336. .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
  1337. .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
  1338. .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
  1339. .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
  1340. .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
  1341. .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
  1342. .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
  1343. .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
  1344. .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
  1345. .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
  1346. .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
  1347. .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
  1348. .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
  1349. .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
  1350. .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
  1351. .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
  1352. .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
  1353. .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  1354. .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
  1355. .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
  1356. .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
  1357. .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  1358. .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
  1359. .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
  1360. .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
  1361. .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
  1362. .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
  1363. .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
  1364. .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
  1365. .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
  1366. .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
  1367. .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
  1368. .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
  1369. .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
  1370. .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
  1371. .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
  1372. .roam_scan_rssi_change_threshold =
  1373. WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  1374. .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
  1375. .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
  1376. .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
  1377. .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
  1378. .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
  1379. .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
  1380. .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
  1381. .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
  1382. .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
  1383. .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
  1384. .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
  1385. .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
  1386. .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
  1387. .wlan_profile_set_hist_intvl_cmdid =
  1388. WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  1389. .wlan_profile_get_profile_data_cmdid =
  1390. WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  1391. .wlan_profile_enable_profile_id_cmdid =
  1392. WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  1393. .wlan_profile_list_profile_id_cmdid =
  1394. WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  1395. .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
  1396. .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
  1397. .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
  1398. .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
  1399. .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
  1400. .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
  1401. .wow_enable_disable_wake_event_cmdid =
  1402. WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  1403. .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
  1404. .wow_hostwakeup_from_sleep_cmdid =
  1405. WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  1406. .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
  1407. .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
  1408. .vdev_spectral_scan_configure_cmdid =
  1409. WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  1410. .vdev_spectral_scan_enable_cmdid =
  1411. WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  1412. .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
  1413. .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
  1414. .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
  1415. .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
  1416. .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
  1417. .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
  1418. .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
  1419. .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
  1420. .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
  1421. .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
  1422. .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
  1423. .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
  1424. .echo_cmdid = WMI_10_2_ECHO_CMDID,
  1425. .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
  1426. .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
  1427. .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
  1428. .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
  1429. .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  1430. .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  1431. .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
  1432. .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
  1433. .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
  1434. .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
  1435. .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
  1436. .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
  1437. .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
  1438. .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
  1439. .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
  1440. .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
  1441. .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
  1442. .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
  1443. .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
  1444. .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
  1445. .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  1446. .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
  1447. .nan_cmdid = WMI_CMD_UNSUPPORTED,
  1448. .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
  1449. .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
  1450. .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
  1451. .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  1452. .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  1453. .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
  1454. .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
  1455. .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
  1456. .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
  1457. .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
  1458. .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
  1459. .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
  1460. .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
  1461. .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
  1462. .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
  1463. .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  1464. .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  1465. .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
  1466. .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
  1467. .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
  1468. };
  1469. static struct wmi_pdev_param_map wmi_10_4_pdev_param_map = {
  1470. .tx_chain_mask = WMI_10_4_PDEV_PARAM_TX_CHAIN_MASK,
  1471. .rx_chain_mask = WMI_10_4_PDEV_PARAM_RX_CHAIN_MASK,
  1472. .txpower_limit2g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT2G,
  1473. .txpower_limit5g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT5G,
  1474. .txpower_scale = WMI_10_4_PDEV_PARAM_TXPOWER_SCALE,
  1475. .beacon_gen_mode = WMI_10_4_PDEV_PARAM_BEACON_GEN_MODE,
  1476. .beacon_tx_mode = WMI_10_4_PDEV_PARAM_BEACON_TX_MODE,
  1477. .resmgr_offchan_mode = WMI_10_4_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
  1478. .protection_mode = WMI_10_4_PDEV_PARAM_PROTECTION_MODE,
  1479. .dynamic_bw = WMI_10_4_PDEV_PARAM_DYNAMIC_BW,
  1480. .non_agg_sw_retry_th = WMI_10_4_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
  1481. .agg_sw_retry_th = WMI_10_4_PDEV_PARAM_AGG_SW_RETRY_TH,
  1482. .sta_kickout_th = WMI_10_4_PDEV_PARAM_STA_KICKOUT_TH,
  1483. .ac_aggrsize_scaling = WMI_10_4_PDEV_PARAM_AC_AGGRSIZE_SCALING,
  1484. .ltr_enable = WMI_10_4_PDEV_PARAM_LTR_ENABLE,
  1485. .ltr_ac_latency_be = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BE,
  1486. .ltr_ac_latency_bk = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BK,
  1487. .ltr_ac_latency_vi = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VI,
  1488. .ltr_ac_latency_vo = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VO,
  1489. .ltr_ac_latency_timeout = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
  1490. .ltr_sleep_override = WMI_10_4_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
  1491. .ltr_rx_override = WMI_10_4_PDEV_PARAM_LTR_RX_OVERRIDE,
  1492. .ltr_tx_activity_timeout = WMI_10_4_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
  1493. .l1ss_enable = WMI_10_4_PDEV_PARAM_L1SS_ENABLE,
  1494. .dsleep_enable = WMI_10_4_PDEV_PARAM_DSLEEP_ENABLE,
  1495. .pcielp_txbuf_flush = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
  1496. .pcielp_txbuf_watermark = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
  1497. .pcielp_txbuf_tmo_en = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
  1498. .pcielp_txbuf_tmo_value = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
  1499. .pdev_stats_update_period =
  1500. WMI_10_4_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
  1501. .vdev_stats_update_period =
  1502. WMI_10_4_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
  1503. .peer_stats_update_period =
  1504. WMI_10_4_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
  1505. .bcnflt_stats_update_period =
  1506. WMI_10_4_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
  1507. .pmf_qos = WMI_10_4_PDEV_PARAM_PMF_QOS,
  1508. .arp_ac_override = WMI_10_4_PDEV_PARAM_ARP_AC_OVERRIDE,
  1509. .dcs = WMI_10_4_PDEV_PARAM_DCS,
  1510. .ani_enable = WMI_10_4_PDEV_PARAM_ANI_ENABLE,
  1511. .ani_poll_period = WMI_10_4_PDEV_PARAM_ANI_POLL_PERIOD,
  1512. .ani_listen_period = WMI_10_4_PDEV_PARAM_ANI_LISTEN_PERIOD,
  1513. .ani_ofdm_level = WMI_10_4_PDEV_PARAM_ANI_OFDM_LEVEL,
  1514. .ani_cck_level = WMI_10_4_PDEV_PARAM_ANI_CCK_LEVEL,
  1515. .dyntxchain = WMI_10_4_PDEV_PARAM_DYNTXCHAIN,
  1516. .proxy_sta = WMI_10_4_PDEV_PARAM_PROXY_STA,
  1517. .idle_ps_config = WMI_10_4_PDEV_PARAM_IDLE_PS_CONFIG,
  1518. .power_gating_sleep = WMI_10_4_PDEV_PARAM_POWER_GATING_SLEEP,
  1519. .fast_channel_reset = WMI_10_4_PDEV_PARAM_FAST_CHANNEL_RESET,
  1520. .burst_dur = WMI_10_4_PDEV_PARAM_BURST_DUR,
  1521. .burst_enable = WMI_10_4_PDEV_PARAM_BURST_ENABLE,
  1522. .cal_period = WMI_10_4_PDEV_PARAM_CAL_PERIOD,
  1523. .aggr_burst = WMI_10_4_PDEV_PARAM_AGGR_BURST,
  1524. .rx_decap_mode = WMI_10_4_PDEV_PARAM_RX_DECAP_MODE,
  1525. .smart_antenna_default_antenna =
  1526. WMI_10_4_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
  1527. .igmpmld_override = WMI_10_4_PDEV_PARAM_IGMPMLD_OVERRIDE,
  1528. .igmpmld_tid = WMI_10_4_PDEV_PARAM_IGMPMLD_TID,
  1529. .antenna_gain = WMI_10_4_PDEV_PARAM_ANTENNA_GAIN,
  1530. .rx_filter = WMI_10_4_PDEV_PARAM_RX_FILTER,
  1531. .set_mcast_to_ucast_tid = WMI_10_4_PDEV_SET_MCAST_TO_UCAST_TID,
  1532. .proxy_sta_mode = WMI_10_4_PDEV_PARAM_PROXY_STA_MODE,
  1533. .set_mcast2ucast_mode = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_MODE,
  1534. .set_mcast2ucast_buffer = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
  1535. .remove_mcast2ucast_buffer =
  1536. WMI_10_4_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
  1537. .peer_sta_ps_statechg_enable =
  1538. WMI_10_4_PDEV_PEER_STA_PS_STATECHG_ENABLE,
  1539. .igmpmld_ac_override = WMI_10_4_PDEV_PARAM_IGMPMLD_AC_OVERRIDE,
  1540. .block_interbss = WMI_10_4_PDEV_PARAM_BLOCK_INTERBSS,
  1541. .set_disable_reset_cmdid = WMI_10_4_PDEV_PARAM_SET_DISABLE_RESET_CMDID,
  1542. .set_msdu_ttl_cmdid = WMI_10_4_PDEV_PARAM_SET_MSDU_TTL_CMDID,
  1543. .set_ppdu_duration_cmdid = WMI_10_4_PDEV_PARAM_SET_PPDU_DURATION_CMDID,
  1544. .txbf_sound_period_cmdid = WMI_10_4_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID,
  1545. .set_promisc_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
  1546. .set_burst_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_BURST_MODE_CMDID,
  1547. .en_stats = WMI_10_4_PDEV_PARAM_EN_STATS,
  1548. .mu_group_policy = WMI_10_4_PDEV_PARAM_MU_GROUP_POLICY,
  1549. .noise_detection = WMI_10_4_PDEV_PARAM_NOISE_DETECTION,
  1550. .noise_threshold = WMI_10_4_PDEV_PARAM_NOISE_THRESHOLD,
  1551. .dpd_enable = WMI_10_4_PDEV_PARAM_DPD_ENABLE,
  1552. .set_mcast_bcast_echo = WMI_10_4_PDEV_PARAM_SET_MCAST_BCAST_ECHO,
  1553. .atf_strict_sch = WMI_10_4_PDEV_PARAM_ATF_STRICT_SCH,
  1554. .atf_sched_duration = WMI_10_4_PDEV_PARAM_ATF_SCHED_DURATION,
  1555. .ant_plzn = WMI_10_4_PDEV_PARAM_ANT_PLZN,
  1556. .mgmt_retry_limit = WMI_10_4_PDEV_PARAM_MGMT_RETRY_LIMIT,
  1557. .sensitivity_level = WMI_10_4_PDEV_PARAM_SENSITIVITY_LEVEL,
  1558. .signed_txpower_2g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_2G,
  1559. .signed_txpower_5g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_5G,
  1560. .enable_per_tid_amsdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMSDU,
  1561. .enable_per_tid_ampdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMPDU,
  1562. .cca_threshold = WMI_10_4_PDEV_PARAM_CCA_THRESHOLD,
  1563. .rts_fixed_rate = WMI_10_4_PDEV_PARAM_RTS_FIXED_RATE,
  1564. .pdev_reset = WMI_10_4_PDEV_PARAM_PDEV_RESET,
  1565. .wapi_mbssid_offset = WMI_10_4_PDEV_PARAM_WAPI_MBSSID_OFFSET,
  1566. .arp_srcaddr = WMI_10_4_PDEV_PARAM_ARP_SRCADDR,
  1567. .arp_dstaddr = WMI_10_4_PDEV_PARAM_ARP_DSTADDR,
  1568. .enable_btcoex = WMI_10_4_PDEV_PARAM_ENABLE_BTCOEX,
  1569. };
  1570. static const struct wmi_peer_flags_map wmi_peer_flags_map = {
  1571. .auth = WMI_PEER_AUTH,
  1572. .qos = WMI_PEER_QOS,
  1573. .need_ptk_4_way = WMI_PEER_NEED_PTK_4_WAY,
  1574. .need_gtk_2_way = WMI_PEER_NEED_GTK_2_WAY,
  1575. .apsd = WMI_PEER_APSD,
  1576. .ht = WMI_PEER_HT,
  1577. .bw40 = WMI_PEER_40MHZ,
  1578. .stbc = WMI_PEER_STBC,
  1579. .ldbc = WMI_PEER_LDPC,
  1580. .dyn_mimops = WMI_PEER_DYN_MIMOPS,
  1581. .static_mimops = WMI_PEER_STATIC_MIMOPS,
  1582. .spatial_mux = WMI_PEER_SPATIAL_MUX,
  1583. .vht = WMI_PEER_VHT,
  1584. .bw80 = WMI_PEER_80MHZ,
  1585. .vht_2g = WMI_PEER_VHT_2G,
  1586. .pmf = WMI_PEER_PMF,
  1587. .bw160 = WMI_PEER_160MHZ,
  1588. };
  1589. static const struct wmi_peer_flags_map wmi_10x_peer_flags_map = {
  1590. .auth = WMI_10X_PEER_AUTH,
  1591. .qos = WMI_10X_PEER_QOS,
  1592. .need_ptk_4_way = WMI_10X_PEER_NEED_PTK_4_WAY,
  1593. .need_gtk_2_way = WMI_10X_PEER_NEED_GTK_2_WAY,
  1594. .apsd = WMI_10X_PEER_APSD,
  1595. .ht = WMI_10X_PEER_HT,
  1596. .bw40 = WMI_10X_PEER_40MHZ,
  1597. .stbc = WMI_10X_PEER_STBC,
  1598. .ldbc = WMI_10X_PEER_LDPC,
  1599. .dyn_mimops = WMI_10X_PEER_DYN_MIMOPS,
  1600. .static_mimops = WMI_10X_PEER_STATIC_MIMOPS,
  1601. .spatial_mux = WMI_10X_PEER_SPATIAL_MUX,
  1602. .vht = WMI_10X_PEER_VHT,
  1603. .bw80 = WMI_10X_PEER_80MHZ,
  1604. .bw160 = WMI_10X_PEER_160MHZ,
  1605. };
  1606. static const struct wmi_peer_flags_map wmi_10_2_peer_flags_map = {
  1607. .auth = WMI_10_2_PEER_AUTH,
  1608. .qos = WMI_10_2_PEER_QOS,
  1609. .need_ptk_4_way = WMI_10_2_PEER_NEED_PTK_4_WAY,
  1610. .need_gtk_2_way = WMI_10_2_PEER_NEED_GTK_2_WAY,
  1611. .apsd = WMI_10_2_PEER_APSD,
  1612. .ht = WMI_10_2_PEER_HT,
  1613. .bw40 = WMI_10_2_PEER_40MHZ,
  1614. .stbc = WMI_10_2_PEER_STBC,
  1615. .ldbc = WMI_10_2_PEER_LDPC,
  1616. .dyn_mimops = WMI_10_2_PEER_DYN_MIMOPS,
  1617. .static_mimops = WMI_10_2_PEER_STATIC_MIMOPS,
  1618. .spatial_mux = WMI_10_2_PEER_SPATIAL_MUX,
  1619. .vht = WMI_10_2_PEER_VHT,
  1620. .bw80 = WMI_10_2_PEER_80MHZ,
  1621. .vht_2g = WMI_10_2_PEER_VHT_2G,
  1622. .pmf = WMI_10_2_PEER_PMF,
  1623. .bw160 = WMI_10_2_PEER_160MHZ,
  1624. };
  1625. void ath10k_wmi_put_wmi_channel(struct wmi_channel *ch,
  1626. const struct wmi_channel_arg *arg)
  1627. {
  1628. u32 flags = 0;
  1629. memset(ch, 0, sizeof(*ch));
  1630. if (arg->passive)
  1631. flags |= WMI_CHAN_FLAG_PASSIVE;
  1632. if (arg->allow_ibss)
  1633. flags |= WMI_CHAN_FLAG_ADHOC_ALLOWED;
  1634. if (arg->allow_ht)
  1635. flags |= WMI_CHAN_FLAG_ALLOW_HT;
  1636. if (arg->allow_vht)
  1637. flags |= WMI_CHAN_FLAG_ALLOW_VHT;
  1638. if (arg->ht40plus)
  1639. flags |= WMI_CHAN_FLAG_HT40_PLUS;
  1640. if (arg->chan_radar)
  1641. flags |= WMI_CHAN_FLAG_DFS;
  1642. ch->mhz = __cpu_to_le32(arg->freq);
  1643. ch->band_center_freq1 = __cpu_to_le32(arg->band_center_freq1);
  1644. if (arg->mode == MODE_11AC_VHT80_80)
  1645. ch->band_center_freq2 = __cpu_to_le32(arg->band_center_freq2);
  1646. else
  1647. ch->band_center_freq2 = 0;
  1648. ch->min_power = arg->min_power;
  1649. ch->max_power = arg->max_power;
  1650. ch->reg_power = arg->max_reg_power;
  1651. ch->antenna_max = arg->max_antenna_gain;
  1652. ch->max_tx_power = arg->max_power;
  1653. /* mode & flags share storage */
  1654. ch->mode = arg->mode;
  1655. ch->flags |= __cpu_to_le32(flags);
  1656. }
  1657. int ath10k_wmi_wait_for_service_ready(struct ath10k *ar)
  1658. {
  1659. unsigned long time_left;
  1660. time_left = wait_for_completion_timeout(&ar->wmi.service_ready,
  1661. WMI_SERVICE_READY_TIMEOUT_HZ);
  1662. if (!time_left)
  1663. return -ETIMEDOUT;
  1664. return 0;
  1665. }
  1666. int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar)
  1667. {
  1668. unsigned long time_left;
  1669. time_left = wait_for_completion_timeout(&ar->wmi.unified_ready,
  1670. WMI_UNIFIED_READY_TIMEOUT_HZ);
  1671. if (!time_left)
  1672. return -ETIMEDOUT;
  1673. return 0;
  1674. }
  1675. struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len)
  1676. {
  1677. struct sk_buff *skb;
  1678. u32 round_len = roundup(len, 4);
  1679. skb = ath10k_htc_alloc_skb(ar, WMI_SKB_HEADROOM + round_len);
  1680. if (!skb)
  1681. return NULL;
  1682. skb_reserve(skb, WMI_SKB_HEADROOM);
  1683. if (!IS_ALIGNED((unsigned long)skb->data, 4))
  1684. ath10k_warn(ar, "Unaligned WMI skb\n");
  1685. skb_put(skb, round_len);
  1686. memset(skb->data, 0, round_len);
  1687. return skb;
  1688. }
  1689. static void ath10k_wmi_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb)
  1690. {
  1691. dev_kfree_skb(skb);
  1692. }
  1693. int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
  1694. u32 cmd_id)
  1695. {
  1696. struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb);
  1697. struct wmi_cmd_hdr *cmd_hdr;
  1698. int ret;
  1699. u32 cmd = 0;
  1700. if (skb_push(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  1701. return -ENOMEM;
  1702. cmd |= SM(cmd_id, WMI_CMD_HDR_CMD_ID);
  1703. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  1704. cmd_hdr->cmd_id = __cpu_to_le32(cmd);
  1705. memset(skb_cb, 0, sizeof(*skb_cb));
  1706. ret = ath10k_htc_send(&ar->htc, ar->wmi.eid, skb);
  1707. trace_ath10k_wmi_cmd(ar, cmd_id, skb->data, skb->len, ret);
  1708. if (ret)
  1709. goto err_pull;
  1710. return 0;
  1711. err_pull:
  1712. skb_pull(skb, sizeof(struct wmi_cmd_hdr));
  1713. return ret;
  1714. }
  1715. static void ath10k_wmi_tx_beacon_nowait(struct ath10k_vif *arvif)
  1716. {
  1717. struct ath10k *ar = arvif->ar;
  1718. struct ath10k_skb_cb *cb;
  1719. struct sk_buff *bcn;
  1720. bool dtim_zero;
  1721. bool deliver_cab;
  1722. int ret;
  1723. spin_lock_bh(&ar->data_lock);
  1724. bcn = arvif->beacon;
  1725. if (!bcn)
  1726. goto unlock;
  1727. cb = ATH10K_SKB_CB(bcn);
  1728. switch (arvif->beacon_state) {
  1729. case ATH10K_BEACON_SENDING:
  1730. case ATH10K_BEACON_SENT:
  1731. break;
  1732. case ATH10K_BEACON_SCHEDULED:
  1733. arvif->beacon_state = ATH10K_BEACON_SENDING;
  1734. spin_unlock_bh(&ar->data_lock);
  1735. dtim_zero = !!(cb->flags & ATH10K_SKB_F_DTIM_ZERO);
  1736. deliver_cab = !!(cb->flags & ATH10K_SKB_F_DELIVER_CAB);
  1737. ret = ath10k_wmi_beacon_send_ref_nowait(arvif->ar,
  1738. arvif->vdev_id,
  1739. bcn->data, bcn->len,
  1740. cb->paddr,
  1741. dtim_zero,
  1742. deliver_cab);
  1743. spin_lock_bh(&ar->data_lock);
  1744. if (ret == 0)
  1745. arvif->beacon_state = ATH10K_BEACON_SENT;
  1746. else
  1747. arvif->beacon_state = ATH10K_BEACON_SCHEDULED;
  1748. }
  1749. unlock:
  1750. spin_unlock_bh(&ar->data_lock);
  1751. }
  1752. static void ath10k_wmi_tx_beacons_iter(void *data, u8 *mac,
  1753. struct ieee80211_vif *vif)
  1754. {
  1755. struct ath10k_vif *arvif = (void *)vif->drv_priv;
  1756. ath10k_wmi_tx_beacon_nowait(arvif);
  1757. }
  1758. static void ath10k_wmi_tx_beacons_nowait(struct ath10k *ar)
  1759. {
  1760. ieee80211_iterate_active_interfaces_atomic(ar->hw,
  1761. IEEE80211_IFACE_ITER_NORMAL,
  1762. ath10k_wmi_tx_beacons_iter,
  1763. NULL);
  1764. }
  1765. static void ath10k_wmi_op_ep_tx_credits(struct ath10k *ar)
  1766. {
  1767. /* try to send pending beacons first. they take priority */
  1768. ath10k_wmi_tx_beacons_nowait(ar);
  1769. wake_up(&ar->wmi.tx_credits_wq);
  1770. }
  1771. int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id)
  1772. {
  1773. int ret = -EOPNOTSUPP;
  1774. might_sleep();
  1775. if (cmd_id == WMI_CMD_UNSUPPORTED) {
  1776. ath10k_warn(ar, "wmi command %d is not supported by firmware\n",
  1777. cmd_id);
  1778. return ret;
  1779. }
  1780. wait_event_timeout(ar->wmi.tx_credits_wq, ({
  1781. /* try to send pending beacons first. they take priority */
  1782. ath10k_wmi_tx_beacons_nowait(ar);
  1783. ret = ath10k_wmi_cmd_send_nowait(ar, skb, cmd_id);
  1784. if (ret && test_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags))
  1785. ret = -ESHUTDOWN;
  1786. (ret != -EAGAIN);
  1787. }), 3 * HZ);
  1788. if (ret)
  1789. dev_kfree_skb_any(skb);
  1790. return ret;
  1791. }
  1792. static struct sk_buff *
  1793. ath10k_wmi_op_gen_mgmt_tx(struct ath10k *ar, struct sk_buff *msdu)
  1794. {
  1795. struct ath10k_skb_cb *cb = ATH10K_SKB_CB(msdu);
  1796. struct ath10k_vif *arvif;
  1797. struct wmi_mgmt_tx_cmd *cmd;
  1798. struct ieee80211_hdr *hdr;
  1799. struct sk_buff *skb;
  1800. int len;
  1801. u32 vdev_id;
  1802. u32 buf_len = msdu->len;
  1803. u16 fc;
  1804. hdr = (struct ieee80211_hdr *)msdu->data;
  1805. fc = le16_to_cpu(hdr->frame_control);
  1806. if (cb->vif) {
  1807. arvif = (void *)cb->vif->drv_priv;
  1808. vdev_id = arvif->vdev_id;
  1809. } else {
  1810. vdev_id = 0;
  1811. }
  1812. if (WARN_ON_ONCE(!ieee80211_is_mgmt(hdr->frame_control)))
  1813. return ERR_PTR(-EINVAL);
  1814. len = sizeof(cmd->hdr) + msdu->len;
  1815. if ((ieee80211_is_action(hdr->frame_control) ||
  1816. ieee80211_is_deauth(hdr->frame_control) ||
  1817. ieee80211_is_disassoc(hdr->frame_control)) &&
  1818. ieee80211_has_protected(hdr->frame_control)) {
  1819. len += IEEE80211_CCMP_MIC_LEN;
  1820. buf_len += IEEE80211_CCMP_MIC_LEN;
  1821. }
  1822. len = round_up(len, 4);
  1823. skb = ath10k_wmi_alloc_skb(ar, len);
  1824. if (!skb)
  1825. return ERR_PTR(-ENOMEM);
  1826. cmd = (struct wmi_mgmt_tx_cmd *)skb->data;
  1827. cmd->hdr.vdev_id = __cpu_to_le32(vdev_id);
  1828. cmd->hdr.tx_rate = 0;
  1829. cmd->hdr.tx_power = 0;
  1830. cmd->hdr.buf_len = __cpu_to_le32(buf_len);
  1831. ether_addr_copy(cmd->hdr.peer_macaddr.addr, ieee80211_get_DA(hdr));
  1832. memcpy(cmd->buf, msdu->data, msdu->len);
  1833. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi mgmt tx skb %pK len %d ftype %02x stype %02x\n",
  1834. msdu, skb->len, fc & IEEE80211_FCTL_FTYPE,
  1835. fc & IEEE80211_FCTL_STYPE);
  1836. trace_ath10k_tx_hdr(ar, skb->data, skb->len);
  1837. trace_ath10k_tx_payload(ar, skb->data, skb->len);
  1838. return skb;
  1839. }
  1840. static void ath10k_wmi_event_scan_started(struct ath10k *ar)
  1841. {
  1842. lockdep_assert_held(&ar->data_lock);
  1843. switch (ar->scan.state) {
  1844. case ATH10K_SCAN_IDLE:
  1845. case ATH10K_SCAN_RUNNING:
  1846. case ATH10K_SCAN_ABORTING:
  1847. ath10k_warn(ar, "received scan started event in an invalid scan state: %s (%d)\n",
  1848. ath10k_scan_state_str(ar->scan.state),
  1849. ar->scan.state);
  1850. break;
  1851. case ATH10K_SCAN_STARTING:
  1852. ar->scan.state = ATH10K_SCAN_RUNNING;
  1853. if (ar->scan.is_roc)
  1854. ieee80211_ready_on_channel(ar->hw);
  1855. complete(&ar->scan.started);
  1856. break;
  1857. }
  1858. }
  1859. static void ath10k_wmi_event_scan_start_failed(struct ath10k *ar)
  1860. {
  1861. lockdep_assert_held(&ar->data_lock);
  1862. switch (ar->scan.state) {
  1863. case ATH10K_SCAN_IDLE:
  1864. case ATH10K_SCAN_RUNNING:
  1865. case ATH10K_SCAN_ABORTING:
  1866. ath10k_warn(ar, "received scan start failed event in an invalid scan state: %s (%d)\n",
  1867. ath10k_scan_state_str(ar->scan.state),
  1868. ar->scan.state);
  1869. break;
  1870. case ATH10K_SCAN_STARTING:
  1871. complete(&ar->scan.started);
  1872. __ath10k_scan_finish(ar);
  1873. break;
  1874. }
  1875. }
  1876. static void ath10k_wmi_event_scan_completed(struct ath10k *ar)
  1877. {
  1878. lockdep_assert_held(&ar->data_lock);
  1879. switch (ar->scan.state) {
  1880. case ATH10K_SCAN_IDLE:
  1881. case ATH10K_SCAN_STARTING:
  1882. /* One suspected reason scan can be completed while starting is
  1883. * if firmware fails to deliver all scan events to the host,
  1884. * e.g. when transport pipe is full. This has been observed
  1885. * with spectral scan phyerr events starving wmi transport
  1886. * pipe. In such case the "scan completed" event should be (and
  1887. * is) ignored by the host as it may be just firmware's scan
  1888. * state machine recovering.
  1889. */
  1890. ath10k_warn(ar, "received scan completed event in an invalid scan state: %s (%d)\n",
  1891. ath10k_scan_state_str(ar->scan.state),
  1892. ar->scan.state);
  1893. break;
  1894. case ATH10K_SCAN_RUNNING:
  1895. case ATH10K_SCAN_ABORTING:
  1896. __ath10k_scan_finish(ar);
  1897. break;
  1898. }
  1899. }
  1900. static void ath10k_wmi_event_scan_bss_chan(struct ath10k *ar)
  1901. {
  1902. lockdep_assert_held(&ar->data_lock);
  1903. switch (ar->scan.state) {
  1904. case ATH10K_SCAN_IDLE:
  1905. case ATH10K_SCAN_STARTING:
  1906. ath10k_warn(ar, "received scan bss chan event in an invalid scan state: %s (%d)\n",
  1907. ath10k_scan_state_str(ar->scan.state),
  1908. ar->scan.state);
  1909. break;
  1910. case ATH10K_SCAN_RUNNING:
  1911. case ATH10K_SCAN_ABORTING:
  1912. ar->scan_channel = NULL;
  1913. break;
  1914. }
  1915. }
  1916. static void ath10k_wmi_event_scan_foreign_chan(struct ath10k *ar, u32 freq)
  1917. {
  1918. lockdep_assert_held(&ar->data_lock);
  1919. switch (ar->scan.state) {
  1920. case ATH10K_SCAN_IDLE:
  1921. case ATH10K_SCAN_STARTING:
  1922. ath10k_warn(ar, "received scan foreign chan event in an invalid scan state: %s (%d)\n",
  1923. ath10k_scan_state_str(ar->scan.state),
  1924. ar->scan.state);
  1925. break;
  1926. case ATH10K_SCAN_RUNNING:
  1927. case ATH10K_SCAN_ABORTING:
  1928. ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq);
  1929. if (ar->scan.is_roc && ar->scan.roc_freq == freq)
  1930. complete(&ar->scan.on_channel);
  1931. break;
  1932. }
  1933. }
  1934. static const char *
  1935. ath10k_wmi_event_scan_type_str(enum wmi_scan_event_type type,
  1936. enum wmi_scan_completion_reason reason)
  1937. {
  1938. switch (type) {
  1939. case WMI_SCAN_EVENT_STARTED:
  1940. return "started";
  1941. case WMI_SCAN_EVENT_COMPLETED:
  1942. switch (reason) {
  1943. case WMI_SCAN_REASON_COMPLETED:
  1944. return "completed";
  1945. case WMI_SCAN_REASON_CANCELLED:
  1946. return "completed [cancelled]";
  1947. case WMI_SCAN_REASON_PREEMPTED:
  1948. return "completed [preempted]";
  1949. case WMI_SCAN_REASON_TIMEDOUT:
  1950. return "completed [timedout]";
  1951. case WMI_SCAN_REASON_INTERNAL_FAILURE:
  1952. return "completed [internal err]";
  1953. case WMI_SCAN_REASON_MAX:
  1954. break;
  1955. }
  1956. return "completed [unknown]";
  1957. case WMI_SCAN_EVENT_BSS_CHANNEL:
  1958. return "bss channel";
  1959. case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
  1960. return "foreign channel";
  1961. case WMI_SCAN_EVENT_DEQUEUED:
  1962. return "dequeued";
  1963. case WMI_SCAN_EVENT_PREEMPTED:
  1964. return "preempted";
  1965. case WMI_SCAN_EVENT_START_FAILED:
  1966. return "start failed";
  1967. case WMI_SCAN_EVENT_RESTARTED:
  1968. return "restarted";
  1969. case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT:
  1970. return "foreign channel exit";
  1971. default:
  1972. return "unknown";
  1973. }
  1974. }
  1975. static int ath10k_wmi_op_pull_scan_ev(struct ath10k *ar, struct sk_buff *skb,
  1976. struct wmi_scan_ev_arg *arg)
  1977. {
  1978. struct wmi_scan_event *ev = (void *)skb->data;
  1979. if (skb->len < sizeof(*ev))
  1980. return -EPROTO;
  1981. skb_pull(skb, sizeof(*ev));
  1982. arg->event_type = ev->event_type;
  1983. arg->reason = ev->reason;
  1984. arg->channel_freq = ev->channel_freq;
  1985. arg->scan_req_id = ev->scan_req_id;
  1986. arg->scan_id = ev->scan_id;
  1987. arg->vdev_id = ev->vdev_id;
  1988. return 0;
  1989. }
  1990. int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb)
  1991. {
  1992. struct wmi_scan_ev_arg arg = {};
  1993. enum wmi_scan_event_type event_type;
  1994. enum wmi_scan_completion_reason reason;
  1995. u32 freq;
  1996. u32 req_id;
  1997. u32 scan_id;
  1998. u32 vdev_id;
  1999. int ret;
  2000. ret = ath10k_wmi_pull_scan(ar, skb, &arg);
  2001. if (ret) {
  2002. ath10k_warn(ar, "failed to parse scan event: %d\n", ret);
  2003. return ret;
  2004. }
  2005. event_type = __le32_to_cpu(arg.event_type);
  2006. reason = __le32_to_cpu(arg.reason);
  2007. freq = __le32_to_cpu(arg.channel_freq);
  2008. req_id = __le32_to_cpu(arg.scan_req_id);
  2009. scan_id = __le32_to_cpu(arg.scan_id);
  2010. vdev_id = __le32_to_cpu(arg.vdev_id);
  2011. spin_lock_bh(&ar->data_lock);
  2012. ath10k_dbg(ar, ATH10K_DBG_WMI,
  2013. "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n",
  2014. ath10k_wmi_event_scan_type_str(event_type, reason),
  2015. event_type, reason, freq, req_id, scan_id, vdev_id,
  2016. ath10k_scan_state_str(ar->scan.state), ar->scan.state);
  2017. switch (event_type) {
  2018. case WMI_SCAN_EVENT_STARTED:
  2019. ath10k_wmi_event_scan_started(ar);
  2020. break;
  2021. case WMI_SCAN_EVENT_COMPLETED:
  2022. ath10k_wmi_event_scan_completed(ar);
  2023. break;
  2024. case WMI_SCAN_EVENT_BSS_CHANNEL:
  2025. ath10k_wmi_event_scan_bss_chan(ar);
  2026. break;
  2027. case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
  2028. ath10k_wmi_event_scan_foreign_chan(ar, freq);
  2029. break;
  2030. case WMI_SCAN_EVENT_START_FAILED:
  2031. ath10k_warn(ar, "received scan start failure event\n");
  2032. ath10k_wmi_event_scan_start_failed(ar);
  2033. break;
  2034. case WMI_SCAN_EVENT_DEQUEUED:
  2035. case WMI_SCAN_EVENT_PREEMPTED:
  2036. case WMI_SCAN_EVENT_RESTARTED:
  2037. case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT:
  2038. default:
  2039. break;
  2040. }
  2041. spin_unlock_bh(&ar->data_lock);
  2042. return 0;
  2043. }
  2044. /* If keys are configured, HW decrypts all frames
  2045. * with protected bit set. Mark such frames as decrypted.
  2046. */
  2047. static void ath10k_wmi_handle_wep_reauth(struct ath10k *ar,
  2048. struct sk_buff *skb,
  2049. struct ieee80211_rx_status *status)
  2050. {
  2051. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  2052. unsigned int hdrlen;
  2053. bool peer_key;
  2054. u8 *addr, keyidx;
  2055. if (!ieee80211_is_auth(hdr->frame_control) ||
  2056. !ieee80211_has_protected(hdr->frame_control))
  2057. return;
  2058. hdrlen = ieee80211_hdrlen(hdr->frame_control);
  2059. if (skb->len < (hdrlen + IEEE80211_WEP_IV_LEN))
  2060. return;
  2061. keyidx = skb->data[hdrlen + (IEEE80211_WEP_IV_LEN - 1)] >> WEP_KEYID_SHIFT;
  2062. addr = ieee80211_get_SA(hdr);
  2063. spin_lock_bh(&ar->data_lock);
  2064. peer_key = ath10k_mac_is_peer_wep_key_set(ar, addr, keyidx);
  2065. spin_unlock_bh(&ar->data_lock);
  2066. if (peer_key) {
  2067. ath10k_dbg(ar, ATH10K_DBG_MAC,
  2068. "mac wep key present for peer %pM\n", addr);
  2069. status->flag |= RX_FLAG_DECRYPTED;
  2070. }
  2071. }
  2072. static int ath10k_wmi_op_pull_mgmt_rx_ev(struct ath10k *ar, struct sk_buff *skb,
  2073. struct wmi_mgmt_rx_ev_arg *arg)
  2074. {
  2075. struct wmi_mgmt_rx_event_v1 *ev_v1;
  2076. struct wmi_mgmt_rx_event_v2 *ev_v2;
  2077. struct wmi_mgmt_rx_hdr_v1 *ev_hdr;
  2078. struct wmi_mgmt_rx_ext_info *ext_info;
  2079. size_t pull_len;
  2080. u32 msdu_len;
  2081. u32 len;
  2082. if (test_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX,
  2083. ar->running_fw->fw_file.fw_features)) {
  2084. ev_v2 = (struct wmi_mgmt_rx_event_v2 *)skb->data;
  2085. ev_hdr = &ev_v2->hdr.v1;
  2086. pull_len = sizeof(*ev_v2);
  2087. } else {
  2088. ev_v1 = (struct wmi_mgmt_rx_event_v1 *)skb->data;
  2089. ev_hdr = &ev_v1->hdr;
  2090. pull_len = sizeof(*ev_v1);
  2091. }
  2092. if (skb->len < pull_len)
  2093. return -EPROTO;
  2094. skb_pull(skb, pull_len);
  2095. arg->channel = ev_hdr->channel;
  2096. arg->buf_len = ev_hdr->buf_len;
  2097. arg->status = ev_hdr->status;
  2098. arg->snr = ev_hdr->snr;
  2099. arg->phy_mode = ev_hdr->phy_mode;
  2100. arg->rate = ev_hdr->rate;
  2101. msdu_len = __le32_to_cpu(arg->buf_len);
  2102. if (skb->len < msdu_len)
  2103. return -EPROTO;
  2104. if (le32_to_cpu(arg->status) & WMI_RX_STATUS_EXT_INFO) {
  2105. len = ALIGN(le32_to_cpu(arg->buf_len), 4);
  2106. ext_info = (struct wmi_mgmt_rx_ext_info *)(skb->data + len);
  2107. memcpy(&arg->ext_info, ext_info,
  2108. sizeof(struct wmi_mgmt_rx_ext_info));
  2109. }
  2110. /* the WMI buffer might've ended up being padded to 4 bytes due to HTC
  2111. * trailer with credit update. Trim the excess garbage.
  2112. */
  2113. skb_trim(skb, msdu_len);
  2114. return 0;
  2115. }
  2116. static int ath10k_wmi_10_4_op_pull_mgmt_rx_ev(struct ath10k *ar,
  2117. struct sk_buff *skb,
  2118. struct wmi_mgmt_rx_ev_arg *arg)
  2119. {
  2120. struct wmi_10_4_mgmt_rx_event *ev;
  2121. struct wmi_10_4_mgmt_rx_hdr *ev_hdr;
  2122. size_t pull_len;
  2123. u32 msdu_len;
  2124. struct wmi_mgmt_rx_ext_info *ext_info;
  2125. u32 len;
  2126. ev = (struct wmi_10_4_mgmt_rx_event *)skb->data;
  2127. ev_hdr = &ev->hdr;
  2128. pull_len = sizeof(*ev);
  2129. if (skb->len < pull_len)
  2130. return -EPROTO;
  2131. skb_pull(skb, pull_len);
  2132. arg->channel = ev_hdr->channel;
  2133. arg->buf_len = ev_hdr->buf_len;
  2134. arg->status = ev_hdr->status;
  2135. arg->snr = ev_hdr->snr;
  2136. arg->phy_mode = ev_hdr->phy_mode;
  2137. arg->rate = ev_hdr->rate;
  2138. msdu_len = __le32_to_cpu(arg->buf_len);
  2139. if (skb->len < msdu_len)
  2140. return -EPROTO;
  2141. if (le32_to_cpu(arg->status) & WMI_RX_STATUS_EXT_INFO) {
  2142. len = ALIGN(le32_to_cpu(arg->buf_len), 4);
  2143. ext_info = (struct wmi_mgmt_rx_ext_info *)(skb->data + len);
  2144. memcpy(&arg->ext_info, ext_info,
  2145. sizeof(struct wmi_mgmt_rx_ext_info));
  2146. }
  2147. /* Make sure bytes added for padding are removed. */
  2148. skb_trim(skb, msdu_len);
  2149. return 0;
  2150. }
  2151. static bool ath10k_wmi_rx_is_decrypted(struct ath10k *ar,
  2152. struct ieee80211_hdr *hdr)
  2153. {
  2154. if (!ieee80211_has_protected(hdr->frame_control))
  2155. return false;
  2156. /* FW delivers WEP Shared Auth frame with Protected Bit set and
  2157. * encrypted payload. However in case of PMF it delivers decrypted
  2158. * frames with Protected Bit set.
  2159. */
  2160. if (ieee80211_is_auth(hdr->frame_control))
  2161. return false;
  2162. /* qca99x0 based FW delivers broadcast or multicast management frames
  2163. * (ex: group privacy action frames in mesh) as encrypted payload.
  2164. */
  2165. if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) &&
  2166. ar->hw_params.sw_decrypt_mcast_mgmt)
  2167. return false;
  2168. return true;
  2169. }
  2170. int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb)
  2171. {
  2172. struct wmi_mgmt_rx_ev_arg arg = {};
  2173. struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
  2174. struct ieee80211_hdr *hdr;
  2175. struct ieee80211_supported_band *sband;
  2176. u32 rx_status;
  2177. u32 channel;
  2178. u32 phy_mode;
  2179. u32 snr;
  2180. u32 rate;
  2181. u32 buf_len;
  2182. u16 fc;
  2183. int ret;
  2184. ret = ath10k_wmi_pull_mgmt_rx(ar, skb, &arg);
  2185. if (ret) {
  2186. ath10k_warn(ar, "failed to parse mgmt rx event: %d\n", ret);
  2187. dev_kfree_skb(skb);
  2188. return ret;
  2189. }
  2190. channel = __le32_to_cpu(arg.channel);
  2191. buf_len = __le32_to_cpu(arg.buf_len);
  2192. rx_status = __le32_to_cpu(arg.status);
  2193. snr = __le32_to_cpu(arg.snr);
  2194. phy_mode = __le32_to_cpu(arg.phy_mode);
  2195. rate = __le32_to_cpu(arg.rate);
  2196. memset(status, 0, sizeof(*status));
  2197. ath10k_dbg(ar, ATH10K_DBG_MGMT,
  2198. "event mgmt rx status %08x\n", rx_status);
  2199. if ((test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) ||
  2200. (rx_status & (WMI_RX_STATUS_ERR_DECRYPT |
  2201. WMI_RX_STATUS_ERR_KEY_CACHE_MISS | WMI_RX_STATUS_ERR_CRC))) {
  2202. dev_kfree_skb(skb);
  2203. return 0;
  2204. }
  2205. if (rx_status & WMI_RX_STATUS_ERR_MIC)
  2206. status->flag |= RX_FLAG_MMIC_ERROR;
  2207. if (rx_status & WMI_RX_STATUS_EXT_INFO) {
  2208. status->mactime =
  2209. __le64_to_cpu(arg.ext_info.rx_mac_timestamp);
  2210. status->flag |= RX_FLAG_MACTIME_END;
  2211. }
  2212. /* Hardware can Rx CCK rates on 5GHz. In that case phy_mode is set to
  2213. * MODE_11B. This means phy_mode is not a reliable source for the band
  2214. * of mgmt rx.
  2215. */
  2216. if (channel >= 1 && channel <= 14) {
  2217. status->band = NL80211_BAND_2GHZ;
  2218. } else if (channel >= 36 && channel <= 169) {
  2219. status->band = NL80211_BAND_5GHZ;
  2220. } else {
  2221. /* Shouldn't happen unless list of advertised channels to
  2222. * mac80211 has been changed.
  2223. */
  2224. WARN_ON_ONCE(1);
  2225. dev_kfree_skb(skb);
  2226. return 0;
  2227. }
  2228. if (phy_mode == MODE_11B && status->band == NL80211_BAND_5GHZ)
  2229. ath10k_dbg(ar, ATH10K_DBG_MGMT, "wmi mgmt rx 11b (CCK) on 5GHz\n");
  2230. sband = &ar->mac.sbands[status->band];
  2231. status->freq = ieee80211_channel_to_frequency(channel, status->band);
  2232. status->signal = snr + ATH10K_DEFAULT_NOISE_FLOOR;
  2233. status->rate_idx = ath10k_mac_bitrate_to_idx(sband, rate / 100);
  2234. hdr = (struct ieee80211_hdr *)skb->data;
  2235. fc = le16_to_cpu(hdr->frame_control);
  2236. /* Firmware is guaranteed to report all essential management frames via
  2237. * WMI while it can deliver some extra via HTT. Since there can be
  2238. * duplicates split the reporting wrt monitor/sniffing.
  2239. */
  2240. status->flag |= RX_FLAG_SKIP_MONITOR;
  2241. ath10k_wmi_handle_wep_reauth(ar, skb, status);
  2242. if (ath10k_wmi_rx_is_decrypted(ar, hdr)) {
  2243. status->flag |= RX_FLAG_DECRYPTED;
  2244. if (!ieee80211_is_action(hdr->frame_control) &&
  2245. !ieee80211_is_deauth(hdr->frame_control) &&
  2246. !ieee80211_is_disassoc(hdr->frame_control)) {
  2247. status->flag |= RX_FLAG_IV_STRIPPED |
  2248. RX_FLAG_MMIC_STRIPPED;
  2249. hdr->frame_control = __cpu_to_le16(fc &
  2250. ~IEEE80211_FCTL_PROTECTED);
  2251. }
  2252. }
  2253. if (ieee80211_is_beacon(hdr->frame_control))
  2254. ath10k_mac_handle_beacon(ar, skb);
  2255. ath10k_dbg(ar, ATH10K_DBG_MGMT,
  2256. "event mgmt rx skb %pK len %d ftype %02x stype %02x\n",
  2257. skb, skb->len,
  2258. fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE);
  2259. ath10k_dbg(ar, ATH10K_DBG_MGMT,
  2260. "event mgmt rx freq %d band %d snr %d, rate_idx %d\n",
  2261. status->freq, status->band, status->signal,
  2262. status->rate_idx);
  2263. ieee80211_rx(ar->hw, skb);
  2264. return 0;
  2265. }
  2266. static int freq_to_idx(struct ath10k *ar, int freq)
  2267. {
  2268. struct ieee80211_supported_band *sband;
  2269. int band, ch, idx = 0;
  2270. for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) {
  2271. sband = ar->hw->wiphy->bands[band];
  2272. if (!sband)
  2273. continue;
  2274. for (ch = 0; ch < sband->n_channels; ch++, idx++)
  2275. if (sband->channels[ch].center_freq == freq)
  2276. goto exit;
  2277. }
  2278. exit:
  2279. return idx;
  2280. }
  2281. static int ath10k_wmi_op_pull_ch_info_ev(struct ath10k *ar, struct sk_buff *skb,
  2282. struct wmi_ch_info_ev_arg *arg)
  2283. {
  2284. struct wmi_chan_info_event *ev = (void *)skb->data;
  2285. if (skb->len < sizeof(*ev))
  2286. return -EPROTO;
  2287. skb_pull(skb, sizeof(*ev));
  2288. arg->err_code = ev->err_code;
  2289. arg->freq = ev->freq;
  2290. arg->cmd_flags = ev->cmd_flags;
  2291. arg->noise_floor = ev->noise_floor;
  2292. arg->rx_clear_count = ev->rx_clear_count;
  2293. arg->cycle_count = ev->cycle_count;
  2294. return 0;
  2295. }
  2296. static int ath10k_wmi_10_4_op_pull_ch_info_ev(struct ath10k *ar,
  2297. struct sk_buff *skb,
  2298. struct wmi_ch_info_ev_arg *arg)
  2299. {
  2300. struct wmi_10_4_chan_info_event *ev = (void *)skb->data;
  2301. if (skb->len < sizeof(*ev))
  2302. return -EPROTO;
  2303. skb_pull(skb, sizeof(*ev));
  2304. arg->err_code = ev->err_code;
  2305. arg->freq = ev->freq;
  2306. arg->cmd_flags = ev->cmd_flags;
  2307. arg->noise_floor = ev->noise_floor;
  2308. arg->rx_clear_count = ev->rx_clear_count;
  2309. arg->cycle_count = ev->cycle_count;
  2310. arg->chan_tx_pwr_range = ev->chan_tx_pwr_range;
  2311. arg->chan_tx_pwr_tp = ev->chan_tx_pwr_tp;
  2312. arg->rx_frame_count = ev->rx_frame_count;
  2313. return 0;
  2314. }
  2315. void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb)
  2316. {
  2317. struct wmi_ch_info_ev_arg arg = {};
  2318. struct survey_info *survey;
  2319. u32 err_code, freq, cmd_flags, noise_floor, rx_clear_count, cycle_count;
  2320. int idx, ret;
  2321. ret = ath10k_wmi_pull_ch_info(ar, skb, &arg);
  2322. if (ret) {
  2323. ath10k_warn(ar, "failed to parse chan info event: %d\n", ret);
  2324. return;
  2325. }
  2326. err_code = __le32_to_cpu(arg.err_code);
  2327. freq = __le32_to_cpu(arg.freq);
  2328. cmd_flags = __le32_to_cpu(arg.cmd_flags);
  2329. noise_floor = __le32_to_cpu(arg.noise_floor);
  2330. rx_clear_count = __le32_to_cpu(arg.rx_clear_count);
  2331. cycle_count = __le32_to_cpu(arg.cycle_count);
  2332. ath10k_dbg(ar, ATH10K_DBG_WMI,
  2333. "chan info err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d\n",
  2334. err_code, freq, cmd_flags, noise_floor, rx_clear_count,
  2335. cycle_count);
  2336. spin_lock_bh(&ar->data_lock);
  2337. switch (ar->scan.state) {
  2338. case ATH10K_SCAN_IDLE:
  2339. case ATH10K_SCAN_STARTING:
  2340. ath10k_warn(ar, "received chan info event without a scan request, ignoring\n");
  2341. goto exit;
  2342. case ATH10K_SCAN_RUNNING:
  2343. case ATH10K_SCAN_ABORTING:
  2344. break;
  2345. }
  2346. idx = freq_to_idx(ar, freq);
  2347. if (idx >= ARRAY_SIZE(ar->survey)) {
  2348. ath10k_warn(ar, "chan info: invalid frequency %d (idx %d out of bounds)\n",
  2349. freq, idx);
  2350. goto exit;
  2351. }
  2352. if (cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) {
  2353. if (ar->ch_info_can_report_survey) {
  2354. survey = &ar->survey[idx];
  2355. survey->noise = noise_floor;
  2356. survey->filled = SURVEY_INFO_NOISE_DBM;
  2357. ath10k_hw_fill_survey_time(ar,
  2358. survey,
  2359. cycle_count,
  2360. rx_clear_count,
  2361. ar->survey_last_cycle_count,
  2362. ar->survey_last_rx_clear_count);
  2363. }
  2364. ar->ch_info_can_report_survey = false;
  2365. } else {
  2366. ar->ch_info_can_report_survey = true;
  2367. }
  2368. if (!(cmd_flags & WMI_CHAN_INFO_FLAG_PRE_COMPLETE)) {
  2369. ar->survey_last_rx_clear_count = rx_clear_count;
  2370. ar->survey_last_cycle_count = cycle_count;
  2371. }
  2372. exit:
  2373. spin_unlock_bh(&ar->data_lock);
  2374. }
  2375. void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb)
  2376. {
  2377. struct wmi_echo_ev_arg arg = {};
  2378. int ret;
  2379. ret = ath10k_wmi_pull_echo_ev(ar, skb, &arg);
  2380. if (ret) {
  2381. ath10k_warn(ar, "failed to parse echo: %d\n", ret);
  2382. return;
  2383. }
  2384. ath10k_dbg(ar, ATH10K_DBG_WMI,
  2385. "wmi event echo value 0x%08x\n",
  2386. le32_to_cpu(arg.value));
  2387. if (le32_to_cpu(arg.value) == ATH10K_WMI_BARRIER_ECHO_ID)
  2388. complete(&ar->wmi.barrier);
  2389. }
  2390. int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb)
  2391. {
  2392. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event debug mesg len %d\n",
  2393. skb->len);
  2394. trace_ath10k_wmi_dbglog(ar, skb->data, skb->len);
  2395. return 0;
  2396. }
  2397. void ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base *src,
  2398. struct ath10k_fw_stats_pdev *dst)
  2399. {
  2400. dst->ch_noise_floor = __le32_to_cpu(src->chan_nf);
  2401. dst->tx_frame_count = __le32_to_cpu(src->tx_frame_count);
  2402. dst->rx_frame_count = __le32_to_cpu(src->rx_frame_count);
  2403. dst->rx_clear_count = __le32_to_cpu(src->rx_clear_count);
  2404. dst->cycle_count = __le32_to_cpu(src->cycle_count);
  2405. dst->phy_err_count = __le32_to_cpu(src->phy_err_count);
  2406. dst->chan_tx_power = __le32_to_cpu(src->chan_tx_pwr);
  2407. }
  2408. void ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx *src,
  2409. struct ath10k_fw_stats_pdev *dst)
  2410. {
  2411. dst->comp_queued = __le32_to_cpu(src->comp_queued);
  2412. dst->comp_delivered = __le32_to_cpu(src->comp_delivered);
  2413. dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued);
  2414. dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued);
  2415. dst->wmm_drop = __le32_to_cpu(src->wmm_drop);
  2416. dst->local_enqued = __le32_to_cpu(src->local_enqued);
  2417. dst->local_freed = __le32_to_cpu(src->local_freed);
  2418. dst->hw_queued = __le32_to_cpu(src->hw_queued);
  2419. dst->hw_reaped = __le32_to_cpu(src->hw_reaped);
  2420. dst->underrun = __le32_to_cpu(src->underrun);
  2421. dst->tx_abort = __le32_to_cpu(src->tx_abort);
  2422. dst->mpdus_requed = __le32_to_cpu(src->mpdus_requed);
  2423. dst->tx_ko = __le32_to_cpu(src->tx_ko);
  2424. dst->data_rc = __le32_to_cpu(src->data_rc);
  2425. dst->self_triggers = __le32_to_cpu(src->self_triggers);
  2426. dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure);
  2427. dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err);
  2428. dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry);
  2429. dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout);
  2430. dst->pdev_resets = __le32_to_cpu(src->pdev_resets);
  2431. dst->phy_underrun = __le32_to_cpu(src->phy_underrun);
  2432. dst->txop_ovf = __le32_to_cpu(src->txop_ovf);
  2433. }
  2434. static void
  2435. ath10k_wmi_10_4_pull_pdev_stats_tx(const struct wmi_10_4_pdev_stats_tx *src,
  2436. struct ath10k_fw_stats_pdev *dst)
  2437. {
  2438. dst->comp_queued = __le32_to_cpu(src->comp_queued);
  2439. dst->comp_delivered = __le32_to_cpu(src->comp_delivered);
  2440. dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued);
  2441. dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued);
  2442. dst->wmm_drop = __le32_to_cpu(src->wmm_drop);
  2443. dst->local_enqued = __le32_to_cpu(src->local_enqued);
  2444. dst->local_freed = __le32_to_cpu(src->local_freed);
  2445. dst->hw_queued = __le32_to_cpu(src->hw_queued);
  2446. dst->hw_reaped = __le32_to_cpu(src->hw_reaped);
  2447. dst->underrun = __le32_to_cpu(src->underrun);
  2448. dst->tx_abort = __le32_to_cpu(src->tx_abort);
  2449. dst->mpdus_requed = __le32_to_cpu(src->mpdus_requed);
  2450. dst->tx_ko = __le32_to_cpu(src->tx_ko);
  2451. dst->data_rc = __le32_to_cpu(src->data_rc);
  2452. dst->self_triggers = __le32_to_cpu(src->self_triggers);
  2453. dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure);
  2454. dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err);
  2455. dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry);
  2456. dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout);
  2457. dst->pdev_resets = __le32_to_cpu(src->pdev_resets);
  2458. dst->phy_underrun = __le32_to_cpu(src->phy_underrun);
  2459. dst->txop_ovf = __le32_to_cpu(src->txop_ovf);
  2460. dst->hw_paused = __le32_to_cpu(src->hw_paused);
  2461. dst->seq_posted = __le32_to_cpu(src->seq_posted);
  2462. dst->seq_failed_queueing =
  2463. __le32_to_cpu(src->seq_failed_queueing);
  2464. dst->seq_completed = __le32_to_cpu(src->seq_completed);
  2465. dst->seq_restarted = __le32_to_cpu(src->seq_restarted);
  2466. dst->mu_seq_posted = __le32_to_cpu(src->mu_seq_posted);
  2467. dst->mpdus_sw_flush = __le32_to_cpu(src->mpdus_sw_flush);
  2468. dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter);
  2469. dst->mpdus_truncated = __le32_to_cpu(src->mpdus_truncated);
  2470. dst->mpdus_ack_failed = __le32_to_cpu(src->mpdus_ack_failed);
  2471. dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter);
  2472. dst->mpdus_expired = __le32_to_cpu(src->mpdus_expired);
  2473. }
  2474. void ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx *src,
  2475. struct ath10k_fw_stats_pdev *dst)
  2476. {
  2477. dst->mid_ppdu_route_change = __le32_to_cpu(src->mid_ppdu_route_change);
  2478. dst->status_rcvd = __le32_to_cpu(src->status_rcvd);
  2479. dst->r0_frags = __le32_to_cpu(src->r0_frags);
  2480. dst->r1_frags = __le32_to_cpu(src->r1_frags);
  2481. dst->r2_frags = __le32_to_cpu(src->r2_frags);
  2482. dst->r3_frags = __le32_to_cpu(src->r3_frags);
  2483. dst->htt_msdus = __le32_to_cpu(src->htt_msdus);
  2484. dst->htt_mpdus = __le32_to_cpu(src->htt_mpdus);
  2485. dst->loc_msdus = __le32_to_cpu(src->loc_msdus);
  2486. dst->loc_mpdus = __le32_to_cpu(src->loc_mpdus);
  2487. dst->oversize_amsdu = __le32_to_cpu(src->oversize_amsdu);
  2488. dst->phy_errs = __le32_to_cpu(src->phy_errs);
  2489. dst->phy_err_drop = __le32_to_cpu(src->phy_err_drop);
  2490. dst->mpdu_errs = __le32_to_cpu(src->mpdu_errs);
  2491. }
  2492. void ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra *src,
  2493. struct ath10k_fw_stats_pdev *dst)
  2494. {
  2495. dst->ack_rx_bad = __le32_to_cpu(src->ack_rx_bad);
  2496. dst->rts_bad = __le32_to_cpu(src->rts_bad);
  2497. dst->rts_good = __le32_to_cpu(src->rts_good);
  2498. dst->fcs_bad = __le32_to_cpu(src->fcs_bad);
  2499. dst->no_beacons = __le32_to_cpu(src->no_beacons);
  2500. dst->mib_int_count = __le32_to_cpu(src->mib_int_count);
  2501. }
  2502. void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src,
  2503. struct ath10k_fw_stats_peer *dst)
  2504. {
  2505. ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
  2506. dst->peer_rssi = __le32_to_cpu(src->peer_rssi);
  2507. dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate);
  2508. }
  2509. static void
  2510. ath10k_wmi_10_4_pull_peer_stats(const struct wmi_10_4_peer_stats *src,
  2511. struct ath10k_fw_stats_peer *dst)
  2512. {
  2513. ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
  2514. dst->peer_rssi = __le32_to_cpu(src->peer_rssi);
  2515. dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate);
  2516. dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
  2517. }
  2518. static int ath10k_wmi_main_op_pull_fw_stats(struct ath10k *ar,
  2519. struct sk_buff *skb,
  2520. struct ath10k_fw_stats *stats)
  2521. {
  2522. const struct wmi_stats_event *ev = (void *)skb->data;
  2523. u32 num_pdev_stats, num_vdev_stats, num_peer_stats;
  2524. int i;
  2525. if (!skb_pull(skb, sizeof(*ev)))
  2526. return -EPROTO;
  2527. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2528. num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
  2529. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2530. for (i = 0; i < num_pdev_stats; i++) {
  2531. const struct wmi_pdev_stats *src;
  2532. struct ath10k_fw_stats_pdev *dst;
  2533. src = (void *)skb->data;
  2534. if (!skb_pull(skb, sizeof(*src)))
  2535. return -EPROTO;
  2536. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2537. if (!dst)
  2538. continue;
  2539. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2540. ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
  2541. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  2542. list_add_tail(&dst->list, &stats->pdevs);
  2543. }
  2544. /* fw doesn't implement vdev stats */
  2545. for (i = 0; i < num_peer_stats; i++) {
  2546. const struct wmi_peer_stats *src;
  2547. struct ath10k_fw_stats_peer *dst;
  2548. src = (void *)skb->data;
  2549. if (!skb_pull(skb, sizeof(*src)))
  2550. return -EPROTO;
  2551. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2552. if (!dst)
  2553. continue;
  2554. ath10k_wmi_pull_peer_stats(src, dst);
  2555. list_add_tail(&dst->list, &stats->peers);
  2556. }
  2557. return 0;
  2558. }
  2559. static int ath10k_wmi_10x_op_pull_fw_stats(struct ath10k *ar,
  2560. struct sk_buff *skb,
  2561. struct ath10k_fw_stats *stats)
  2562. {
  2563. const struct wmi_stats_event *ev = (void *)skb->data;
  2564. u32 num_pdev_stats, num_vdev_stats, num_peer_stats;
  2565. int i;
  2566. if (!skb_pull(skb, sizeof(*ev)))
  2567. return -EPROTO;
  2568. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2569. num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
  2570. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2571. for (i = 0; i < num_pdev_stats; i++) {
  2572. const struct wmi_10x_pdev_stats *src;
  2573. struct ath10k_fw_stats_pdev *dst;
  2574. src = (void *)skb->data;
  2575. if (!skb_pull(skb, sizeof(*src)))
  2576. return -EPROTO;
  2577. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2578. if (!dst)
  2579. continue;
  2580. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2581. ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
  2582. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  2583. ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
  2584. list_add_tail(&dst->list, &stats->pdevs);
  2585. }
  2586. /* fw doesn't implement vdev stats */
  2587. for (i = 0; i < num_peer_stats; i++) {
  2588. const struct wmi_10x_peer_stats *src;
  2589. struct ath10k_fw_stats_peer *dst;
  2590. src = (void *)skb->data;
  2591. if (!skb_pull(skb, sizeof(*src)))
  2592. return -EPROTO;
  2593. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2594. if (!dst)
  2595. continue;
  2596. ath10k_wmi_pull_peer_stats(&src->old, dst);
  2597. dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
  2598. list_add_tail(&dst->list, &stats->peers);
  2599. }
  2600. return 0;
  2601. }
  2602. static int ath10k_wmi_10_2_op_pull_fw_stats(struct ath10k *ar,
  2603. struct sk_buff *skb,
  2604. struct ath10k_fw_stats *stats)
  2605. {
  2606. const struct wmi_10_2_stats_event *ev = (void *)skb->data;
  2607. u32 num_pdev_stats;
  2608. u32 num_pdev_ext_stats;
  2609. u32 num_vdev_stats;
  2610. u32 num_peer_stats;
  2611. int i;
  2612. if (!skb_pull(skb, sizeof(*ev)))
  2613. return -EPROTO;
  2614. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2615. num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
  2616. num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
  2617. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2618. for (i = 0; i < num_pdev_stats; i++) {
  2619. const struct wmi_10_2_pdev_stats *src;
  2620. struct ath10k_fw_stats_pdev *dst;
  2621. src = (void *)skb->data;
  2622. if (!skb_pull(skb, sizeof(*src)))
  2623. return -EPROTO;
  2624. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2625. if (!dst)
  2626. continue;
  2627. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2628. ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
  2629. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  2630. ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
  2631. /* FIXME: expose 10.2 specific values */
  2632. list_add_tail(&dst->list, &stats->pdevs);
  2633. }
  2634. for (i = 0; i < num_pdev_ext_stats; i++) {
  2635. const struct wmi_10_2_pdev_ext_stats *src;
  2636. src = (void *)skb->data;
  2637. if (!skb_pull(skb, sizeof(*src)))
  2638. return -EPROTO;
  2639. /* FIXME: expose values to userspace
  2640. *
  2641. * Note: Even though this loop seems to do nothing it is
  2642. * required to parse following sub-structures properly.
  2643. */
  2644. }
  2645. /* fw doesn't implement vdev stats */
  2646. for (i = 0; i < num_peer_stats; i++) {
  2647. const struct wmi_10_2_peer_stats *src;
  2648. struct ath10k_fw_stats_peer *dst;
  2649. src = (void *)skb->data;
  2650. if (!skb_pull(skb, sizeof(*src)))
  2651. return -EPROTO;
  2652. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2653. if (!dst)
  2654. continue;
  2655. ath10k_wmi_pull_peer_stats(&src->old, dst);
  2656. dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
  2657. /* FIXME: expose 10.2 specific values */
  2658. list_add_tail(&dst->list, &stats->peers);
  2659. }
  2660. return 0;
  2661. }
  2662. static int ath10k_wmi_10_2_4_op_pull_fw_stats(struct ath10k *ar,
  2663. struct sk_buff *skb,
  2664. struct ath10k_fw_stats *stats)
  2665. {
  2666. const struct wmi_10_2_stats_event *ev = (void *)skb->data;
  2667. u32 num_pdev_stats;
  2668. u32 num_pdev_ext_stats;
  2669. u32 num_vdev_stats;
  2670. u32 num_peer_stats;
  2671. int i;
  2672. if (!skb_pull(skb, sizeof(*ev)))
  2673. return -EPROTO;
  2674. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2675. num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
  2676. num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
  2677. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2678. for (i = 0; i < num_pdev_stats; i++) {
  2679. const struct wmi_10_2_pdev_stats *src;
  2680. struct ath10k_fw_stats_pdev *dst;
  2681. src = (void *)skb->data;
  2682. if (!skb_pull(skb, sizeof(*src)))
  2683. return -EPROTO;
  2684. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2685. if (!dst)
  2686. continue;
  2687. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2688. ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
  2689. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  2690. ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
  2691. /* FIXME: expose 10.2 specific values */
  2692. list_add_tail(&dst->list, &stats->pdevs);
  2693. }
  2694. for (i = 0; i < num_pdev_ext_stats; i++) {
  2695. const struct wmi_10_2_pdev_ext_stats *src;
  2696. src = (void *)skb->data;
  2697. if (!skb_pull(skb, sizeof(*src)))
  2698. return -EPROTO;
  2699. /* FIXME: expose values to userspace
  2700. *
  2701. * Note: Even though this loop seems to do nothing it is
  2702. * required to parse following sub-structures properly.
  2703. */
  2704. }
  2705. /* fw doesn't implement vdev stats */
  2706. for (i = 0; i < num_peer_stats; i++) {
  2707. const struct wmi_10_2_4_ext_peer_stats *src;
  2708. struct ath10k_fw_stats_peer *dst;
  2709. int stats_len;
  2710. if (test_bit(WMI_SERVICE_PEER_STATS, ar->wmi.svc_map))
  2711. stats_len = sizeof(struct wmi_10_2_4_ext_peer_stats);
  2712. else
  2713. stats_len = sizeof(struct wmi_10_2_4_peer_stats);
  2714. src = (void *)skb->data;
  2715. if (!skb_pull(skb, stats_len))
  2716. return -EPROTO;
  2717. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2718. if (!dst)
  2719. continue;
  2720. ath10k_wmi_pull_peer_stats(&src->common.old, dst);
  2721. dst->peer_rx_rate = __le32_to_cpu(src->common.peer_rx_rate);
  2722. if (ath10k_peer_stats_enabled(ar))
  2723. dst->rx_duration = __le32_to_cpu(src->rx_duration);
  2724. /* FIXME: expose 10.2 specific values */
  2725. list_add_tail(&dst->list, &stats->peers);
  2726. }
  2727. return 0;
  2728. }
  2729. static int ath10k_wmi_10_4_op_pull_fw_stats(struct ath10k *ar,
  2730. struct sk_buff *skb,
  2731. struct ath10k_fw_stats *stats)
  2732. {
  2733. const struct wmi_10_2_stats_event *ev = (void *)skb->data;
  2734. u32 num_pdev_stats;
  2735. u32 num_pdev_ext_stats;
  2736. u32 num_vdev_stats;
  2737. u32 num_peer_stats;
  2738. u32 num_bcnflt_stats;
  2739. u32 stats_id;
  2740. int i;
  2741. if (!skb_pull(skb, sizeof(*ev)))
  2742. return -EPROTO;
  2743. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2744. num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
  2745. num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
  2746. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2747. num_bcnflt_stats = __le32_to_cpu(ev->num_bcnflt_stats);
  2748. stats_id = __le32_to_cpu(ev->stats_id);
  2749. for (i = 0; i < num_pdev_stats; i++) {
  2750. const struct wmi_10_4_pdev_stats *src;
  2751. struct ath10k_fw_stats_pdev *dst;
  2752. src = (void *)skb->data;
  2753. if (!skb_pull(skb, sizeof(*src)))
  2754. return -EPROTO;
  2755. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2756. if (!dst)
  2757. continue;
  2758. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2759. ath10k_wmi_10_4_pull_pdev_stats_tx(&src->tx, dst);
  2760. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  2761. dst->rx_ovfl_errs = __le32_to_cpu(src->rx_ovfl_errs);
  2762. ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
  2763. list_add_tail(&dst->list, &stats->pdevs);
  2764. }
  2765. for (i = 0; i < num_pdev_ext_stats; i++) {
  2766. const struct wmi_10_2_pdev_ext_stats *src;
  2767. src = (void *)skb->data;
  2768. if (!skb_pull(skb, sizeof(*src)))
  2769. return -EPROTO;
  2770. /* FIXME: expose values to userspace
  2771. *
  2772. * Note: Even though this loop seems to do nothing it is
  2773. * required to parse following sub-structures properly.
  2774. */
  2775. }
  2776. /* fw doesn't implement vdev stats */
  2777. for (i = 0; i < num_peer_stats; i++) {
  2778. const struct wmi_10_4_peer_stats *src;
  2779. struct ath10k_fw_stats_peer *dst;
  2780. src = (void *)skb->data;
  2781. if (!skb_pull(skb, sizeof(*src)))
  2782. return -EPROTO;
  2783. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2784. if (!dst)
  2785. continue;
  2786. ath10k_wmi_10_4_pull_peer_stats(src, dst);
  2787. list_add_tail(&dst->list, &stats->peers);
  2788. }
  2789. for (i = 0; i < num_bcnflt_stats; i++) {
  2790. const struct wmi_10_4_bss_bcn_filter_stats *src;
  2791. src = (void *)skb->data;
  2792. if (!skb_pull(skb, sizeof(*src)))
  2793. return -EPROTO;
  2794. /* FIXME: expose values to userspace
  2795. *
  2796. * Note: Even though this loop seems to do nothing it is
  2797. * required to parse following sub-structures properly.
  2798. */
  2799. }
  2800. if ((stats_id & WMI_10_4_STAT_PEER_EXTD) == 0)
  2801. return 0;
  2802. stats->extended = true;
  2803. for (i = 0; i < num_peer_stats; i++) {
  2804. const struct wmi_10_4_peer_extd_stats *src;
  2805. struct ath10k_fw_extd_stats_peer *dst;
  2806. src = (void *)skb->data;
  2807. if (!skb_pull(skb, sizeof(*src)))
  2808. return -EPROTO;
  2809. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2810. if (!dst)
  2811. continue;
  2812. ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
  2813. dst->rx_duration = __le32_to_cpu(src->rx_duration);
  2814. list_add_tail(&dst->list, &stats->peers_extd);
  2815. }
  2816. return 0;
  2817. }
  2818. void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb)
  2819. {
  2820. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_UPDATE_STATS_EVENTID\n");
  2821. ath10k_debug_fw_stats_process(ar, skb);
  2822. }
  2823. static int
  2824. ath10k_wmi_op_pull_vdev_start_ev(struct ath10k *ar, struct sk_buff *skb,
  2825. struct wmi_vdev_start_ev_arg *arg)
  2826. {
  2827. struct wmi_vdev_start_response_event *ev = (void *)skb->data;
  2828. if (skb->len < sizeof(*ev))
  2829. return -EPROTO;
  2830. skb_pull(skb, sizeof(*ev));
  2831. arg->vdev_id = ev->vdev_id;
  2832. arg->req_id = ev->req_id;
  2833. arg->resp_type = ev->resp_type;
  2834. arg->status = ev->status;
  2835. return 0;
  2836. }
  2837. void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb)
  2838. {
  2839. struct wmi_vdev_start_ev_arg arg = {};
  2840. int ret;
  2841. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_START_RESP_EVENTID\n");
  2842. ret = ath10k_wmi_pull_vdev_start(ar, skb, &arg);
  2843. if (ret) {
  2844. ath10k_warn(ar, "failed to parse vdev start event: %d\n", ret);
  2845. return;
  2846. }
  2847. if (WARN_ON(__le32_to_cpu(arg.status)))
  2848. return;
  2849. complete(&ar->vdev_setup_done);
  2850. }
  2851. void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb)
  2852. {
  2853. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STOPPED_EVENTID\n");
  2854. complete(&ar->vdev_setup_done);
  2855. }
  2856. static int
  2857. ath10k_wmi_op_pull_peer_kick_ev(struct ath10k *ar, struct sk_buff *skb,
  2858. struct wmi_peer_kick_ev_arg *arg)
  2859. {
  2860. struct wmi_peer_sta_kickout_event *ev = (void *)skb->data;
  2861. if (skb->len < sizeof(*ev))
  2862. return -EPROTO;
  2863. skb_pull(skb, sizeof(*ev));
  2864. arg->mac_addr = ev->peer_macaddr.addr;
  2865. return 0;
  2866. }
  2867. void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb)
  2868. {
  2869. struct wmi_peer_kick_ev_arg arg = {};
  2870. struct ieee80211_sta *sta;
  2871. int ret;
  2872. ret = ath10k_wmi_pull_peer_kick(ar, skb, &arg);
  2873. if (ret) {
  2874. ath10k_warn(ar, "failed to parse peer kickout event: %d\n",
  2875. ret);
  2876. return;
  2877. }
  2878. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event peer sta kickout %pM\n",
  2879. arg.mac_addr);
  2880. rcu_read_lock();
  2881. sta = ieee80211_find_sta_by_ifaddr(ar->hw, arg.mac_addr, NULL);
  2882. if (!sta) {
  2883. ath10k_warn(ar, "Spurious quick kickout for STA %pM\n",
  2884. arg.mac_addr);
  2885. goto exit;
  2886. }
  2887. ieee80211_report_low_ack(sta, 10);
  2888. exit:
  2889. rcu_read_unlock();
  2890. }
  2891. /*
  2892. * FIXME
  2893. *
  2894. * We don't report to mac80211 sleep state of connected
  2895. * stations. Due to this mac80211 can't fill in TIM IE
  2896. * correctly.
  2897. *
  2898. * I know of no way of getting nullfunc frames that contain
  2899. * sleep transition from connected stations - these do not
  2900. * seem to be sent from the target to the host. There also
  2901. * doesn't seem to be a dedicated event for that. So the
  2902. * only way left to do this would be to read tim_bitmap
  2903. * during SWBA.
  2904. *
  2905. * We could probably try using tim_bitmap from SWBA to tell
  2906. * mac80211 which stations are asleep and which are not. The
  2907. * problem here is calling mac80211 functions so many times
  2908. * could take too long and make us miss the time to submit
  2909. * the beacon to the target.
  2910. *
  2911. * So as a workaround we try to extend the TIM IE if there
  2912. * is unicast buffered for stations with aid > 7 and fill it
  2913. * in ourselves.
  2914. */
  2915. static void ath10k_wmi_update_tim(struct ath10k *ar,
  2916. struct ath10k_vif *arvif,
  2917. struct sk_buff *bcn,
  2918. const struct wmi_tim_info_arg *tim_info)
  2919. {
  2920. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)bcn->data;
  2921. struct ieee80211_tim_ie *tim;
  2922. u8 *ies, *ie;
  2923. u8 ie_len, pvm_len;
  2924. __le32 t;
  2925. u32 v, tim_len;
  2926. /* When FW reports 0 in tim_len, ensure atleast first byte
  2927. * in tim_bitmap is considered for pvm calculation.
  2928. */
  2929. tim_len = tim_info->tim_len ? __le32_to_cpu(tim_info->tim_len) : 1;
  2930. /* if next SWBA has no tim_changed the tim_bitmap is garbage.
  2931. * we must copy the bitmap upon change and reuse it later
  2932. */
  2933. if (__le32_to_cpu(tim_info->tim_changed)) {
  2934. int i;
  2935. if (sizeof(arvif->u.ap.tim_bitmap) < tim_len) {
  2936. ath10k_warn(ar, "SWBA TIM field is too big (%u), truncated it to %zu",
  2937. tim_len, sizeof(arvif->u.ap.tim_bitmap));
  2938. tim_len = sizeof(arvif->u.ap.tim_bitmap);
  2939. }
  2940. for (i = 0; i < tim_len; i++) {
  2941. t = tim_info->tim_bitmap[i / 4];
  2942. v = __le32_to_cpu(t);
  2943. arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF;
  2944. }
  2945. /* FW reports either length 0 or length based on max supported
  2946. * station. so we calculate this on our own
  2947. */
  2948. arvif->u.ap.tim_len = 0;
  2949. for (i = 0; i < tim_len; i++)
  2950. if (arvif->u.ap.tim_bitmap[i])
  2951. arvif->u.ap.tim_len = i;
  2952. arvif->u.ap.tim_len++;
  2953. }
  2954. ies = bcn->data;
  2955. ies += ieee80211_hdrlen(hdr->frame_control);
  2956. ies += 12; /* fixed parameters */
  2957. ie = (u8 *)cfg80211_find_ie(WLAN_EID_TIM, ies,
  2958. (u8 *)skb_tail_pointer(bcn) - ies);
  2959. if (!ie) {
  2960. if (arvif->vdev_type != WMI_VDEV_TYPE_IBSS)
  2961. ath10k_warn(ar, "no tim ie found;\n");
  2962. return;
  2963. }
  2964. tim = (void *)ie + 2;
  2965. ie_len = ie[1];
  2966. pvm_len = ie_len - 3; /* exclude dtim count, dtim period, bmap ctl */
  2967. if (pvm_len < arvif->u.ap.tim_len) {
  2968. int expand_size = tim_len - pvm_len;
  2969. int move_size = skb_tail_pointer(bcn) - (ie + 2 + ie_len);
  2970. void *next_ie = ie + 2 + ie_len;
  2971. if (skb_put(bcn, expand_size)) {
  2972. memmove(next_ie + expand_size, next_ie, move_size);
  2973. ie[1] += expand_size;
  2974. ie_len += expand_size;
  2975. pvm_len += expand_size;
  2976. } else {
  2977. ath10k_warn(ar, "tim expansion failed\n");
  2978. }
  2979. }
  2980. if (pvm_len > tim_len) {
  2981. ath10k_warn(ar, "tim pvm length is too great (%d)\n", pvm_len);
  2982. return;
  2983. }
  2984. tim->bitmap_ctrl = !!__le32_to_cpu(tim_info->tim_mcast);
  2985. memcpy(tim->virtual_map, arvif->u.ap.tim_bitmap, pvm_len);
  2986. if (tim->dtim_count == 0) {
  2987. ATH10K_SKB_CB(bcn)->flags |= ATH10K_SKB_F_DTIM_ZERO;
  2988. if (__le32_to_cpu(tim_info->tim_mcast) == 1)
  2989. ATH10K_SKB_CB(bcn)->flags |= ATH10K_SKB_F_DELIVER_CAB;
  2990. }
  2991. ath10k_dbg(ar, ATH10K_DBG_MGMT, "dtim %d/%d mcast %d pvmlen %d\n",
  2992. tim->dtim_count, tim->dtim_period,
  2993. tim->bitmap_ctrl, pvm_len);
  2994. }
  2995. static void ath10k_wmi_update_noa(struct ath10k *ar, struct ath10k_vif *arvif,
  2996. struct sk_buff *bcn,
  2997. const struct wmi_p2p_noa_info *noa)
  2998. {
  2999. if (!arvif->vif->p2p)
  3000. return;
  3001. ath10k_dbg(ar, ATH10K_DBG_MGMT, "noa changed: %d\n", noa->changed);
  3002. if (noa->changed & WMI_P2P_NOA_CHANGED_BIT)
  3003. ath10k_p2p_noa_update(arvif, noa);
  3004. if (arvif->u.ap.noa_data)
  3005. if (!pskb_expand_head(bcn, 0, arvif->u.ap.noa_len, GFP_ATOMIC))
  3006. skb_put_data(bcn, arvif->u.ap.noa_data,
  3007. arvif->u.ap.noa_len);
  3008. }
  3009. static int ath10k_wmi_op_pull_swba_ev(struct ath10k *ar, struct sk_buff *skb,
  3010. struct wmi_swba_ev_arg *arg)
  3011. {
  3012. struct wmi_host_swba_event *ev = (void *)skb->data;
  3013. u32 map;
  3014. size_t i;
  3015. if (skb->len < sizeof(*ev))
  3016. return -EPROTO;
  3017. skb_pull(skb, sizeof(*ev));
  3018. arg->vdev_map = ev->vdev_map;
  3019. for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
  3020. if (!(map & BIT(0)))
  3021. continue;
  3022. /* If this happens there were some changes in firmware and
  3023. * ath10k should update the max size of tim_info array.
  3024. */
  3025. if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
  3026. break;
  3027. if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
  3028. sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
  3029. ath10k_warn(ar, "refusing to parse invalid swba structure\n");
  3030. return -EPROTO;
  3031. }
  3032. arg->tim_info[i].tim_len = ev->bcn_info[i].tim_info.tim_len;
  3033. arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
  3034. arg->tim_info[i].tim_bitmap =
  3035. ev->bcn_info[i].tim_info.tim_bitmap;
  3036. arg->tim_info[i].tim_changed =
  3037. ev->bcn_info[i].tim_info.tim_changed;
  3038. arg->tim_info[i].tim_num_ps_pending =
  3039. ev->bcn_info[i].tim_info.tim_num_ps_pending;
  3040. arg->noa_info[i] = &ev->bcn_info[i].p2p_noa_info;
  3041. i++;
  3042. }
  3043. return 0;
  3044. }
  3045. static int ath10k_wmi_10_2_4_op_pull_swba_ev(struct ath10k *ar,
  3046. struct sk_buff *skb,
  3047. struct wmi_swba_ev_arg *arg)
  3048. {
  3049. struct wmi_10_2_4_host_swba_event *ev = (void *)skb->data;
  3050. u32 map;
  3051. size_t i;
  3052. if (skb->len < sizeof(*ev))
  3053. return -EPROTO;
  3054. skb_pull(skb, sizeof(*ev));
  3055. arg->vdev_map = ev->vdev_map;
  3056. for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
  3057. if (!(map & BIT(0)))
  3058. continue;
  3059. /* If this happens there were some changes in firmware and
  3060. * ath10k should update the max size of tim_info array.
  3061. */
  3062. if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
  3063. break;
  3064. if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
  3065. sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
  3066. ath10k_warn(ar, "refusing to parse invalid swba structure\n");
  3067. return -EPROTO;
  3068. }
  3069. arg->tim_info[i].tim_len = ev->bcn_info[i].tim_info.tim_len;
  3070. arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
  3071. arg->tim_info[i].tim_bitmap =
  3072. ev->bcn_info[i].tim_info.tim_bitmap;
  3073. arg->tim_info[i].tim_changed =
  3074. ev->bcn_info[i].tim_info.tim_changed;
  3075. arg->tim_info[i].tim_num_ps_pending =
  3076. ev->bcn_info[i].tim_info.tim_num_ps_pending;
  3077. i++;
  3078. }
  3079. return 0;
  3080. }
  3081. static int ath10k_wmi_10_4_op_pull_swba_ev(struct ath10k *ar,
  3082. struct sk_buff *skb,
  3083. struct wmi_swba_ev_arg *arg)
  3084. {
  3085. struct wmi_10_4_host_swba_event *ev = (void *)skb->data;
  3086. u32 map, tim_len;
  3087. size_t i;
  3088. if (skb->len < sizeof(*ev))
  3089. return -EPROTO;
  3090. skb_pull(skb, sizeof(*ev));
  3091. arg->vdev_map = ev->vdev_map;
  3092. for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
  3093. if (!(map & BIT(0)))
  3094. continue;
  3095. /* If this happens there were some changes in firmware and
  3096. * ath10k should update the max size of tim_info array.
  3097. */
  3098. if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
  3099. break;
  3100. if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
  3101. sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
  3102. ath10k_warn(ar, "refusing to parse invalid swba structure\n");
  3103. return -EPROTO;
  3104. }
  3105. tim_len = __le32_to_cpu(ev->bcn_info[i].tim_info.tim_len);
  3106. if (tim_len) {
  3107. /* Exclude 4 byte guard length */
  3108. tim_len -= 4;
  3109. arg->tim_info[i].tim_len = __cpu_to_le32(tim_len);
  3110. } else {
  3111. arg->tim_info[i].tim_len = 0;
  3112. }
  3113. arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
  3114. arg->tim_info[i].tim_bitmap =
  3115. ev->bcn_info[i].tim_info.tim_bitmap;
  3116. arg->tim_info[i].tim_changed =
  3117. ev->bcn_info[i].tim_info.tim_changed;
  3118. arg->tim_info[i].tim_num_ps_pending =
  3119. ev->bcn_info[i].tim_info.tim_num_ps_pending;
  3120. /* 10.4 firmware doesn't have p2p support. notice of absence
  3121. * info can be ignored for now.
  3122. */
  3123. i++;
  3124. }
  3125. return 0;
  3126. }
  3127. static enum wmi_txbf_conf ath10k_wmi_10_4_txbf_conf_scheme(struct ath10k *ar)
  3128. {
  3129. return WMI_TXBF_CONF_BEFORE_ASSOC;
  3130. }
  3131. void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb)
  3132. {
  3133. struct wmi_swba_ev_arg arg = {};
  3134. u32 map;
  3135. int i = -1;
  3136. const struct wmi_tim_info_arg *tim_info;
  3137. const struct wmi_p2p_noa_info *noa_info;
  3138. struct ath10k_vif *arvif;
  3139. struct sk_buff *bcn;
  3140. dma_addr_t paddr;
  3141. int ret, vdev_id = 0;
  3142. ret = ath10k_wmi_pull_swba(ar, skb, &arg);
  3143. if (ret) {
  3144. ath10k_warn(ar, "failed to parse swba event: %d\n", ret);
  3145. return;
  3146. }
  3147. map = __le32_to_cpu(arg.vdev_map);
  3148. ath10k_dbg(ar, ATH10K_DBG_MGMT, "mgmt swba vdev_map 0x%x\n",
  3149. map);
  3150. for (; map; map >>= 1, vdev_id++) {
  3151. if (!(map & 0x1))
  3152. continue;
  3153. i++;
  3154. if (i >= WMI_MAX_AP_VDEV) {
  3155. ath10k_warn(ar, "swba has corrupted vdev map\n");
  3156. break;
  3157. }
  3158. tim_info = &arg.tim_info[i];
  3159. noa_info = arg.noa_info[i];
  3160. ath10k_dbg(ar, ATH10K_DBG_MGMT,
  3161. "mgmt event bcn_info %d tim_len %d mcast %d changed %d num_ps_pending %d bitmap 0x%08x%08x%08x%08x\n",
  3162. i,
  3163. __le32_to_cpu(tim_info->tim_len),
  3164. __le32_to_cpu(tim_info->tim_mcast),
  3165. __le32_to_cpu(tim_info->tim_changed),
  3166. __le32_to_cpu(tim_info->tim_num_ps_pending),
  3167. __le32_to_cpu(tim_info->tim_bitmap[3]),
  3168. __le32_to_cpu(tim_info->tim_bitmap[2]),
  3169. __le32_to_cpu(tim_info->tim_bitmap[1]),
  3170. __le32_to_cpu(tim_info->tim_bitmap[0]));
  3171. /* TODO: Only first 4 word from tim_bitmap is dumped.
  3172. * Extend debug code to dump full tim_bitmap.
  3173. */
  3174. arvif = ath10k_get_arvif(ar, vdev_id);
  3175. if (arvif == NULL) {
  3176. ath10k_warn(ar, "no vif for vdev_id %d found\n",
  3177. vdev_id);
  3178. continue;
  3179. }
  3180. /* mac80211 would have already asked us to stop beaconing and
  3181. * bring the vdev down, so continue in that case
  3182. */
  3183. if (!arvif->is_up)
  3184. continue;
  3185. /* There are no completions for beacons so wait for next SWBA
  3186. * before telling mac80211 to decrement CSA counter
  3187. *
  3188. * Once CSA counter is completed stop sending beacons until
  3189. * actual channel switch is done
  3190. */
  3191. if (arvif->vif->csa_active &&
  3192. ieee80211_csa_is_complete(arvif->vif)) {
  3193. ieee80211_csa_finish(arvif->vif);
  3194. continue;
  3195. }
  3196. bcn = ieee80211_beacon_get(ar->hw, arvif->vif);
  3197. if (!bcn) {
  3198. ath10k_warn(ar, "could not get mac80211 beacon\n");
  3199. continue;
  3200. }
  3201. ath10k_tx_h_seq_no(arvif->vif, bcn);
  3202. ath10k_wmi_update_tim(ar, arvif, bcn, tim_info);
  3203. ath10k_wmi_update_noa(ar, arvif, bcn, noa_info);
  3204. spin_lock_bh(&ar->data_lock);
  3205. if (arvif->beacon) {
  3206. switch (arvif->beacon_state) {
  3207. case ATH10K_BEACON_SENT:
  3208. break;
  3209. case ATH10K_BEACON_SCHEDULED:
  3210. ath10k_warn(ar, "SWBA overrun on vdev %d, skipped old beacon\n",
  3211. arvif->vdev_id);
  3212. break;
  3213. case ATH10K_BEACON_SENDING:
  3214. ath10k_warn(ar, "SWBA overrun on vdev %d, skipped new beacon\n",
  3215. arvif->vdev_id);
  3216. dev_kfree_skb(bcn);
  3217. goto skip;
  3218. }
  3219. ath10k_mac_vif_beacon_free(arvif);
  3220. }
  3221. if (!arvif->beacon_buf) {
  3222. paddr = dma_map_single(arvif->ar->dev, bcn->data,
  3223. bcn->len, DMA_TO_DEVICE);
  3224. ret = dma_mapping_error(arvif->ar->dev, paddr);
  3225. if (ret) {
  3226. ath10k_warn(ar, "failed to map beacon: %d\n",
  3227. ret);
  3228. dev_kfree_skb_any(bcn);
  3229. goto skip;
  3230. }
  3231. ATH10K_SKB_CB(bcn)->paddr = paddr;
  3232. } else {
  3233. if (bcn->len > IEEE80211_MAX_FRAME_LEN) {
  3234. ath10k_warn(ar, "trimming beacon %d -> %d bytes!\n",
  3235. bcn->len, IEEE80211_MAX_FRAME_LEN);
  3236. skb_trim(bcn, IEEE80211_MAX_FRAME_LEN);
  3237. }
  3238. memcpy(arvif->beacon_buf, bcn->data, bcn->len);
  3239. ATH10K_SKB_CB(bcn)->paddr = arvif->beacon_paddr;
  3240. }
  3241. arvif->beacon = bcn;
  3242. arvif->beacon_state = ATH10K_BEACON_SCHEDULED;
  3243. trace_ath10k_tx_hdr(ar, bcn->data, bcn->len);
  3244. trace_ath10k_tx_payload(ar, bcn->data, bcn->len);
  3245. skip:
  3246. spin_unlock_bh(&ar->data_lock);
  3247. }
  3248. ath10k_wmi_tx_beacons_nowait(ar);
  3249. }
  3250. void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb)
  3251. {
  3252. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n");
  3253. }
  3254. static void ath10k_dfs_radar_report(struct ath10k *ar,
  3255. struct wmi_phyerr_ev_arg *phyerr,
  3256. const struct phyerr_radar_report *rr,
  3257. u64 tsf)
  3258. {
  3259. u32 reg0, reg1, tsf32l;
  3260. struct ieee80211_channel *ch;
  3261. struct pulse_event pe;
  3262. u64 tsf64;
  3263. u8 rssi, width;
  3264. reg0 = __le32_to_cpu(rr->reg0);
  3265. reg1 = __le32_to_cpu(rr->reg1);
  3266. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3267. "wmi phyerr radar report chirp %d max_width %d agc_total_gain %d pulse_delta_diff %d\n",
  3268. MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP),
  3269. MS(reg0, RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH),
  3270. MS(reg0, RADAR_REPORT_REG0_AGC_TOTAL_GAIN),
  3271. MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_DIFF));
  3272. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3273. "wmi phyerr radar report pulse_delta_pean %d pulse_sidx %d fft_valid %d agc_mb_gain %d subchan_mask %d\n",
  3274. MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_PEAK),
  3275. MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX),
  3276. MS(reg1, RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID),
  3277. MS(reg1, RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN),
  3278. MS(reg1, RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK));
  3279. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3280. "wmi phyerr radar report pulse_tsf_offset 0x%X pulse_dur: %d\n",
  3281. MS(reg1, RADAR_REPORT_REG1_PULSE_TSF_OFFSET),
  3282. MS(reg1, RADAR_REPORT_REG1_PULSE_DUR));
  3283. if (!ar->dfs_detector)
  3284. return;
  3285. spin_lock_bh(&ar->data_lock);
  3286. ch = ar->rx_channel;
  3287. /* fetch target operating channel during channel change */
  3288. if (!ch)
  3289. ch = ar->tgt_oper_chan;
  3290. spin_unlock_bh(&ar->data_lock);
  3291. if (!ch) {
  3292. ath10k_warn(ar, "failed to derive channel for radar pulse, treating as radar\n");
  3293. goto radar_detected;
  3294. }
  3295. /* report event to DFS pattern detector */
  3296. tsf32l = phyerr->tsf_timestamp;
  3297. tsf64 = tsf & (~0xFFFFFFFFULL);
  3298. tsf64 |= tsf32l;
  3299. width = MS(reg1, RADAR_REPORT_REG1_PULSE_DUR);
  3300. rssi = phyerr->rssi_combined;
  3301. /* hardware store this as 8 bit signed value,
  3302. * set to zero if negative number
  3303. */
  3304. if (rssi & 0x80)
  3305. rssi = 0;
  3306. pe.ts = tsf64;
  3307. pe.freq = ch->center_freq;
  3308. pe.width = width;
  3309. pe.rssi = rssi;
  3310. pe.chirp = (MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP) != 0);
  3311. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3312. "dfs add pulse freq: %d, width: %d, rssi %d, tsf: %llX\n",
  3313. pe.freq, pe.width, pe.rssi, pe.ts);
  3314. ATH10K_DFS_STAT_INC(ar, pulses_detected);
  3315. if (!ar->dfs_detector->add_pulse(ar->dfs_detector, &pe)) {
  3316. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3317. "dfs no pulse pattern detected, yet\n");
  3318. return;
  3319. }
  3320. radar_detected:
  3321. ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs radar detected\n");
  3322. ATH10K_DFS_STAT_INC(ar, radar_detected);
  3323. /* Control radar events reporting in debugfs file
  3324. * dfs_block_radar_events
  3325. */
  3326. if (ar->dfs_block_radar_events) {
  3327. ath10k_info(ar, "DFS Radar detected, but ignored as requested\n");
  3328. return;
  3329. }
  3330. ieee80211_radar_detected(ar->hw);
  3331. }
  3332. static int ath10k_dfs_fft_report(struct ath10k *ar,
  3333. struct wmi_phyerr_ev_arg *phyerr,
  3334. const struct phyerr_fft_report *fftr,
  3335. u64 tsf)
  3336. {
  3337. u32 reg0, reg1;
  3338. u8 rssi, peak_mag;
  3339. reg0 = __le32_to_cpu(fftr->reg0);
  3340. reg1 = __le32_to_cpu(fftr->reg1);
  3341. rssi = phyerr->rssi_combined;
  3342. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3343. "wmi phyerr fft report total_gain_db %d base_pwr_db %d fft_chn_idx %d peak_sidx %d\n",
  3344. MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB),
  3345. MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB),
  3346. MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX),
  3347. MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX));
  3348. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3349. "wmi phyerr fft report rel_pwr_db %d avgpwr_db %d peak_mag %d num_store_bin %d\n",
  3350. MS(reg1, SEARCH_FFT_REPORT_REG1_RELPWR_DB),
  3351. MS(reg1, SEARCH_FFT_REPORT_REG1_AVGPWR_DB),
  3352. MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG),
  3353. MS(reg1, SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB));
  3354. peak_mag = MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG);
  3355. /* false event detection */
  3356. if (rssi == DFS_RSSI_POSSIBLY_FALSE &&
  3357. peak_mag < 2 * DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE) {
  3358. ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs false pulse detected\n");
  3359. ATH10K_DFS_STAT_INC(ar, pulses_discarded);
  3360. return -EINVAL;
  3361. }
  3362. return 0;
  3363. }
  3364. void ath10k_wmi_event_dfs(struct ath10k *ar,
  3365. struct wmi_phyerr_ev_arg *phyerr,
  3366. u64 tsf)
  3367. {
  3368. int buf_len, tlv_len, res, i = 0;
  3369. const struct phyerr_tlv *tlv;
  3370. const struct phyerr_radar_report *rr;
  3371. const struct phyerr_fft_report *fftr;
  3372. const u8 *tlv_buf;
  3373. buf_len = phyerr->buf_len;
  3374. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3375. "wmi event dfs err_code %d rssi %d tsfl 0x%X tsf64 0x%llX len %d\n",
  3376. phyerr->phy_err_code, phyerr->rssi_combined,
  3377. phyerr->tsf_timestamp, tsf, buf_len);
  3378. /* Skip event if DFS disabled */
  3379. if (!IS_ENABLED(CONFIG_ATH10K_DFS_CERTIFIED))
  3380. return;
  3381. ATH10K_DFS_STAT_INC(ar, pulses_total);
  3382. while (i < buf_len) {
  3383. if (i + sizeof(*tlv) > buf_len) {
  3384. ath10k_warn(ar, "too short buf for tlv header (%d)\n",
  3385. i);
  3386. return;
  3387. }
  3388. tlv = (struct phyerr_tlv *)&phyerr->buf[i];
  3389. tlv_len = __le16_to_cpu(tlv->len);
  3390. tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
  3391. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3392. "wmi event dfs tlv_len %d tlv_tag 0x%02X tlv_sig 0x%02X\n",
  3393. tlv_len, tlv->tag, tlv->sig);
  3394. switch (tlv->tag) {
  3395. case PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY:
  3396. if (i + sizeof(*tlv) + sizeof(*rr) > buf_len) {
  3397. ath10k_warn(ar, "too short radar pulse summary (%d)\n",
  3398. i);
  3399. return;
  3400. }
  3401. rr = (struct phyerr_radar_report *)tlv_buf;
  3402. ath10k_dfs_radar_report(ar, phyerr, rr, tsf);
  3403. break;
  3404. case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
  3405. if (i + sizeof(*tlv) + sizeof(*fftr) > buf_len) {
  3406. ath10k_warn(ar, "too short fft report (%d)\n",
  3407. i);
  3408. return;
  3409. }
  3410. fftr = (struct phyerr_fft_report *)tlv_buf;
  3411. res = ath10k_dfs_fft_report(ar, phyerr, fftr, tsf);
  3412. if (res)
  3413. return;
  3414. break;
  3415. }
  3416. i += sizeof(*tlv) + tlv_len;
  3417. }
  3418. }
  3419. void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
  3420. struct wmi_phyerr_ev_arg *phyerr,
  3421. u64 tsf)
  3422. {
  3423. int buf_len, tlv_len, res, i = 0;
  3424. struct phyerr_tlv *tlv;
  3425. const void *tlv_buf;
  3426. const struct phyerr_fft_report *fftr;
  3427. size_t fftr_len;
  3428. buf_len = phyerr->buf_len;
  3429. while (i < buf_len) {
  3430. if (i + sizeof(*tlv) > buf_len) {
  3431. ath10k_warn(ar, "failed to parse phyerr tlv header at byte %d\n",
  3432. i);
  3433. return;
  3434. }
  3435. tlv = (struct phyerr_tlv *)&phyerr->buf[i];
  3436. tlv_len = __le16_to_cpu(tlv->len);
  3437. tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
  3438. if (i + sizeof(*tlv) + tlv_len > buf_len) {
  3439. ath10k_warn(ar, "failed to parse phyerr tlv payload at byte %d\n",
  3440. i);
  3441. return;
  3442. }
  3443. switch (tlv->tag) {
  3444. case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
  3445. if (sizeof(*fftr) > tlv_len) {
  3446. ath10k_warn(ar, "failed to parse fft report at byte %d\n",
  3447. i);
  3448. return;
  3449. }
  3450. fftr_len = tlv_len - sizeof(*fftr);
  3451. fftr = tlv_buf;
  3452. res = ath10k_spectral_process_fft(ar, phyerr,
  3453. fftr, fftr_len,
  3454. tsf);
  3455. if (res < 0) {
  3456. ath10k_dbg(ar, ATH10K_DBG_WMI, "failed to process fft report: %d\n",
  3457. res);
  3458. return;
  3459. }
  3460. break;
  3461. }
  3462. i += sizeof(*tlv) + tlv_len;
  3463. }
  3464. }
  3465. static int ath10k_wmi_op_pull_phyerr_ev_hdr(struct ath10k *ar,
  3466. struct sk_buff *skb,
  3467. struct wmi_phyerr_hdr_arg *arg)
  3468. {
  3469. struct wmi_phyerr_event *ev = (void *)skb->data;
  3470. if (skb->len < sizeof(*ev))
  3471. return -EPROTO;
  3472. arg->num_phyerrs = __le32_to_cpu(ev->num_phyerrs);
  3473. arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32);
  3474. arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32);
  3475. arg->buf_len = skb->len - sizeof(*ev);
  3476. arg->phyerrs = ev->phyerrs;
  3477. return 0;
  3478. }
  3479. static int ath10k_wmi_10_4_op_pull_phyerr_ev_hdr(struct ath10k *ar,
  3480. struct sk_buff *skb,
  3481. struct wmi_phyerr_hdr_arg *arg)
  3482. {
  3483. struct wmi_10_4_phyerr_event *ev = (void *)skb->data;
  3484. if (skb->len < sizeof(*ev))
  3485. return -EPROTO;
  3486. /* 10.4 firmware always reports only one phyerr */
  3487. arg->num_phyerrs = 1;
  3488. arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32);
  3489. arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32);
  3490. arg->buf_len = skb->len;
  3491. arg->phyerrs = skb->data;
  3492. return 0;
  3493. }
  3494. int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar,
  3495. const void *phyerr_buf,
  3496. int left_len,
  3497. struct wmi_phyerr_ev_arg *arg)
  3498. {
  3499. const struct wmi_phyerr *phyerr = phyerr_buf;
  3500. int i;
  3501. if (left_len < sizeof(*phyerr)) {
  3502. ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n",
  3503. left_len, sizeof(*phyerr));
  3504. return -EINVAL;
  3505. }
  3506. arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp);
  3507. arg->freq1 = __le16_to_cpu(phyerr->freq1);
  3508. arg->freq2 = __le16_to_cpu(phyerr->freq2);
  3509. arg->rssi_combined = phyerr->rssi_combined;
  3510. arg->chan_width_mhz = phyerr->chan_width_mhz;
  3511. arg->buf_len = __le32_to_cpu(phyerr->buf_len);
  3512. arg->buf = phyerr->buf;
  3513. arg->hdr_len = sizeof(*phyerr);
  3514. for (i = 0; i < 4; i++)
  3515. arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]);
  3516. switch (phyerr->phy_err_code) {
  3517. case PHY_ERROR_GEN_SPECTRAL_SCAN:
  3518. arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN;
  3519. break;
  3520. case PHY_ERROR_GEN_FALSE_RADAR_EXT:
  3521. arg->phy_err_code = PHY_ERROR_FALSE_RADAR_EXT;
  3522. break;
  3523. case PHY_ERROR_GEN_RADAR:
  3524. arg->phy_err_code = PHY_ERROR_RADAR;
  3525. break;
  3526. default:
  3527. arg->phy_err_code = PHY_ERROR_UNKNOWN;
  3528. break;
  3529. }
  3530. return 0;
  3531. }
  3532. static int ath10k_wmi_10_4_op_pull_phyerr_ev(struct ath10k *ar,
  3533. const void *phyerr_buf,
  3534. int left_len,
  3535. struct wmi_phyerr_ev_arg *arg)
  3536. {
  3537. const struct wmi_10_4_phyerr_event *phyerr = phyerr_buf;
  3538. u32 phy_err_mask;
  3539. int i;
  3540. if (left_len < sizeof(*phyerr)) {
  3541. ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n",
  3542. left_len, sizeof(*phyerr));
  3543. return -EINVAL;
  3544. }
  3545. arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp);
  3546. arg->freq1 = __le16_to_cpu(phyerr->freq1);
  3547. arg->freq2 = __le16_to_cpu(phyerr->freq2);
  3548. arg->rssi_combined = phyerr->rssi_combined;
  3549. arg->chan_width_mhz = phyerr->chan_width_mhz;
  3550. arg->buf_len = __le32_to_cpu(phyerr->buf_len);
  3551. arg->buf = phyerr->buf;
  3552. arg->hdr_len = sizeof(*phyerr);
  3553. for (i = 0; i < 4; i++)
  3554. arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]);
  3555. phy_err_mask = __le32_to_cpu(phyerr->phy_err_mask[0]);
  3556. if (phy_err_mask & PHY_ERROR_10_4_SPECTRAL_SCAN_MASK)
  3557. arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN;
  3558. else if (phy_err_mask & PHY_ERROR_10_4_RADAR_MASK)
  3559. arg->phy_err_code = PHY_ERROR_RADAR;
  3560. else
  3561. arg->phy_err_code = PHY_ERROR_UNKNOWN;
  3562. return 0;
  3563. }
  3564. void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb)
  3565. {
  3566. struct wmi_phyerr_hdr_arg hdr_arg = {};
  3567. struct wmi_phyerr_ev_arg phyerr_arg = {};
  3568. const void *phyerr;
  3569. u32 count, i, buf_len, phy_err_code;
  3570. u64 tsf;
  3571. int left_len, ret;
  3572. ATH10K_DFS_STAT_INC(ar, phy_errors);
  3573. ret = ath10k_wmi_pull_phyerr_hdr(ar, skb, &hdr_arg);
  3574. if (ret) {
  3575. ath10k_warn(ar, "failed to parse phyerr event hdr: %d\n", ret);
  3576. return;
  3577. }
  3578. /* Check number of included events */
  3579. count = hdr_arg.num_phyerrs;
  3580. left_len = hdr_arg.buf_len;
  3581. tsf = hdr_arg.tsf_u32;
  3582. tsf <<= 32;
  3583. tsf |= hdr_arg.tsf_l32;
  3584. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3585. "wmi event phyerr count %d tsf64 0x%llX\n",
  3586. count, tsf);
  3587. phyerr = hdr_arg.phyerrs;
  3588. for (i = 0; i < count; i++) {
  3589. ret = ath10k_wmi_pull_phyerr(ar, phyerr, left_len, &phyerr_arg);
  3590. if (ret) {
  3591. ath10k_warn(ar, "failed to parse phyerr event (%d)\n",
  3592. i);
  3593. return;
  3594. }
  3595. left_len -= phyerr_arg.hdr_len;
  3596. buf_len = phyerr_arg.buf_len;
  3597. phy_err_code = phyerr_arg.phy_err_code;
  3598. if (left_len < buf_len) {
  3599. ath10k_warn(ar, "single event (%d) wrong buf len\n", i);
  3600. return;
  3601. }
  3602. left_len -= buf_len;
  3603. switch (phy_err_code) {
  3604. case PHY_ERROR_RADAR:
  3605. ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf);
  3606. break;
  3607. case PHY_ERROR_SPECTRAL_SCAN:
  3608. ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf);
  3609. break;
  3610. case PHY_ERROR_FALSE_RADAR_EXT:
  3611. ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf);
  3612. ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf);
  3613. break;
  3614. default:
  3615. break;
  3616. }
  3617. phyerr = phyerr + phyerr_arg.hdr_len + buf_len;
  3618. }
  3619. }
  3620. void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb)
  3621. {
  3622. struct wmi_roam_ev_arg arg = {};
  3623. int ret;
  3624. u32 vdev_id;
  3625. u32 reason;
  3626. s32 rssi;
  3627. ret = ath10k_wmi_pull_roam_ev(ar, skb, &arg);
  3628. if (ret) {
  3629. ath10k_warn(ar, "failed to parse roam event: %d\n", ret);
  3630. return;
  3631. }
  3632. vdev_id = __le32_to_cpu(arg.vdev_id);
  3633. reason = __le32_to_cpu(arg.reason);
  3634. rssi = __le32_to_cpu(arg.rssi);
  3635. rssi += WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT;
  3636. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3637. "wmi roam event vdev %u reason 0x%08x rssi %d\n",
  3638. vdev_id, reason, rssi);
  3639. if (reason >= WMI_ROAM_REASON_MAX)
  3640. ath10k_warn(ar, "ignoring unknown roam event reason %d on vdev %i\n",
  3641. reason, vdev_id);
  3642. switch (reason) {
  3643. case WMI_ROAM_REASON_BEACON_MISS:
  3644. ath10k_mac_handle_beacon_miss(ar, vdev_id);
  3645. break;
  3646. case WMI_ROAM_REASON_BETTER_AP:
  3647. case WMI_ROAM_REASON_LOW_RSSI:
  3648. case WMI_ROAM_REASON_SUITABLE_AP_FOUND:
  3649. case WMI_ROAM_REASON_HO_FAILED:
  3650. ath10k_warn(ar, "ignoring not implemented roam event reason %d on vdev %i\n",
  3651. reason, vdev_id);
  3652. break;
  3653. }
  3654. }
  3655. void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb)
  3656. {
  3657. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PROFILE_MATCH\n");
  3658. }
  3659. void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb)
  3660. {
  3661. char buf[101], c;
  3662. int i;
  3663. for (i = 0; i < sizeof(buf) - 1; i++) {
  3664. if (i >= skb->len)
  3665. break;
  3666. c = skb->data[i];
  3667. if (c == '\0')
  3668. break;
  3669. if (isascii(c) && isprint(c))
  3670. buf[i] = c;
  3671. else
  3672. buf[i] = '.';
  3673. }
  3674. if (i == sizeof(buf) - 1)
  3675. ath10k_warn(ar, "wmi debug print truncated: %d\n", skb->len);
  3676. /* for some reason the debug prints end with \n, remove that */
  3677. if (skb->data[i - 1] == '\n')
  3678. i--;
  3679. /* the last byte is always reserved for the null character */
  3680. buf[i] = '\0';
  3681. ath10k_dbg(ar, ATH10K_DBG_WMI_PRINT, "wmi print '%s'\n", buf);
  3682. }
  3683. void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb)
  3684. {
  3685. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_QVIT_EVENTID\n");
  3686. }
  3687. void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb)
  3688. {
  3689. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WLAN_PROFILE_DATA_EVENTID\n");
  3690. }
  3691. void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
  3692. struct sk_buff *skb)
  3693. {
  3694. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_MEASUREMENT_REPORT_EVENTID\n");
  3695. }
  3696. void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
  3697. struct sk_buff *skb)
  3698. {
  3699. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TSF_MEASUREMENT_REPORT_EVENTID\n");
  3700. }
  3701. void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb)
  3702. {
  3703. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_ERROR_REPORT_EVENTID\n");
  3704. }
  3705. void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb)
  3706. {
  3707. struct wmi_wow_ev_arg ev = {};
  3708. int ret;
  3709. complete(&ar->wow.wakeup_completed);
  3710. ret = ath10k_wmi_pull_wow_event(ar, skb, &ev);
  3711. if (ret) {
  3712. ath10k_warn(ar, "failed to parse wow wakeup event: %d\n", ret);
  3713. return;
  3714. }
  3715. ath10k_dbg(ar, ATH10K_DBG_WMI, "wow wakeup host reason %s\n",
  3716. wow_reason(ev.wake_reason));
  3717. }
  3718. void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb)
  3719. {
  3720. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_DCS_INTERFERENCE_EVENTID\n");
  3721. }
  3722. static u8 ath10k_tpc_config_get_rate(struct ath10k *ar,
  3723. struct wmi_pdev_tpc_config_event *ev,
  3724. u32 rate_idx, u32 num_chains,
  3725. u32 rate_code, u8 type)
  3726. {
  3727. u8 tpc, num_streams, preamble, ch, stm_idx;
  3728. num_streams = ATH10K_HW_NSS(rate_code);
  3729. preamble = ATH10K_HW_PREAMBLE(rate_code);
  3730. ch = num_chains - 1;
  3731. tpc = min_t(u8, ev->rates_array[rate_idx], ev->max_reg_allow_pow[ch]);
  3732. if (__le32_to_cpu(ev->num_tx_chain) <= 1)
  3733. goto out;
  3734. if (preamble == WMI_RATE_PREAMBLE_CCK)
  3735. goto out;
  3736. stm_idx = num_streams - 1;
  3737. if (num_chains <= num_streams)
  3738. goto out;
  3739. switch (type) {
  3740. case WMI_TPC_TABLE_TYPE_STBC:
  3741. tpc = min_t(u8, tpc,
  3742. ev->max_reg_allow_pow_agstbc[ch - 1][stm_idx]);
  3743. break;
  3744. case WMI_TPC_TABLE_TYPE_TXBF:
  3745. tpc = min_t(u8, tpc,
  3746. ev->max_reg_allow_pow_agtxbf[ch - 1][stm_idx]);
  3747. break;
  3748. case WMI_TPC_TABLE_TYPE_CDD:
  3749. tpc = min_t(u8, tpc,
  3750. ev->max_reg_allow_pow_agcdd[ch - 1][stm_idx]);
  3751. break;
  3752. default:
  3753. ath10k_warn(ar, "unknown wmi tpc table type: %d\n", type);
  3754. tpc = 0;
  3755. break;
  3756. }
  3757. out:
  3758. return tpc;
  3759. }
  3760. static void ath10k_tpc_config_disp_tables(struct ath10k *ar,
  3761. struct wmi_pdev_tpc_config_event *ev,
  3762. struct ath10k_tpc_stats *tpc_stats,
  3763. u8 *rate_code, u16 *pream_table, u8 type)
  3764. {
  3765. u32 i, j, pream_idx, flags;
  3766. u8 tpc[WMI_TPC_TX_N_CHAIN];
  3767. char tpc_value[WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
  3768. char buff[WMI_TPC_BUF_SIZE];
  3769. flags = __le32_to_cpu(ev->flags);
  3770. switch (type) {
  3771. case WMI_TPC_TABLE_TYPE_CDD:
  3772. if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD)) {
  3773. ath10k_dbg(ar, ATH10K_DBG_WMI, "CDD not supported\n");
  3774. tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
  3775. return;
  3776. }
  3777. break;
  3778. case WMI_TPC_TABLE_TYPE_STBC:
  3779. if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC)) {
  3780. ath10k_dbg(ar, ATH10K_DBG_WMI, "STBC not supported\n");
  3781. tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
  3782. return;
  3783. }
  3784. break;
  3785. case WMI_TPC_TABLE_TYPE_TXBF:
  3786. if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF)) {
  3787. ath10k_dbg(ar, ATH10K_DBG_WMI, "TXBF not supported\n");
  3788. tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
  3789. return;
  3790. }
  3791. break;
  3792. default:
  3793. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3794. "invalid table type in wmi tpc event: %d\n", type);
  3795. return;
  3796. }
  3797. pream_idx = 0;
  3798. for (i = 0; i < __le32_to_cpu(ev->rate_max); i++) {
  3799. memset(tpc_value, 0, sizeof(tpc_value));
  3800. memset(buff, 0, sizeof(buff));
  3801. if (i == pream_table[pream_idx])
  3802. pream_idx++;
  3803. for (j = 0; j < WMI_TPC_TX_N_CHAIN; j++) {
  3804. if (j >= __le32_to_cpu(ev->num_tx_chain))
  3805. break;
  3806. tpc[j] = ath10k_tpc_config_get_rate(ar, ev, i, j + 1,
  3807. rate_code[i],
  3808. type);
  3809. snprintf(buff, sizeof(buff), "%8d ", tpc[j]);
  3810. strncat(tpc_value, buff, strlen(buff));
  3811. }
  3812. tpc_stats->tpc_table[type].pream_idx[i] = pream_idx;
  3813. tpc_stats->tpc_table[type].rate_code[i] = rate_code[i];
  3814. memcpy(tpc_stats->tpc_table[type].tpc_value[i],
  3815. tpc_value, sizeof(tpc_value));
  3816. }
  3817. }
  3818. void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb)
  3819. {
  3820. u32 i, j, pream_idx, num_tx_chain;
  3821. u8 rate_code[WMI_TPC_RATE_MAX], rate_idx;
  3822. u16 pream_table[WMI_TPC_PREAM_TABLE_MAX];
  3823. struct wmi_pdev_tpc_config_event *ev;
  3824. struct ath10k_tpc_stats *tpc_stats;
  3825. ev = (struct wmi_pdev_tpc_config_event *)skb->data;
  3826. tpc_stats = kzalloc(sizeof(*tpc_stats), GFP_ATOMIC);
  3827. if (!tpc_stats)
  3828. return;
  3829. /* Create the rate code table based on the chains supported */
  3830. rate_idx = 0;
  3831. pream_idx = 0;
  3832. /* Fill CCK rate code */
  3833. for (i = 0; i < 4; i++) {
  3834. rate_code[rate_idx] =
  3835. ATH10K_HW_RATECODE(i, 0, WMI_RATE_PREAMBLE_CCK);
  3836. rate_idx++;
  3837. }
  3838. pream_table[pream_idx] = rate_idx;
  3839. pream_idx++;
  3840. /* Fill OFDM rate code */
  3841. for (i = 0; i < 8; i++) {
  3842. rate_code[rate_idx] =
  3843. ATH10K_HW_RATECODE(i, 0, WMI_RATE_PREAMBLE_OFDM);
  3844. rate_idx++;
  3845. }
  3846. pream_table[pream_idx] = rate_idx;
  3847. pream_idx++;
  3848. num_tx_chain = __le32_to_cpu(ev->num_tx_chain);
  3849. /* Fill HT20 rate code */
  3850. for (i = 0; i < num_tx_chain; i++) {
  3851. for (j = 0; j < 8; j++) {
  3852. rate_code[rate_idx] =
  3853. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_HT);
  3854. rate_idx++;
  3855. }
  3856. }
  3857. pream_table[pream_idx] = rate_idx;
  3858. pream_idx++;
  3859. /* Fill HT40 rate code */
  3860. for (i = 0; i < num_tx_chain; i++) {
  3861. for (j = 0; j < 8; j++) {
  3862. rate_code[rate_idx] =
  3863. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_HT);
  3864. rate_idx++;
  3865. }
  3866. }
  3867. pream_table[pream_idx] = rate_idx;
  3868. pream_idx++;
  3869. /* Fill VHT20 rate code */
  3870. for (i = 0; i < __le32_to_cpu(ev->num_tx_chain); i++) {
  3871. for (j = 0; j < 10; j++) {
  3872. rate_code[rate_idx] =
  3873. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
  3874. rate_idx++;
  3875. }
  3876. }
  3877. pream_table[pream_idx] = rate_idx;
  3878. pream_idx++;
  3879. /* Fill VHT40 rate code */
  3880. for (i = 0; i < num_tx_chain; i++) {
  3881. for (j = 0; j < 10; j++) {
  3882. rate_code[rate_idx] =
  3883. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
  3884. rate_idx++;
  3885. }
  3886. }
  3887. pream_table[pream_idx] = rate_idx;
  3888. pream_idx++;
  3889. /* Fill VHT80 rate code */
  3890. for (i = 0; i < num_tx_chain; i++) {
  3891. for (j = 0; j < 10; j++) {
  3892. rate_code[rate_idx] =
  3893. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
  3894. rate_idx++;
  3895. }
  3896. }
  3897. pream_table[pream_idx] = rate_idx;
  3898. pream_idx++;
  3899. rate_code[rate_idx++] =
  3900. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_CCK);
  3901. rate_code[rate_idx++] =
  3902. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
  3903. rate_code[rate_idx++] =
  3904. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_CCK);
  3905. rate_code[rate_idx++] =
  3906. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
  3907. rate_code[rate_idx++] =
  3908. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
  3909. pream_table[pream_idx] = ATH10K_TPC_PREAM_TABLE_END;
  3910. tpc_stats->chan_freq = __le32_to_cpu(ev->chan_freq);
  3911. tpc_stats->phy_mode = __le32_to_cpu(ev->phy_mode);
  3912. tpc_stats->ctl = __le32_to_cpu(ev->ctl);
  3913. tpc_stats->reg_domain = __le32_to_cpu(ev->reg_domain);
  3914. tpc_stats->twice_antenna_gain = a_sle32_to_cpu(ev->twice_antenna_gain);
  3915. tpc_stats->twice_antenna_reduction =
  3916. __le32_to_cpu(ev->twice_antenna_reduction);
  3917. tpc_stats->power_limit = __le32_to_cpu(ev->power_limit);
  3918. tpc_stats->twice_max_rd_power = __le32_to_cpu(ev->twice_max_rd_power);
  3919. tpc_stats->num_tx_chain = __le32_to_cpu(ev->num_tx_chain);
  3920. tpc_stats->rate_max = __le32_to_cpu(ev->rate_max);
  3921. ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
  3922. rate_code, pream_table,
  3923. WMI_TPC_TABLE_TYPE_CDD);
  3924. ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
  3925. rate_code, pream_table,
  3926. WMI_TPC_TABLE_TYPE_STBC);
  3927. ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
  3928. rate_code, pream_table,
  3929. WMI_TPC_TABLE_TYPE_TXBF);
  3930. ath10k_debug_tpc_stats_process(ar, tpc_stats);
  3931. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3932. "wmi event tpc config channel %d mode %d ctl %d regd %d gain %d %d limit %d max_power %d tx_chanins %d rates %d\n",
  3933. __le32_to_cpu(ev->chan_freq),
  3934. __le32_to_cpu(ev->phy_mode),
  3935. __le32_to_cpu(ev->ctl),
  3936. __le32_to_cpu(ev->reg_domain),
  3937. a_sle32_to_cpu(ev->twice_antenna_gain),
  3938. __le32_to_cpu(ev->twice_antenna_reduction),
  3939. __le32_to_cpu(ev->power_limit),
  3940. __le32_to_cpu(ev->twice_max_rd_power) / 2,
  3941. __le32_to_cpu(ev->num_tx_chain),
  3942. __le32_to_cpu(ev->rate_max));
  3943. }
  3944. static void
  3945. ath10k_wmi_handle_tdls_peer_event(struct ath10k *ar, struct sk_buff *skb)
  3946. {
  3947. struct wmi_tdls_peer_event *ev;
  3948. struct ath10k_peer *peer;
  3949. struct ath10k_vif *arvif;
  3950. int vdev_id;
  3951. int peer_status;
  3952. int peer_reason;
  3953. u8 reason;
  3954. if (skb->len < sizeof(*ev)) {
  3955. ath10k_err(ar, "received tdls peer event with invalid size (%d bytes)\n",
  3956. skb->len);
  3957. return;
  3958. }
  3959. ev = (struct wmi_tdls_peer_event *)skb->data;
  3960. vdev_id = __le32_to_cpu(ev->vdev_id);
  3961. peer_status = __le32_to_cpu(ev->peer_status);
  3962. peer_reason = __le32_to_cpu(ev->peer_reason);
  3963. spin_lock_bh(&ar->data_lock);
  3964. peer = ath10k_peer_find(ar, vdev_id, ev->peer_macaddr.addr);
  3965. spin_unlock_bh(&ar->data_lock);
  3966. if (!peer) {
  3967. ath10k_warn(ar, "failed to find peer entry for %pM\n",
  3968. ev->peer_macaddr.addr);
  3969. return;
  3970. }
  3971. switch (peer_status) {
  3972. case WMI_TDLS_SHOULD_TEARDOWN:
  3973. switch (peer_reason) {
  3974. case WMI_TDLS_TEARDOWN_REASON_PTR_TIMEOUT:
  3975. case WMI_TDLS_TEARDOWN_REASON_NO_RESPONSE:
  3976. case WMI_TDLS_TEARDOWN_REASON_RSSI:
  3977. reason = WLAN_REASON_TDLS_TEARDOWN_UNREACHABLE;
  3978. break;
  3979. default:
  3980. reason = WLAN_REASON_TDLS_TEARDOWN_UNSPECIFIED;
  3981. break;
  3982. }
  3983. arvif = ath10k_get_arvif(ar, vdev_id);
  3984. if (!arvif) {
  3985. ath10k_warn(ar, "received tdls peer event for invalid vdev id %u\n",
  3986. vdev_id);
  3987. return;
  3988. }
  3989. ieee80211_tdls_oper_request(arvif->vif, ev->peer_macaddr.addr,
  3990. NL80211_TDLS_TEARDOWN, reason,
  3991. GFP_ATOMIC);
  3992. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3993. "received tdls teardown event for peer %pM reason %u\n",
  3994. ev->peer_macaddr.addr, peer_reason);
  3995. break;
  3996. default:
  3997. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3998. "received unknown tdls peer event %u\n",
  3999. peer_status);
  4000. break;
  4001. }
  4002. }
  4003. void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb)
  4004. {
  4005. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_FTM_INTG_EVENTID\n");
  4006. }
  4007. void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar, struct sk_buff *skb)
  4008. {
  4009. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_OFFLOAD_STATUS_EVENTID\n");
  4010. }
  4011. void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb)
  4012. {
  4013. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_REKEY_FAIL_EVENTID\n");
  4014. }
  4015. void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb)
  4016. {
  4017. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_DELBA_COMPLETE_EVENTID\n");
  4018. }
  4019. void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb)
  4020. {
  4021. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_ADDBA_COMPLETE_EVENTID\n");
  4022. }
  4023. void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
  4024. struct sk_buff *skb)
  4025. {
  4026. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID\n");
  4027. }
  4028. void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb)
  4029. {
  4030. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_INST_RSSI_STATS_EVENTID\n");
  4031. }
  4032. void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb)
  4033. {
  4034. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STANDBY_REQ_EVENTID\n");
  4035. }
  4036. void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb)
  4037. {
  4038. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_RESUME_REQ_EVENTID\n");
  4039. }
  4040. static int ath10k_wmi_alloc_chunk(struct ath10k *ar, u32 req_id,
  4041. u32 num_units, u32 unit_len)
  4042. {
  4043. dma_addr_t paddr;
  4044. u32 pool_size;
  4045. int idx = ar->wmi.num_mem_chunks;
  4046. void *vaddr;
  4047. pool_size = num_units * round_up(unit_len, 4);
  4048. vaddr = dma_alloc_coherent(ar->dev, pool_size, &paddr, GFP_KERNEL);
  4049. if (!vaddr)
  4050. return -ENOMEM;
  4051. memset(vaddr, 0, pool_size);
  4052. ar->wmi.mem_chunks[idx].vaddr = vaddr;
  4053. ar->wmi.mem_chunks[idx].paddr = paddr;
  4054. ar->wmi.mem_chunks[idx].len = pool_size;
  4055. ar->wmi.mem_chunks[idx].req_id = req_id;
  4056. ar->wmi.num_mem_chunks++;
  4057. return num_units;
  4058. }
  4059. static int ath10k_wmi_alloc_host_mem(struct ath10k *ar, u32 req_id,
  4060. u32 num_units, u32 unit_len)
  4061. {
  4062. int ret;
  4063. while (num_units) {
  4064. ret = ath10k_wmi_alloc_chunk(ar, req_id, num_units, unit_len);
  4065. if (ret < 0)
  4066. return ret;
  4067. num_units -= ret;
  4068. }
  4069. return 0;
  4070. }
  4071. static bool
  4072. ath10k_wmi_is_host_mem_allocated(struct ath10k *ar,
  4073. const struct wlan_host_mem_req **mem_reqs,
  4074. u32 num_mem_reqs)
  4075. {
  4076. u32 req_id, num_units, unit_size, num_unit_info;
  4077. u32 pool_size;
  4078. int i, j;
  4079. bool found;
  4080. if (ar->wmi.num_mem_chunks != num_mem_reqs)
  4081. return false;
  4082. for (i = 0; i < num_mem_reqs; ++i) {
  4083. req_id = __le32_to_cpu(mem_reqs[i]->req_id);
  4084. num_units = __le32_to_cpu(mem_reqs[i]->num_units);
  4085. unit_size = __le32_to_cpu(mem_reqs[i]->unit_size);
  4086. num_unit_info = __le32_to_cpu(mem_reqs[i]->num_unit_info);
  4087. if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) {
  4088. if (ar->num_active_peers)
  4089. num_units = ar->num_active_peers + 1;
  4090. else
  4091. num_units = ar->max_num_peers + 1;
  4092. } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) {
  4093. num_units = ar->max_num_peers + 1;
  4094. } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) {
  4095. num_units = ar->max_num_vdevs + 1;
  4096. }
  4097. found = false;
  4098. for (j = 0; j < ar->wmi.num_mem_chunks; j++) {
  4099. if (ar->wmi.mem_chunks[j].req_id == req_id) {
  4100. pool_size = num_units * round_up(unit_size, 4);
  4101. if (ar->wmi.mem_chunks[j].len == pool_size) {
  4102. found = true;
  4103. break;
  4104. }
  4105. }
  4106. }
  4107. if (!found)
  4108. return false;
  4109. }
  4110. return true;
  4111. }
  4112. static int
  4113. ath10k_wmi_main_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
  4114. struct wmi_svc_rdy_ev_arg *arg)
  4115. {
  4116. struct wmi_service_ready_event *ev;
  4117. size_t i, n;
  4118. if (skb->len < sizeof(*ev))
  4119. return -EPROTO;
  4120. ev = (void *)skb->data;
  4121. skb_pull(skb, sizeof(*ev));
  4122. arg->min_tx_power = ev->hw_min_tx_power;
  4123. arg->max_tx_power = ev->hw_max_tx_power;
  4124. arg->ht_cap = ev->ht_cap_info;
  4125. arg->vht_cap = ev->vht_cap_info;
  4126. arg->sw_ver0 = ev->sw_version;
  4127. arg->sw_ver1 = ev->sw_version_1;
  4128. arg->phy_capab = ev->phy_capability;
  4129. arg->num_rf_chains = ev->num_rf_chains;
  4130. arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
  4131. arg->low_5ghz_chan = ev->hal_reg_capabilities.low_5ghz_chan;
  4132. arg->high_5ghz_chan = ev->hal_reg_capabilities.high_5ghz_chan;
  4133. arg->num_mem_reqs = ev->num_mem_reqs;
  4134. arg->service_map = ev->wmi_service_bitmap;
  4135. arg->service_map_len = sizeof(ev->wmi_service_bitmap);
  4136. n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
  4137. ARRAY_SIZE(arg->mem_reqs));
  4138. for (i = 0; i < n; i++)
  4139. arg->mem_reqs[i] = &ev->mem_reqs[i];
  4140. if (skb->len <
  4141. __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
  4142. return -EPROTO;
  4143. return 0;
  4144. }
  4145. static int
  4146. ath10k_wmi_10x_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
  4147. struct wmi_svc_rdy_ev_arg *arg)
  4148. {
  4149. struct wmi_10x_service_ready_event *ev;
  4150. int i, n;
  4151. if (skb->len < sizeof(*ev))
  4152. return -EPROTO;
  4153. ev = (void *)skb->data;
  4154. skb_pull(skb, sizeof(*ev));
  4155. arg->min_tx_power = ev->hw_min_tx_power;
  4156. arg->max_tx_power = ev->hw_max_tx_power;
  4157. arg->ht_cap = ev->ht_cap_info;
  4158. arg->vht_cap = ev->vht_cap_info;
  4159. arg->sw_ver0 = ev->sw_version;
  4160. arg->phy_capab = ev->phy_capability;
  4161. arg->num_rf_chains = ev->num_rf_chains;
  4162. arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
  4163. arg->low_5ghz_chan = ev->hal_reg_capabilities.low_5ghz_chan;
  4164. arg->high_5ghz_chan = ev->hal_reg_capabilities.high_5ghz_chan;
  4165. arg->num_mem_reqs = ev->num_mem_reqs;
  4166. arg->service_map = ev->wmi_service_bitmap;
  4167. arg->service_map_len = sizeof(ev->wmi_service_bitmap);
  4168. n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
  4169. ARRAY_SIZE(arg->mem_reqs));
  4170. for (i = 0; i < n; i++)
  4171. arg->mem_reqs[i] = &ev->mem_reqs[i];
  4172. if (skb->len <
  4173. __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
  4174. return -EPROTO;
  4175. return 0;
  4176. }
  4177. static void ath10k_wmi_event_service_ready_work(struct work_struct *work)
  4178. {
  4179. struct ath10k *ar = container_of(work, struct ath10k, svc_rdy_work);
  4180. struct sk_buff *skb = ar->svc_rdy_skb;
  4181. struct wmi_svc_rdy_ev_arg arg = {};
  4182. u32 num_units, req_id, unit_size, num_mem_reqs, num_unit_info, i;
  4183. int ret;
  4184. bool allocated;
  4185. if (!skb) {
  4186. ath10k_warn(ar, "invalid service ready event skb\n");
  4187. return;
  4188. }
  4189. ret = ath10k_wmi_pull_svc_rdy(ar, skb, &arg);
  4190. if (ret) {
  4191. ath10k_warn(ar, "failed to parse service ready: %d\n", ret);
  4192. return;
  4193. }
  4194. memset(&ar->wmi.svc_map, 0, sizeof(ar->wmi.svc_map));
  4195. ath10k_wmi_map_svc(ar, arg.service_map, ar->wmi.svc_map,
  4196. arg.service_map_len);
  4197. ar->hw_min_tx_power = __le32_to_cpu(arg.min_tx_power);
  4198. ar->hw_max_tx_power = __le32_to_cpu(arg.max_tx_power);
  4199. ar->ht_cap_info = __le32_to_cpu(arg.ht_cap);
  4200. ar->vht_cap_info = __le32_to_cpu(arg.vht_cap);
  4201. ar->fw_version_major =
  4202. (__le32_to_cpu(arg.sw_ver0) & 0xff000000) >> 24;
  4203. ar->fw_version_minor = (__le32_to_cpu(arg.sw_ver0) & 0x00ffffff);
  4204. ar->fw_version_release =
  4205. (__le32_to_cpu(arg.sw_ver1) & 0xffff0000) >> 16;
  4206. ar->fw_version_build = (__le32_to_cpu(arg.sw_ver1) & 0x0000ffff);
  4207. ar->phy_capability = __le32_to_cpu(arg.phy_capab);
  4208. ar->num_rf_chains = __le32_to_cpu(arg.num_rf_chains);
  4209. ar->hw_eeprom_rd = __le32_to_cpu(arg.eeprom_rd);
  4210. ar->low_5ghz_chan = __le32_to_cpu(arg.low_5ghz_chan);
  4211. ar->high_5ghz_chan = __le32_to_cpu(arg.high_5ghz_chan);
  4212. ath10k_dbg_dump(ar, ATH10K_DBG_WMI, NULL, "wmi svc: ",
  4213. arg.service_map, arg.service_map_len);
  4214. if (ar->num_rf_chains > ar->max_spatial_stream) {
  4215. ath10k_warn(ar, "hardware advertises support for more spatial streams than it should (%d > %d)\n",
  4216. ar->num_rf_chains, ar->max_spatial_stream);
  4217. ar->num_rf_chains = ar->max_spatial_stream;
  4218. }
  4219. if (!ar->cfg_tx_chainmask) {
  4220. ar->cfg_tx_chainmask = (1 << ar->num_rf_chains) - 1;
  4221. ar->cfg_rx_chainmask = (1 << ar->num_rf_chains) - 1;
  4222. }
  4223. if (strlen(ar->hw->wiphy->fw_version) == 0) {
  4224. snprintf(ar->hw->wiphy->fw_version,
  4225. sizeof(ar->hw->wiphy->fw_version),
  4226. "%u.%u.%u.%u",
  4227. ar->fw_version_major,
  4228. ar->fw_version_minor,
  4229. ar->fw_version_release,
  4230. ar->fw_version_build);
  4231. }
  4232. num_mem_reqs = __le32_to_cpu(arg.num_mem_reqs);
  4233. if (num_mem_reqs > WMI_MAX_MEM_REQS) {
  4234. ath10k_warn(ar, "requested memory chunks number (%d) exceeds the limit\n",
  4235. num_mem_reqs);
  4236. return;
  4237. }
  4238. if (test_bit(WMI_SERVICE_PEER_CACHING, ar->wmi.svc_map)) {
  4239. if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL,
  4240. ar->running_fw->fw_file.fw_features))
  4241. ar->num_active_peers = TARGET_10_4_QCACHE_ACTIVE_PEERS_PFC +
  4242. ar->max_num_vdevs;
  4243. else
  4244. ar->num_active_peers = TARGET_10_4_QCACHE_ACTIVE_PEERS +
  4245. ar->max_num_vdevs;
  4246. ar->max_num_peers = TARGET_10_4_NUM_QCACHE_PEERS_MAX +
  4247. ar->max_num_vdevs;
  4248. ar->num_tids = ar->num_active_peers * 2;
  4249. ar->max_num_stations = TARGET_10_4_NUM_QCACHE_PEERS_MAX;
  4250. }
  4251. /* TODO: Adjust max peer count for cases like WMI_SERVICE_RATECTRL_CACHE
  4252. * and WMI_SERVICE_IRAM_TIDS, etc.
  4253. */
  4254. allocated = ath10k_wmi_is_host_mem_allocated(ar, arg.mem_reqs,
  4255. num_mem_reqs);
  4256. if (allocated)
  4257. goto skip_mem_alloc;
  4258. /* Either this event is received during boot time or there is a change
  4259. * in memory requirement from firmware when compared to last request.
  4260. * Free any old memory and do a fresh allocation based on the current
  4261. * memory requirement.
  4262. */
  4263. ath10k_wmi_free_host_mem(ar);
  4264. for (i = 0; i < num_mem_reqs; ++i) {
  4265. req_id = __le32_to_cpu(arg.mem_reqs[i]->req_id);
  4266. num_units = __le32_to_cpu(arg.mem_reqs[i]->num_units);
  4267. unit_size = __le32_to_cpu(arg.mem_reqs[i]->unit_size);
  4268. num_unit_info = __le32_to_cpu(arg.mem_reqs[i]->num_unit_info);
  4269. if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) {
  4270. if (ar->num_active_peers)
  4271. num_units = ar->num_active_peers + 1;
  4272. else
  4273. num_units = ar->max_num_peers + 1;
  4274. } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) {
  4275. /* number of units to allocate is number of
  4276. * peers, 1 extra for self peer on target
  4277. * this needs to be tied, host and target
  4278. * can get out of sync
  4279. */
  4280. num_units = ar->max_num_peers + 1;
  4281. } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) {
  4282. num_units = ar->max_num_vdevs + 1;
  4283. }
  4284. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4285. "wmi mem_req_id %d num_units %d num_unit_info %d unit size %d actual units %d\n",
  4286. req_id,
  4287. __le32_to_cpu(arg.mem_reqs[i]->num_units),
  4288. num_unit_info,
  4289. unit_size,
  4290. num_units);
  4291. ret = ath10k_wmi_alloc_host_mem(ar, req_id, num_units,
  4292. unit_size);
  4293. if (ret)
  4294. return;
  4295. }
  4296. skip_mem_alloc:
  4297. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4298. "wmi event service ready min_tx_power 0x%08x max_tx_power 0x%08x ht_cap 0x%08x vht_cap 0x%08x sw_ver0 0x%08x sw_ver1 0x%08x fw_build 0x%08x phy_capab 0x%08x num_rf_chains 0x%08x eeprom_rd 0x%08x num_mem_reqs 0x%08x\n",
  4299. __le32_to_cpu(arg.min_tx_power),
  4300. __le32_to_cpu(arg.max_tx_power),
  4301. __le32_to_cpu(arg.ht_cap),
  4302. __le32_to_cpu(arg.vht_cap),
  4303. __le32_to_cpu(arg.sw_ver0),
  4304. __le32_to_cpu(arg.sw_ver1),
  4305. __le32_to_cpu(arg.fw_build),
  4306. __le32_to_cpu(arg.phy_capab),
  4307. __le32_to_cpu(arg.num_rf_chains),
  4308. __le32_to_cpu(arg.eeprom_rd),
  4309. __le32_to_cpu(arg.num_mem_reqs));
  4310. dev_kfree_skb(skb);
  4311. ar->svc_rdy_skb = NULL;
  4312. complete(&ar->wmi.service_ready);
  4313. }
  4314. void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb)
  4315. {
  4316. ar->svc_rdy_skb = skb;
  4317. queue_work(ar->workqueue_aux, &ar->svc_rdy_work);
  4318. }
  4319. static int ath10k_wmi_op_pull_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
  4320. struct wmi_rdy_ev_arg *arg)
  4321. {
  4322. struct wmi_ready_event *ev = (void *)skb->data;
  4323. if (skb->len < sizeof(*ev))
  4324. return -EPROTO;
  4325. skb_pull(skb, sizeof(*ev));
  4326. arg->sw_version = ev->sw_version;
  4327. arg->abi_version = ev->abi_version;
  4328. arg->status = ev->status;
  4329. arg->mac_addr = ev->mac_addr.addr;
  4330. return 0;
  4331. }
  4332. static int ath10k_wmi_op_pull_roam_ev(struct ath10k *ar, struct sk_buff *skb,
  4333. struct wmi_roam_ev_arg *arg)
  4334. {
  4335. struct wmi_roam_ev *ev = (void *)skb->data;
  4336. if (skb->len < sizeof(*ev))
  4337. return -EPROTO;
  4338. skb_pull(skb, sizeof(*ev));
  4339. arg->vdev_id = ev->vdev_id;
  4340. arg->reason = ev->reason;
  4341. return 0;
  4342. }
  4343. static int ath10k_wmi_op_pull_echo_ev(struct ath10k *ar,
  4344. struct sk_buff *skb,
  4345. struct wmi_echo_ev_arg *arg)
  4346. {
  4347. struct wmi_echo_event *ev = (void *)skb->data;
  4348. arg->value = ev->value;
  4349. return 0;
  4350. }
  4351. int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb)
  4352. {
  4353. struct wmi_rdy_ev_arg arg = {};
  4354. int ret;
  4355. ret = ath10k_wmi_pull_rdy(ar, skb, &arg);
  4356. if (ret) {
  4357. ath10k_warn(ar, "failed to parse ready event: %d\n", ret);
  4358. return ret;
  4359. }
  4360. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4361. "wmi event ready sw_version %u abi_version %u mac_addr %pM status %d\n",
  4362. __le32_to_cpu(arg.sw_version),
  4363. __le32_to_cpu(arg.abi_version),
  4364. arg.mac_addr,
  4365. __le32_to_cpu(arg.status));
  4366. ether_addr_copy(ar->mac_addr, arg.mac_addr);
  4367. complete(&ar->wmi.unified_ready);
  4368. return 0;
  4369. }
  4370. static int ath10k_wmi_event_temperature(struct ath10k *ar, struct sk_buff *skb)
  4371. {
  4372. const struct wmi_pdev_temperature_event *ev;
  4373. ev = (struct wmi_pdev_temperature_event *)skb->data;
  4374. if (WARN_ON(skb->len < sizeof(*ev)))
  4375. return -EPROTO;
  4376. ath10k_thermal_event_temperature(ar, __le32_to_cpu(ev->temperature));
  4377. return 0;
  4378. }
  4379. static int ath10k_wmi_event_pdev_bss_chan_info(struct ath10k *ar,
  4380. struct sk_buff *skb)
  4381. {
  4382. struct wmi_pdev_bss_chan_info_event *ev;
  4383. struct survey_info *survey;
  4384. u64 busy, total, tx, rx, rx_bss;
  4385. u32 freq, noise_floor;
  4386. u32 cc_freq_hz = ar->hw_params.channel_counters_freq_hz;
  4387. int idx;
  4388. ev = (struct wmi_pdev_bss_chan_info_event *)skb->data;
  4389. if (WARN_ON(skb->len < sizeof(*ev)))
  4390. return -EPROTO;
  4391. freq = __le32_to_cpu(ev->freq);
  4392. noise_floor = __le32_to_cpu(ev->noise_floor);
  4393. busy = __le64_to_cpu(ev->cycle_busy);
  4394. total = __le64_to_cpu(ev->cycle_total);
  4395. tx = __le64_to_cpu(ev->cycle_tx);
  4396. rx = __le64_to_cpu(ev->cycle_rx);
  4397. rx_bss = __le64_to_cpu(ev->cycle_rx_bss);
  4398. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4399. "wmi event pdev bss chan info:\n freq: %d noise: %d cycle: busy %llu total %llu tx %llu rx %llu rx_bss %llu\n",
  4400. freq, noise_floor, busy, total, tx, rx, rx_bss);
  4401. spin_lock_bh(&ar->data_lock);
  4402. idx = freq_to_idx(ar, freq);
  4403. if (idx >= ARRAY_SIZE(ar->survey)) {
  4404. ath10k_warn(ar, "bss chan info: invalid frequency %d (idx %d out of bounds)\n",
  4405. freq, idx);
  4406. goto exit;
  4407. }
  4408. survey = &ar->survey[idx];
  4409. survey->noise = noise_floor;
  4410. survey->time = div_u64(total, cc_freq_hz);
  4411. survey->time_busy = div_u64(busy, cc_freq_hz);
  4412. survey->time_rx = div_u64(rx_bss, cc_freq_hz);
  4413. survey->time_tx = div_u64(tx, cc_freq_hz);
  4414. survey->filled |= (SURVEY_INFO_NOISE_DBM |
  4415. SURVEY_INFO_TIME |
  4416. SURVEY_INFO_TIME_BUSY |
  4417. SURVEY_INFO_TIME_RX |
  4418. SURVEY_INFO_TIME_TX);
  4419. exit:
  4420. spin_unlock_bh(&ar->data_lock);
  4421. complete(&ar->bss_survey_done);
  4422. return 0;
  4423. }
  4424. static inline void ath10k_wmi_queue_set_coverage_class_work(struct ath10k *ar)
  4425. {
  4426. if (ar->hw_params.hw_ops->set_coverage_class) {
  4427. spin_lock_bh(&ar->data_lock);
  4428. /* This call only ensures that the modified coverage class
  4429. * persists in case the firmware sets the registers back to
  4430. * their default value. So calling it is only necessary if the
  4431. * coverage class has a non-zero value.
  4432. */
  4433. if (ar->fw_coverage.coverage_class)
  4434. queue_work(ar->workqueue, &ar->set_coverage_class_work);
  4435. spin_unlock_bh(&ar->data_lock);
  4436. }
  4437. }
  4438. static void ath10k_wmi_op_rx(struct ath10k *ar, struct sk_buff *skb)
  4439. {
  4440. struct wmi_cmd_hdr *cmd_hdr;
  4441. enum wmi_event_id id;
  4442. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  4443. id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  4444. if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  4445. goto out;
  4446. trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
  4447. switch (id) {
  4448. case WMI_MGMT_RX_EVENTID:
  4449. ath10k_wmi_event_mgmt_rx(ar, skb);
  4450. /* mgmt_rx() owns the skb now! */
  4451. return;
  4452. case WMI_SCAN_EVENTID:
  4453. ath10k_wmi_event_scan(ar, skb);
  4454. ath10k_wmi_queue_set_coverage_class_work(ar);
  4455. break;
  4456. case WMI_CHAN_INFO_EVENTID:
  4457. ath10k_wmi_event_chan_info(ar, skb);
  4458. break;
  4459. case WMI_ECHO_EVENTID:
  4460. ath10k_wmi_event_echo(ar, skb);
  4461. break;
  4462. case WMI_DEBUG_MESG_EVENTID:
  4463. ath10k_wmi_event_debug_mesg(ar, skb);
  4464. ath10k_wmi_queue_set_coverage_class_work(ar);
  4465. break;
  4466. case WMI_UPDATE_STATS_EVENTID:
  4467. ath10k_wmi_event_update_stats(ar, skb);
  4468. break;
  4469. case WMI_VDEV_START_RESP_EVENTID:
  4470. ath10k_wmi_event_vdev_start_resp(ar, skb);
  4471. ath10k_wmi_queue_set_coverage_class_work(ar);
  4472. break;
  4473. case WMI_VDEV_STOPPED_EVENTID:
  4474. ath10k_wmi_event_vdev_stopped(ar, skb);
  4475. ath10k_wmi_queue_set_coverage_class_work(ar);
  4476. break;
  4477. case WMI_PEER_STA_KICKOUT_EVENTID:
  4478. ath10k_wmi_event_peer_sta_kickout(ar, skb);
  4479. break;
  4480. case WMI_HOST_SWBA_EVENTID:
  4481. ath10k_wmi_event_host_swba(ar, skb);
  4482. break;
  4483. case WMI_TBTTOFFSET_UPDATE_EVENTID:
  4484. ath10k_wmi_event_tbttoffset_update(ar, skb);
  4485. break;
  4486. case WMI_PHYERR_EVENTID:
  4487. ath10k_wmi_event_phyerr(ar, skb);
  4488. break;
  4489. case WMI_ROAM_EVENTID:
  4490. ath10k_wmi_event_roam(ar, skb);
  4491. ath10k_wmi_queue_set_coverage_class_work(ar);
  4492. break;
  4493. case WMI_PROFILE_MATCH:
  4494. ath10k_wmi_event_profile_match(ar, skb);
  4495. break;
  4496. case WMI_DEBUG_PRINT_EVENTID:
  4497. ath10k_wmi_event_debug_print(ar, skb);
  4498. ath10k_wmi_queue_set_coverage_class_work(ar);
  4499. break;
  4500. case WMI_PDEV_QVIT_EVENTID:
  4501. ath10k_wmi_event_pdev_qvit(ar, skb);
  4502. break;
  4503. case WMI_WLAN_PROFILE_DATA_EVENTID:
  4504. ath10k_wmi_event_wlan_profile_data(ar, skb);
  4505. break;
  4506. case WMI_RTT_MEASUREMENT_REPORT_EVENTID:
  4507. ath10k_wmi_event_rtt_measurement_report(ar, skb);
  4508. break;
  4509. case WMI_TSF_MEASUREMENT_REPORT_EVENTID:
  4510. ath10k_wmi_event_tsf_measurement_report(ar, skb);
  4511. break;
  4512. case WMI_RTT_ERROR_REPORT_EVENTID:
  4513. ath10k_wmi_event_rtt_error_report(ar, skb);
  4514. break;
  4515. case WMI_WOW_WAKEUP_HOST_EVENTID:
  4516. ath10k_wmi_event_wow_wakeup_host(ar, skb);
  4517. break;
  4518. case WMI_DCS_INTERFERENCE_EVENTID:
  4519. ath10k_wmi_event_dcs_interference(ar, skb);
  4520. break;
  4521. case WMI_PDEV_TPC_CONFIG_EVENTID:
  4522. ath10k_wmi_event_pdev_tpc_config(ar, skb);
  4523. break;
  4524. case WMI_PDEV_FTM_INTG_EVENTID:
  4525. ath10k_wmi_event_pdev_ftm_intg(ar, skb);
  4526. break;
  4527. case WMI_GTK_OFFLOAD_STATUS_EVENTID:
  4528. ath10k_wmi_event_gtk_offload_status(ar, skb);
  4529. break;
  4530. case WMI_GTK_REKEY_FAIL_EVENTID:
  4531. ath10k_wmi_event_gtk_rekey_fail(ar, skb);
  4532. break;
  4533. case WMI_TX_DELBA_COMPLETE_EVENTID:
  4534. ath10k_wmi_event_delba_complete(ar, skb);
  4535. break;
  4536. case WMI_TX_ADDBA_COMPLETE_EVENTID:
  4537. ath10k_wmi_event_addba_complete(ar, skb);
  4538. break;
  4539. case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID:
  4540. ath10k_wmi_event_vdev_install_key_complete(ar, skb);
  4541. break;
  4542. case WMI_SERVICE_READY_EVENTID:
  4543. ath10k_wmi_event_service_ready(ar, skb);
  4544. return;
  4545. case WMI_READY_EVENTID:
  4546. ath10k_wmi_event_ready(ar, skb);
  4547. ath10k_wmi_queue_set_coverage_class_work(ar);
  4548. break;
  4549. default:
  4550. ath10k_warn(ar, "Unknown eventid: %d\n", id);
  4551. break;
  4552. }
  4553. out:
  4554. dev_kfree_skb(skb);
  4555. }
  4556. static void ath10k_wmi_10_1_op_rx(struct ath10k *ar, struct sk_buff *skb)
  4557. {
  4558. struct wmi_cmd_hdr *cmd_hdr;
  4559. enum wmi_10x_event_id id;
  4560. bool consumed;
  4561. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  4562. id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  4563. if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  4564. goto out;
  4565. trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
  4566. consumed = ath10k_tm_event_wmi(ar, id, skb);
  4567. /* Ready event must be handled normally also in UTF mode so that we
  4568. * know the UTF firmware has booted, others we are just bypass WMI
  4569. * events to testmode.
  4570. */
  4571. if (consumed && id != WMI_10X_READY_EVENTID) {
  4572. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4573. "wmi testmode consumed 0x%x\n", id);
  4574. goto out;
  4575. }
  4576. switch (id) {
  4577. case WMI_10X_MGMT_RX_EVENTID:
  4578. ath10k_wmi_event_mgmt_rx(ar, skb);
  4579. /* mgmt_rx() owns the skb now! */
  4580. return;
  4581. case WMI_10X_SCAN_EVENTID:
  4582. ath10k_wmi_event_scan(ar, skb);
  4583. ath10k_wmi_queue_set_coverage_class_work(ar);
  4584. break;
  4585. case WMI_10X_CHAN_INFO_EVENTID:
  4586. ath10k_wmi_event_chan_info(ar, skb);
  4587. break;
  4588. case WMI_10X_ECHO_EVENTID:
  4589. ath10k_wmi_event_echo(ar, skb);
  4590. break;
  4591. case WMI_10X_DEBUG_MESG_EVENTID:
  4592. ath10k_wmi_event_debug_mesg(ar, skb);
  4593. ath10k_wmi_queue_set_coverage_class_work(ar);
  4594. break;
  4595. case WMI_10X_UPDATE_STATS_EVENTID:
  4596. ath10k_wmi_event_update_stats(ar, skb);
  4597. break;
  4598. case WMI_10X_VDEV_START_RESP_EVENTID:
  4599. ath10k_wmi_event_vdev_start_resp(ar, skb);
  4600. ath10k_wmi_queue_set_coverage_class_work(ar);
  4601. break;
  4602. case WMI_10X_VDEV_STOPPED_EVENTID:
  4603. ath10k_wmi_event_vdev_stopped(ar, skb);
  4604. ath10k_wmi_queue_set_coverage_class_work(ar);
  4605. break;
  4606. case WMI_10X_PEER_STA_KICKOUT_EVENTID:
  4607. ath10k_wmi_event_peer_sta_kickout(ar, skb);
  4608. break;
  4609. case WMI_10X_HOST_SWBA_EVENTID:
  4610. ath10k_wmi_event_host_swba(ar, skb);
  4611. break;
  4612. case WMI_10X_TBTTOFFSET_UPDATE_EVENTID:
  4613. ath10k_wmi_event_tbttoffset_update(ar, skb);
  4614. break;
  4615. case WMI_10X_PHYERR_EVENTID:
  4616. ath10k_wmi_event_phyerr(ar, skb);
  4617. break;
  4618. case WMI_10X_ROAM_EVENTID:
  4619. ath10k_wmi_event_roam(ar, skb);
  4620. ath10k_wmi_queue_set_coverage_class_work(ar);
  4621. break;
  4622. case WMI_10X_PROFILE_MATCH:
  4623. ath10k_wmi_event_profile_match(ar, skb);
  4624. break;
  4625. case WMI_10X_DEBUG_PRINT_EVENTID:
  4626. ath10k_wmi_event_debug_print(ar, skb);
  4627. ath10k_wmi_queue_set_coverage_class_work(ar);
  4628. break;
  4629. case WMI_10X_PDEV_QVIT_EVENTID:
  4630. ath10k_wmi_event_pdev_qvit(ar, skb);
  4631. break;
  4632. case WMI_10X_WLAN_PROFILE_DATA_EVENTID:
  4633. ath10k_wmi_event_wlan_profile_data(ar, skb);
  4634. break;
  4635. case WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID:
  4636. ath10k_wmi_event_rtt_measurement_report(ar, skb);
  4637. break;
  4638. case WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID:
  4639. ath10k_wmi_event_tsf_measurement_report(ar, skb);
  4640. break;
  4641. case WMI_10X_RTT_ERROR_REPORT_EVENTID:
  4642. ath10k_wmi_event_rtt_error_report(ar, skb);
  4643. break;
  4644. case WMI_10X_WOW_WAKEUP_HOST_EVENTID:
  4645. ath10k_wmi_event_wow_wakeup_host(ar, skb);
  4646. break;
  4647. case WMI_10X_DCS_INTERFERENCE_EVENTID:
  4648. ath10k_wmi_event_dcs_interference(ar, skb);
  4649. break;
  4650. case WMI_10X_PDEV_TPC_CONFIG_EVENTID:
  4651. ath10k_wmi_event_pdev_tpc_config(ar, skb);
  4652. break;
  4653. case WMI_10X_INST_RSSI_STATS_EVENTID:
  4654. ath10k_wmi_event_inst_rssi_stats(ar, skb);
  4655. break;
  4656. case WMI_10X_VDEV_STANDBY_REQ_EVENTID:
  4657. ath10k_wmi_event_vdev_standby_req(ar, skb);
  4658. break;
  4659. case WMI_10X_VDEV_RESUME_REQ_EVENTID:
  4660. ath10k_wmi_event_vdev_resume_req(ar, skb);
  4661. break;
  4662. case WMI_10X_SERVICE_READY_EVENTID:
  4663. ath10k_wmi_event_service_ready(ar, skb);
  4664. return;
  4665. case WMI_10X_READY_EVENTID:
  4666. ath10k_wmi_event_ready(ar, skb);
  4667. ath10k_wmi_queue_set_coverage_class_work(ar);
  4668. break;
  4669. case WMI_10X_PDEV_UTF_EVENTID:
  4670. /* ignore utf events */
  4671. break;
  4672. default:
  4673. ath10k_warn(ar, "Unknown eventid: %d\n", id);
  4674. break;
  4675. }
  4676. out:
  4677. dev_kfree_skb(skb);
  4678. }
  4679. static void ath10k_wmi_10_2_op_rx(struct ath10k *ar, struct sk_buff *skb)
  4680. {
  4681. struct wmi_cmd_hdr *cmd_hdr;
  4682. enum wmi_10_2_event_id id;
  4683. bool consumed;
  4684. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  4685. id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  4686. if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  4687. goto out;
  4688. trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
  4689. consumed = ath10k_tm_event_wmi(ar, id, skb);
  4690. /* Ready event must be handled normally also in UTF mode so that we
  4691. * know the UTF firmware has booted, others we are just bypass WMI
  4692. * events to testmode.
  4693. */
  4694. if (consumed && id != WMI_10_2_READY_EVENTID) {
  4695. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4696. "wmi testmode consumed 0x%x\n", id);
  4697. goto out;
  4698. }
  4699. switch (id) {
  4700. case WMI_10_2_MGMT_RX_EVENTID:
  4701. ath10k_wmi_event_mgmt_rx(ar, skb);
  4702. /* mgmt_rx() owns the skb now! */
  4703. return;
  4704. case WMI_10_2_SCAN_EVENTID:
  4705. ath10k_wmi_event_scan(ar, skb);
  4706. ath10k_wmi_queue_set_coverage_class_work(ar);
  4707. break;
  4708. case WMI_10_2_CHAN_INFO_EVENTID:
  4709. ath10k_wmi_event_chan_info(ar, skb);
  4710. break;
  4711. case WMI_10_2_ECHO_EVENTID:
  4712. ath10k_wmi_event_echo(ar, skb);
  4713. break;
  4714. case WMI_10_2_DEBUG_MESG_EVENTID:
  4715. ath10k_wmi_event_debug_mesg(ar, skb);
  4716. ath10k_wmi_queue_set_coverage_class_work(ar);
  4717. break;
  4718. case WMI_10_2_UPDATE_STATS_EVENTID:
  4719. ath10k_wmi_event_update_stats(ar, skb);
  4720. break;
  4721. case WMI_10_2_VDEV_START_RESP_EVENTID:
  4722. ath10k_wmi_event_vdev_start_resp(ar, skb);
  4723. ath10k_wmi_queue_set_coverage_class_work(ar);
  4724. break;
  4725. case WMI_10_2_VDEV_STOPPED_EVENTID:
  4726. ath10k_wmi_event_vdev_stopped(ar, skb);
  4727. ath10k_wmi_queue_set_coverage_class_work(ar);
  4728. break;
  4729. case WMI_10_2_PEER_STA_KICKOUT_EVENTID:
  4730. ath10k_wmi_event_peer_sta_kickout(ar, skb);
  4731. break;
  4732. case WMI_10_2_HOST_SWBA_EVENTID:
  4733. ath10k_wmi_event_host_swba(ar, skb);
  4734. break;
  4735. case WMI_10_2_TBTTOFFSET_UPDATE_EVENTID:
  4736. ath10k_wmi_event_tbttoffset_update(ar, skb);
  4737. break;
  4738. case WMI_10_2_PHYERR_EVENTID:
  4739. ath10k_wmi_event_phyerr(ar, skb);
  4740. break;
  4741. case WMI_10_2_ROAM_EVENTID:
  4742. ath10k_wmi_event_roam(ar, skb);
  4743. ath10k_wmi_queue_set_coverage_class_work(ar);
  4744. break;
  4745. case WMI_10_2_PROFILE_MATCH:
  4746. ath10k_wmi_event_profile_match(ar, skb);
  4747. break;
  4748. case WMI_10_2_DEBUG_PRINT_EVENTID:
  4749. ath10k_wmi_event_debug_print(ar, skb);
  4750. ath10k_wmi_queue_set_coverage_class_work(ar);
  4751. break;
  4752. case WMI_10_2_PDEV_QVIT_EVENTID:
  4753. ath10k_wmi_event_pdev_qvit(ar, skb);
  4754. break;
  4755. case WMI_10_2_WLAN_PROFILE_DATA_EVENTID:
  4756. ath10k_wmi_event_wlan_profile_data(ar, skb);
  4757. break;
  4758. case WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID:
  4759. ath10k_wmi_event_rtt_measurement_report(ar, skb);
  4760. break;
  4761. case WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID:
  4762. ath10k_wmi_event_tsf_measurement_report(ar, skb);
  4763. break;
  4764. case WMI_10_2_RTT_ERROR_REPORT_EVENTID:
  4765. ath10k_wmi_event_rtt_error_report(ar, skb);
  4766. break;
  4767. case WMI_10_2_WOW_WAKEUP_HOST_EVENTID:
  4768. ath10k_wmi_event_wow_wakeup_host(ar, skb);
  4769. break;
  4770. case WMI_10_2_DCS_INTERFERENCE_EVENTID:
  4771. ath10k_wmi_event_dcs_interference(ar, skb);
  4772. break;
  4773. case WMI_10_2_PDEV_TPC_CONFIG_EVENTID:
  4774. ath10k_wmi_event_pdev_tpc_config(ar, skb);
  4775. break;
  4776. case WMI_10_2_INST_RSSI_STATS_EVENTID:
  4777. ath10k_wmi_event_inst_rssi_stats(ar, skb);
  4778. break;
  4779. case WMI_10_2_VDEV_STANDBY_REQ_EVENTID:
  4780. ath10k_wmi_event_vdev_standby_req(ar, skb);
  4781. ath10k_wmi_queue_set_coverage_class_work(ar);
  4782. break;
  4783. case WMI_10_2_VDEV_RESUME_REQ_EVENTID:
  4784. ath10k_wmi_event_vdev_resume_req(ar, skb);
  4785. ath10k_wmi_queue_set_coverage_class_work(ar);
  4786. break;
  4787. case WMI_10_2_SERVICE_READY_EVENTID:
  4788. ath10k_wmi_event_service_ready(ar, skb);
  4789. return;
  4790. case WMI_10_2_READY_EVENTID:
  4791. ath10k_wmi_event_ready(ar, skb);
  4792. ath10k_wmi_queue_set_coverage_class_work(ar);
  4793. break;
  4794. case WMI_10_2_PDEV_TEMPERATURE_EVENTID:
  4795. ath10k_wmi_event_temperature(ar, skb);
  4796. break;
  4797. case WMI_10_2_PDEV_BSS_CHAN_INFO_EVENTID:
  4798. ath10k_wmi_event_pdev_bss_chan_info(ar, skb);
  4799. break;
  4800. case WMI_10_2_RTT_KEEPALIVE_EVENTID:
  4801. case WMI_10_2_GPIO_INPUT_EVENTID:
  4802. case WMI_10_2_PEER_RATECODE_LIST_EVENTID:
  4803. case WMI_10_2_GENERIC_BUFFER_EVENTID:
  4804. case WMI_10_2_MCAST_BUF_RELEASE_EVENTID:
  4805. case WMI_10_2_MCAST_LIST_AGEOUT_EVENTID:
  4806. case WMI_10_2_WDS_PEER_EVENTID:
  4807. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4808. "received event id %d not implemented\n", id);
  4809. break;
  4810. default:
  4811. ath10k_warn(ar, "Unknown eventid: %d\n", id);
  4812. break;
  4813. }
  4814. out:
  4815. dev_kfree_skb(skb);
  4816. }
  4817. static void ath10k_wmi_10_4_op_rx(struct ath10k *ar, struct sk_buff *skb)
  4818. {
  4819. struct wmi_cmd_hdr *cmd_hdr;
  4820. enum wmi_10_4_event_id id;
  4821. bool consumed;
  4822. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  4823. id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  4824. if (!skb_pull(skb, sizeof(struct wmi_cmd_hdr)))
  4825. goto out;
  4826. trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
  4827. consumed = ath10k_tm_event_wmi(ar, id, skb);
  4828. /* Ready event must be handled normally also in UTF mode so that we
  4829. * know the UTF firmware has booted, others we are just bypass WMI
  4830. * events to testmode.
  4831. */
  4832. if (consumed && id != WMI_10_4_READY_EVENTID) {
  4833. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4834. "wmi testmode consumed 0x%x\n", id);
  4835. goto out;
  4836. }
  4837. switch (id) {
  4838. case WMI_10_4_MGMT_RX_EVENTID:
  4839. ath10k_wmi_event_mgmt_rx(ar, skb);
  4840. /* mgmt_rx() owns the skb now! */
  4841. return;
  4842. case WMI_10_4_ECHO_EVENTID:
  4843. ath10k_wmi_event_echo(ar, skb);
  4844. break;
  4845. case WMI_10_4_DEBUG_MESG_EVENTID:
  4846. ath10k_wmi_event_debug_mesg(ar, skb);
  4847. ath10k_wmi_queue_set_coverage_class_work(ar);
  4848. break;
  4849. case WMI_10_4_SERVICE_READY_EVENTID:
  4850. ath10k_wmi_event_service_ready(ar, skb);
  4851. return;
  4852. case WMI_10_4_SCAN_EVENTID:
  4853. ath10k_wmi_event_scan(ar, skb);
  4854. ath10k_wmi_queue_set_coverage_class_work(ar);
  4855. break;
  4856. case WMI_10_4_CHAN_INFO_EVENTID:
  4857. ath10k_wmi_event_chan_info(ar, skb);
  4858. break;
  4859. case WMI_10_4_PHYERR_EVENTID:
  4860. ath10k_wmi_event_phyerr(ar, skb);
  4861. break;
  4862. case WMI_10_4_READY_EVENTID:
  4863. ath10k_wmi_event_ready(ar, skb);
  4864. ath10k_wmi_queue_set_coverage_class_work(ar);
  4865. break;
  4866. case WMI_10_4_PEER_STA_KICKOUT_EVENTID:
  4867. ath10k_wmi_event_peer_sta_kickout(ar, skb);
  4868. break;
  4869. case WMI_10_4_ROAM_EVENTID:
  4870. ath10k_wmi_event_roam(ar, skb);
  4871. ath10k_wmi_queue_set_coverage_class_work(ar);
  4872. break;
  4873. case WMI_10_4_HOST_SWBA_EVENTID:
  4874. ath10k_wmi_event_host_swba(ar, skb);
  4875. break;
  4876. case WMI_10_4_TBTTOFFSET_UPDATE_EVENTID:
  4877. ath10k_wmi_event_tbttoffset_update(ar, skb);
  4878. break;
  4879. case WMI_10_4_DEBUG_PRINT_EVENTID:
  4880. ath10k_wmi_event_debug_print(ar, skb);
  4881. ath10k_wmi_queue_set_coverage_class_work(ar);
  4882. break;
  4883. case WMI_10_4_VDEV_START_RESP_EVENTID:
  4884. ath10k_wmi_event_vdev_start_resp(ar, skb);
  4885. ath10k_wmi_queue_set_coverage_class_work(ar);
  4886. break;
  4887. case WMI_10_4_VDEV_STOPPED_EVENTID:
  4888. ath10k_wmi_event_vdev_stopped(ar, skb);
  4889. ath10k_wmi_queue_set_coverage_class_work(ar);
  4890. break;
  4891. case WMI_10_4_WOW_WAKEUP_HOST_EVENTID:
  4892. case WMI_10_4_PEER_RATECODE_LIST_EVENTID:
  4893. case WMI_10_4_WDS_PEER_EVENTID:
  4894. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4895. "received event id %d not implemented\n", id);
  4896. break;
  4897. case WMI_10_4_UPDATE_STATS_EVENTID:
  4898. ath10k_wmi_event_update_stats(ar, skb);
  4899. break;
  4900. case WMI_10_4_PDEV_TEMPERATURE_EVENTID:
  4901. ath10k_wmi_event_temperature(ar, skb);
  4902. break;
  4903. case WMI_10_4_PDEV_BSS_CHAN_INFO_EVENTID:
  4904. ath10k_wmi_event_pdev_bss_chan_info(ar, skb);
  4905. break;
  4906. case WMI_10_4_PDEV_TPC_CONFIG_EVENTID:
  4907. ath10k_wmi_event_pdev_tpc_config(ar, skb);
  4908. break;
  4909. case WMI_10_4_TDLS_PEER_EVENTID:
  4910. ath10k_wmi_handle_tdls_peer_event(ar, skb);
  4911. break;
  4912. default:
  4913. ath10k_warn(ar, "Unknown eventid: %d\n", id);
  4914. break;
  4915. }
  4916. out:
  4917. dev_kfree_skb(skb);
  4918. }
  4919. static void ath10k_wmi_process_rx(struct ath10k *ar, struct sk_buff *skb)
  4920. {
  4921. int ret;
  4922. ret = ath10k_wmi_rx(ar, skb);
  4923. if (ret)
  4924. ath10k_warn(ar, "failed to process wmi rx: %d\n", ret);
  4925. }
  4926. int ath10k_wmi_connect(struct ath10k *ar)
  4927. {
  4928. int status;
  4929. struct ath10k_htc_svc_conn_req conn_req;
  4930. struct ath10k_htc_svc_conn_resp conn_resp;
  4931. memset(&conn_req, 0, sizeof(conn_req));
  4932. memset(&conn_resp, 0, sizeof(conn_resp));
  4933. /* these fields are the same for all service endpoints */
  4934. conn_req.ep_ops.ep_tx_complete = ath10k_wmi_htc_tx_complete;
  4935. conn_req.ep_ops.ep_rx_complete = ath10k_wmi_process_rx;
  4936. conn_req.ep_ops.ep_tx_credits = ath10k_wmi_op_ep_tx_credits;
  4937. /* connect to control service */
  4938. conn_req.service_id = ATH10K_HTC_SVC_ID_WMI_CONTROL;
  4939. status = ath10k_htc_connect_service(&ar->htc, &conn_req, &conn_resp);
  4940. if (status) {
  4941. ath10k_warn(ar, "failed to connect to WMI CONTROL service status: %d\n",
  4942. status);
  4943. return status;
  4944. }
  4945. ar->wmi.eid = conn_resp.eid;
  4946. return 0;
  4947. }
  4948. static struct sk_buff *
  4949. ath10k_wmi_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16 rd5g,
  4950. u16 ctl2g, u16 ctl5g,
  4951. enum wmi_dfs_region dfs_reg)
  4952. {
  4953. struct wmi_pdev_set_regdomain_cmd *cmd;
  4954. struct sk_buff *skb;
  4955. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  4956. if (!skb)
  4957. return ERR_PTR(-ENOMEM);
  4958. cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data;
  4959. cmd->reg_domain = __cpu_to_le32(rd);
  4960. cmd->reg_domain_2G = __cpu_to_le32(rd2g);
  4961. cmd->reg_domain_5G = __cpu_to_le32(rd5g);
  4962. cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
  4963. cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
  4964. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4965. "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x\n",
  4966. rd, rd2g, rd5g, ctl2g, ctl5g);
  4967. return skb;
  4968. }
  4969. static struct sk_buff *
  4970. ath10k_wmi_10x_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16
  4971. rd5g, u16 ctl2g, u16 ctl5g,
  4972. enum wmi_dfs_region dfs_reg)
  4973. {
  4974. struct wmi_pdev_set_regdomain_cmd_10x *cmd;
  4975. struct sk_buff *skb;
  4976. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  4977. if (!skb)
  4978. return ERR_PTR(-ENOMEM);
  4979. cmd = (struct wmi_pdev_set_regdomain_cmd_10x *)skb->data;
  4980. cmd->reg_domain = __cpu_to_le32(rd);
  4981. cmd->reg_domain_2G = __cpu_to_le32(rd2g);
  4982. cmd->reg_domain_5G = __cpu_to_le32(rd5g);
  4983. cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
  4984. cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
  4985. cmd->dfs_domain = __cpu_to_le32(dfs_reg);
  4986. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4987. "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x dfs_region %x\n",
  4988. rd, rd2g, rd5g, ctl2g, ctl5g, dfs_reg);
  4989. return skb;
  4990. }
  4991. static struct sk_buff *
  4992. ath10k_wmi_op_gen_pdev_suspend(struct ath10k *ar, u32 suspend_opt)
  4993. {
  4994. struct wmi_pdev_suspend_cmd *cmd;
  4995. struct sk_buff *skb;
  4996. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  4997. if (!skb)
  4998. return ERR_PTR(-ENOMEM);
  4999. cmd = (struct wmi_pdev_suspend_cmd *)skb->data;
  5000. cmd->suspend_opt = __cpu_to_le32(suspend_opt);
  5001. return skb;
  5002. }
  5003. static struct sk_buff *
  5004. ath10k_wmi_op_gen_pdev_resume(struct ath10k *ar)
  5005. {
  5006. struct sk_buff *skb;
  5007. skb = ath10k_wmi_alloc_skb(ar, 0);
  5008. if (!skb)
  5009. return ERR_PTR(-ENOMEM);
  5010. return skb;
  5011. }
  5012. static struct sk_buff *
  5013. ath10k_wmi_op_gen_pdev_set_param(struct ath10k *ar, u32 id, u32 value)
  5014. {
  5015. struct wmi_pdev_set_param_cmd *cmd;
  5016. struct sk_buff *skb;
  5017. if (id == WMI_PDEV_PARAM_UNSUPPORTED) {
  5018. ath10k_warn(ar, "pdev param %d not supported by firmware\n",
  5019. id);
  5020. return ERR_PTR(-EOPNOTSUPP);
  5021. }
  5022. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5023. if (!skb)
  5024. return ERR_PTR(-ENOMEM);
  5025. cmd = (struct wmi_pdev_set_param_cmd *)skb->data;
  5026. cmd->param_id = __cpu_to_le32(id);
  5027. cmd->param_value = __cpu_to_le32(value);
  5028. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set param %d value %d\n",
  5029. id, value);
  5030. return skb;
  5031. }
  5032. void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar,
  5033. struct wmi_host_mem_chunks *chunks)
  5034. {
  5035. struct host_memory_chunk *chunk;
  5036. int i;
  5037. chunks->count = __cpu_to_le32(ar->wmi.num_mem_chunks);
  5038. for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
  5039. chunk = &chunks->items[i];
  5040. chunk->ptr = __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
  5041. chunk->size = __cpu_to_le32(ar->wmi.mem_chunks[i].len);
  5042. chunk->req_id = __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
  5043. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5044. "wmi chunk %d len %d requested, addr 0x%llx\n",
  5045. i,
  5046. ar->wmi.mem_chunks[i].len,
  5047. (unsigned long long)ar->wmi.mem_chunks[i].paddr);
  5048. }
  5049. }
  5050. static struct sk_buff *ath10k_wmi_op_gen_init(struct ath10k *ar)
  5051. {
  5052. struct wmi_init_cmd *cmd;
  5053. struct sk_buff *buf;
  5054. struct wmi_resource_config config = {};
  5055. u32 len, val;
  5056. config.num_vdevs = __cpu_to_le32(TARGET_NUM_VDEVS);
  5057. config.num_peers = __cpu_to_le32(TARGET_NUM_PEERS);
  5058. config.num_offload_peers = __cpu_to_le32(TARGET_NUM_OFFLOAD_PEERS);
  5059. config.num_offload_reorder_bufs =
  5060. __cpu_to_le32(TARGET_NUM_OFFLOAD_REORDER_BUFS);
  5061. config.num_peer_keys = __cpu_to_le32(TARGET_NUM_PEER_KEYS);
  5062. config.num_tids = __cpu_to_le32(TARGET_NUM_TIDS);
  5063. config.ast_skid_limit = __cpu_to_le32(TARGET_AST_SKID_LIMIT);
  5064. config.tx_chain_mask = __cpu_to_le32(TARGET_TX_CHAIN_MASK);
  5065. config.rx_chain_mask = __cpu_to_le32(TARGET_RX_CHAIN_MASK);
  5066. config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
  5067. config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
  5068. config.rx_timeout_pri_be = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
  5069. config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_RX_TIMEOUT_HI_PRI);
  5070. config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
  5071. config.scan_max_pending_reqs =
  5072. __cpu_to_le32(TARGET_SCAN_MAX_PENDING_REQS);
  5073. config.bmiss_offload_max_vdev =
  5074. __cpu_to_le32(TARGET_BMISS_OFFLOAD_MAX_VDEV);
  5075. config.roam_offload_max_vdev =
  5076. __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_VDEV);
  5077. config.roam_offload_max_ap_profiles =
  5078. __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES);
  5079. config.num_mcast_groups = __cpu_to_le32(TARGET_NUM_MCAST_GROUPS);
  5080. config.num_mcast_table_elems =
  5081. __cpu_to_le32(TARGET_NUM_MCAST_TABLE_ELEMS);
  5082. config.mcast2ucast_mode = __cpu_to_le32(TARGET_MCAST2UCAST_MODE);
  5083. config.tx_dbg_log_size = __cpu_to_le32(TARGET_TX_DBG_LOG_SIZE);
  5084. config.num_wds_entries = __cpu_to_le32(TARGET_NUM_WDS_ENTRIES);
  5085. config.dma_burst_size = __cpu_to_le32(TARGET_DMA_BURST_SIZE);
  5086. config.mac_aggr_delim = __cpu_to_le32(TARGET_MAC_AGGR_DELIM);
  5087. val = TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
  5088. config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
  5089. config.vow_config = __cpu_to_le32(TARGET_VOW_CONFIG);
  5090. config.gtk_offload_max_vdev =
  5091. __cpu_to_le32(TARGET_GTK_OFFLOAD_MAX_VDEV);
  5092. config.num_msdu_desc = __cpu_to_le32(TARGET_NUM_MSDU_DESC);
  5093. config.max_frag_entries = __cpu_to_le32(TARGET_MAX_FRAG_ENTRIES);
  5094. len = sizeof(*cmd) +
  5095. (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
  5096. buf = ath10k_wmi_alloc_skb(ar, len);
  5097. if (!buf)
  5098. return ERR_PTR(-ENOMEM);
  5099. cmd = (struct wmi_init_cmd *)buf->data;
  5100. memcpy(&cmd->resource_config, &config, sizeof(config));
  5101. ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
  5102. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init\n");
  5103. return buf;
  5104. }
  5105. static struct sk_buff *ath10k_wmi_10_1_op_gen_init(struct ath10k *ar)
  5106. {
  5107. struct wmi_init_cmd_10x *cmd;
  5108. struct sk_buff *buf;
  5109. struct wmi_resource_config_10x config = {};
  5110. u32 len, val;
  5111. config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
  5112. config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
  5113. config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
  5114. config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
  5115. config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
  5116. config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
  5117. config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
  5118. config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5119. config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5120. config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5121. config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
  5122. config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
  5123. config.scan_max_pending_reqs =
  5124. __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
  5125. config.bmiss_offload_max_vdev =
  5126. __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
  5127. config.roam_offload_max_vdev =
  5128. __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
  5129. config.roam_offload_max_ap_profiles =
  5130. __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
  5131. config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
  5132. config.num_mcast_table_elems =
  5133. __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
  5134. config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
  5135. config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
  5136. config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
  5137. config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE);
  5138. config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
  5139. val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
  5140. config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
  5141. config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
  5142. config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
  5143. config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
  5144. len = sizeof(*cmd) +
  5145. (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
  5146. buf = ath10k_wmi_alloc_skb(ar, len);
  5147. if (!buf)
  5148. return ERR_PTR(-ENOMEM);
  5149. cmd = (struct wmi_init_cmd_10x *)buf->data;
  5150. memcpy(&cmd->resource_config, &config, sizeof(config));
  5151. ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
  5152. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10x\n");
  5153. return buf;
  5154. }
  5155. static struct sk_buff *ath10k_wmi_10_2_op_gen_init(struct ath10k *ar)
  5156. {
  5157. struct wmi_init_cmd_10_2 *cmd;
  5158. struct sk_buff *buf;
  5159. struct wmi_resource_config_10x config = {};
  5160. u32 len, val, features;
  5161. config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
  5162. config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
  5163. if (ath10k_peer_stats_enabled(ar)) {
  5164. config.num_peers = __cpu_to_le32(TARGET_10X_TX_STATS_NUM_PEERS);
  5165. config.num_tids = __cpu_to_le32(TARGET_10X_TX_STATS_NUM_TIDS);
  5166. } else {
  5167. config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
  5168. config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
  5169. }
  5170. config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
  5171. config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
  5172. config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
  5173. config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5174. config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5175. config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5176. config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
  5177. config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
  5178. config.scan_max_pending_reqs =
  5179. __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
  5180. config.bmiss_offload_max_vdev =
  5181. __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
  5182. config.roam_offload_max_vdev =
  5183. __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
  5184. config.roam_offload_max_ap_profiles =
  5185. __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
  5186. config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
  5187. config.num_mcast_table_elems =
  5188. __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
  5189. config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
  5190. config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
  5191. config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
  5192. config.dma_burst_size = __cpu_to_le32(TARGET_10_2_DMA_BURST_SIZE);
  5193. config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
  5194. val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
  5195. config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
  5196. config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
  5197. config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
  5198. config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
  5199. len = sizeof(*cmd) +
  5200. (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
  5201. buf = ath10k_wmi_alloc_skb(ar, len);
  5202. if (!buf)
  5203. return ERR_PTR(-ENOMEM);
  5204. cmd = (struct wmi_init_cmd_10_2 *)buf->data;
  5205. features = WMI_10_2_RX_BATCH_MODE;
  5206. if (test_bit(ATH10K_FLAG_BTCOEX, &ar->dev_flags) &&
  5207. test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map))
  5208. features |= WMI_10_2_COEX_GPIO;
  5209. if (ath10k_peer_stats_enabled(ar))
  5210. features |= WMI_10_2_PEER_STATS;
  5211. if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map))
  5212. features |= WMI_10_2_BSS_CHAN_INFO;
  5213. cmd->resource_config.feature_mask = __cpu_to_le32(features);
  5214. memcpy(&cmd->resource_config.common, &config, sizeof(config));
  5215. ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
  5216. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.2\n");
  5217. return buf;
  5218. }
  5219. static struct sk_buff *ath10k_wmi_10_4_op_gen_init(struct ath10k *ar)
  5220. {
  5221. struct wmi_init_cmd_10_4 *cmd;
  5222. struct sk_buff *buf;
  5223. struct wmi_resource_config_10_4 config = {};
  5224. u32 len;
  5225. config.num_vdevs = __cpu_to_le32(ar->max_num_vdevs);
  5226. config.num_peers = __cpu_to_le32(ar->max_num_peers);
  5227. config.num_active_peers = __cpu_to_le32(ar->num_active_peers);
  5228. config.num_tids = __cpu_to_le32(ar->num_tids);
  5229. config.num_offload_peers = __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_PEERS);
  5230. config.num_offload_reorder_buffs =
  5231. __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_REORDER_BUFFS);
  5232. config.num_peer_keys = __cpu_to_le32(TARGET_10_4_NUM_PEER_KEYS);
  5233. config.ast_skid_limit = __cpu_to_le32(TARGET_10_4_AST_SKID_LIMIT);
  5234. config.tx_chain_mask = __cpu_to_le32(ar->hw_params.tx_chain_mask);
  5235. config.rx_chain_mask = __cpu_to_le32(ar->hw_params.rx_chain_mask);
  5236. config.rx_timeout_pri[0] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
  5237. config.rx_timeout_pri[1] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
  5238. config.rx_timeout_pri[2] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
  5239. config.rx_timeout_pri[3] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_HI_PRI);
  5240. config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
  5241. config.scan_max_pending_req = __cpu_to_le32(TARGET_10_4_SCAN_MAX_REQS);
  5242. config.bmiss_offload_max_vdev =
  5243. __cpu_to_le32(TARGET_10_4_BMISS_OFFLOAD_MAX_VDEV);
  5244. config.roam_offload_max_vdev =
  5245. __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_VDEV);
  5246. config.roam_offload_max_ap_profiles =
  5247. __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_PROFILES);
  5248. config.num_mcast_groups = __cpu_to_le32(TARGET_10_4_NUM_MCAST_GROUPS);
  5249. config.num_mcast_table_elems =
  5250. __cpu_to_le32(TARGET_10_4_NUM_MCAST_TABLE_ELEMS);
  5251. config.mcast2ucast_mode = __cpu_to_le32(TARGET_10_4_MCAST2UCAST_MODE);
  5252. config.tx_dbg_log_size = __cpu_to_le32(TARGET_10_4_TX_DBG_LOG_SIZE);
  5253. config.num_wds_entries = __cpu_to_le32(TARGET_10_4_NUM_WDS_ENTRIES);
  5254. config.dma_burst_size = __cpu_to_le32(TARGET_10_4_DMA_BURST_SIZE);
  5255. config.mac_aggr_delim = __cpu_to_le32(TARGET_10_4_MAC_AGGR_DELIM);
  5256. config.rx_skip_defrag_timeout_dup_detection_check =
  5257. __cpu_to_le32(TARGET_10_4_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK);
  5258. config.vow_config = __cpu_to_le32(TARGET_10_4_VOW_CONFIG);
  5259. config.gtk_offload_max_vdev =
  5260. __cpu_to_le32(TARGET_10_4_GTK_OFFLOAD_MAX_VDEV);
  5261. config.num_msdu_desc = __cpu_to_le32(ar->htt.max_num_pending_tx);
  5262. config.max_frag_entries = __cpu_to_le32(TARGET_10_4_11AC_TX_MAX_FRAGS);
  5263. config.max_peer_ext_stats =
  5264. __cpu_to_le32(TARGET_10_4_MAX_PEER_EXT_STATS);
  5265. config.smart_ant_cap = __cpu_to_le32(TARGET_10_4_SMART_ANT_CAP);
  5266. config.bk_minfree = __cpu_to_le32(TARGET_10_4_BK_MIN_FREE);
  5267. config.be_minfree = __cpu_to_le32(TARGET_10_4_BE_MIN_FREE);
  5268. config.vi_minfree = __cpu_to_le32(TARGET_10_4_VI_MIN_FREE);
  5269. config.vo_minfree = __cpu_to_le32(TARGET_10_4_VO_MIN_FREE);
  5270. config.rx_batchmode = __cpu_to_le32(TARGET_10_4_RX_BATCH_MODE);
  5271. config.tt_support =
  5272. __cpu_to_le32(TARGET_10_4_THERMAL_THROTTLING_CONFIG);
  5273. config.atf_config = __cpu_to_le32(TARGET_10_4_ATF_CONFIG);
  5274. config.iphdr_pad_config = __cpu_to_le32(TARGET_10_4_IPHDR_PAD_CONFIG);
  5275. config.qwrap_config = __cpu_to_le32(TARGET_10_4_QWRAP_CONFIG);
  5276. len = sizeof(*cmd) +
  5277. (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
  5278. buf = ath10k_wmi_alloc_skb(ar, len);
  5279. if (!buf)
  5280. return ERR_PTR(-ENOMEM);
  5281. cmd = (struct wmi_init_cmd_10_4 *)buf->data;
  5282. memcpy(&cmd->resource_config, &config, sizeof(config));
  5283. ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
  5284. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.4\n");
  5285. return buf;
  5286. }
  5287. int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg)
  5288. {
  5289. if (arg->ie_len > WLAN_SCAN_PARAMS_MAX_IE_LEN)
  5290. return -EINVAL;
  5291. if (arg->n_channels > ARRAY_SIZE(arg->channels))
  5292. return -EINVAL;
  5293. if (arg->n_ssids > WLAN_SCAN_PARAMS_MAX_SSID)
  5294. return -EINVAL;
  5295. if (arg->n_bssids > WLAN_SCAN_PARAMS_MAX_BSSID)
  5296. return -EINVAL;
  5297. return 0;
  5298. }
  5299. static size_t
  5300. ath10k_wmi_start_scan_tlvs_len(const struct wmi_start_scan_arg *arg)
  5301. {
  5302. int len = 0;
  5303. if (arg->ie_len) {
  5304. len += sizeof(struct wmi_ie_data);
  5305. len += roundup(arg->ie_len, 4);
  5306. }
  5307. if (arg->n_channels) {
  5308. len += sizeof(struct wmi_chan_list);
  5309. len += sizeof(__le32) * arg->n_channels;
  5310. }
  5311. if (arg->n_ssids) {
  5312. len += sizeof(struct wmi_ssid_list);
  5313. len += sizeof(struct wmi_ssid) * arg->n_ssids;
  5314. }
  5315. if (arg->n_bssids) {
  5316. len += sizeof(struct wmi_bssid_list);
  5317. len += sizeof(struct wmi_mac_addr) * arg->n_bssids;
  5318. }
  5319. return len;
  5320. }
  5321. void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn,
  5322. const struct wmi_start_scan_arg *arg)
  5323. {
  5324. u32 scan_id;
  5325. u32 scan_req_id;
  5326. scan_id = WMI_HOST_SCAN_REQ_ID_PREFIX;
  5327. scan_id |= arg->scan_id;
  5328. scan_req_id = WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
  5329. scan_req_id |= arg->scan_req_id;
  5330. cmn->scan_id = __cpu_to_le32(scan_id);
  5331. cmn->scan_req_id = __cpu_to_le32(scan_req_id);
  5332. cmn->vdev_id = __cpu_to_le32(arg->vdev_id);
  5333. cmn->scan_priority = __cpu_to_le32(arg->scan_priority);
  5334. cmn->notify_scan_events = __cpu_to_le32(arg->notify_scan_events);
  5335. cmn->dwell_time_active = __cpu_to_le32(arg->dwell_time_active);
  5336. cmn->dwell_time_passive = __cpu_to_le32(arg->dwell_time_passive);
  5337. cmn->min_rest_time = __cpu_to_le32(arg->min_rest_time);
  5338. cmn->max_rest_time = __cpu_to_le32(arg->max_rest_time);
  5339. cmn->repeat_probe_time = __cpu_to_le32(arg->repeat_probe_time);
  5340. cmn->probe_spacing_time = __cpu_to_le32(arg->probe_spacing_time);
  5341. cmn->idle_time = __cpu_to_le32(arg->idle_time);
  5342. cmn->max_scan_time = __cpu_to_le32(arg->max_scan_time);
  5343. cmn->probe_delay = __cpu_to_le32(arg->probe_delay);
  5344. cmn->scan_ctrl_flags = __cpu_to_le32(arg->scan_ctrl_flags);
  5345. }
  5346. static void
  5347. ath10k_wmi_put_start_scan_tlvs(struct wmi_start_scan_tlvs *tlvs,
  5348. const struct wmi_start_scan_arg *arg)
  5349. {
  5350. struct wmi_ie_data *ie;
  5351. struct wmi_chan_list *channels;
  5352. struct wmi_ssid_list *ssids;
  5353. struct wmi_bssid_list *bssids;
  5354. void *ptr = tlvs->tlvs;
  5355. int i;
  5356. if (arg->n_channels) {
  5357. channels = ptr;
  5358. channels->tag = __cpu_to_le32(WMI_CHAN_LIST_TAG);
  5359. channels->num_chan = __cpu_to_le32(arg->n_channels);
  5360. for (i = 0; i < arg->n_channels; i++)
  5361. channels->channel_list[i].freq =
  5362. __cpu_to_le16(arg->channels[i]);
  5363. ptr += sizeof(*channels);
  5364. ptr += sizeof(__le32) * arg->n_channels;
  5365. }
  5366. if (arg->n_ssids) {
  5367. ssids = ptr;
  5368. ssids->tag = __cpu_to_le32(WMI_SSID_LIST_TAG);
  5369. ssids->num_ssids = __cpu_to_le32(arg->n_ssids);
  5370. for (i = 0; i < arg->n_ssids; i++) {
  5371. ssids->ssids[i].ssid_len =
  5372. __cpu_to_le32(arg->ssids[i].len);
  5373. memcpy(&ssids->ssids[i].ssid,
  5374. arg->ssids[i].ssid,
  5375. arg->ssids[i].len);
  5376. }
  5377. ptr += sizeof(*ssids);
  5378. ptr += sizeof(struct wmi_ssid) * arg->n_ssids;
  5379. }
  5380. if (arg->n_bssids) {
  5381. bssids = ptr;
  5382. bssids->tag = __cpu_to_le32(WMI_BSSID_LIST_TAG);
  5383. bssids->num_bssid = __cpu_to_le32(arg->n_bssids);
  5384. for (i = 0; i < arg->n_bssids; i++)
  5385. ether_addr_copy(bssids->bssid_list[i].addr,
  5386. arg->bssids[i].bssid);
  5387. ptr += sizeof(*bssids);
  5388. ptr += sizeof(struct wmi_mac_addr) * arg->n_bssids;
  5389. }
  5390. if (arg->ie_len) {
  5391. ie = ptr;
  5392. ie->tag = __cpu_to_le32(WMI_IE_TAG);
  5393. ie->ie_len = __cpu_to_le32(arg->ie_len);
  5394. memcpy(ie->ie_data, arg->ie, arg->ie_len);
  5395. ptr += sizeof(*ie);
  5396. ptr += roundup(arg->ie_len, 4);
  5397. }
  5398. }
  5399. static struct sk_buff *
  5400. ath10k_wmi_op_gen_start_scan(struct ath10k *ar,
  5401. const struct wmi_start_scan_arg *arg)
  5402. {
  5403. struct wmi_start_scan_cmd *cmd;
  5404. struct sk_buff *skb;
  5405. size_t len;
  5406. int ret;
  5407. ret = ath10k_wmi_start_scan_verify(arg);
  5408. if (ret)
  5409. return ERR_PTR(ret);
  5410. len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg);
  5411. skb = ath10k_wmi_alloc_skb(ar, len);
  5412. if (!skb)
  5413. return ERR_PTR(-ENOMEM);
  5414. cmd = (struct wmi_start_scan_cmd *)skb->data;
  5415. ath10k_wmi_put_start_scan_common(&cmd->common, arg);
  5416. ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg);
  5417. cmd->burst_duration_ms = __cpu_to_le32(0);
  5418. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi start scan\n");
  5419. return skb;
  5420. }
  5421. static struct sk_buff *
  5422. ath10k_wmi_10x_op_gen_start_scan(struct ath10k *ar,
  5423. const struct wmi_start_scan_arg *arg)
  5424. {
  5425. struct wmi_10x_start_scan_cmd *cmd;
  5426. struct sk_buff *skb;
  5427. size_t len;
  5428. int ret;
  5429. ret = ath10k_wmi_start_scan_verify(arg);
  5430. if (ret)
  5431. return ERR_PTR(ret);
  5432. len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg);
  5433. skb = ath10k_wmi_alloc_skb(ar, len);
  5434. if (!skb)
  5435. return ERR_PTR(-ENOMEM);
  5436. cmd = (struct wmi_10x_start_scan_cmd *)skb->data;
  5437. ath10k_wmi_put_start_scan_common(&cmd->common, arg);
  5438. ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg);
  5439. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi 10x start scan\n");
  5440. return skb;
  5441. }
  5442. void ath10k_wmi_start_scan_init(struct ath10k *ar,
  5443. struct wmi_start_scan_arg *arg)
  5444. {
  5445. /* setup commonly used values */
  5446. arg->scan_req_id = 1;
  5447. arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
  5448. arg->dwell_time_active = 50;
  5449. arg->dwell_time_passive = 150;
  5450. arg->min_rest_time = 50;
  5451. arg->max_rest_time = 500;
  5452. arg->repeat_probe_time = 0;
  5453. arg->probe_spacing_time = 0;
  5454. arg->idle_time = 0;
  5455. arg->max_scan_time = 20000;
  5456. arg->probe_delay = 5;
  5457. arg->notify_scan_events = WMI_SCAN_EVENT_STARTED
  5458. | WMI_SCAN_EVENT_COMPLETED
  5459. | WMI_SCAN_EVENT_BSS_CHANNEL
  5460. | WMI_SCAN_EVENT_FOREIGN_CHANNEL
  5461. | WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT
  5462. | WMI_SCAN_EVENT_DEQUEUED;
  5463. arg->scan_ctrl_flags |= WMI_SCAN_CHAN_STAT_EVENT;
  5464. arg->n_bssids = 1;
  5465. arg->bssids[0].bssid = "\xFF\xFF\xFF\xFF\xFF\xFF";
  5466. }
  5467. static struct sk_buff *
  5468. ath10k_wmi_op_gen_stop_scan(struct ath10k *ar,
  5469. const struct wmi_stop_scan_arg *arg)
  5470. {
  5471. struct wmi_stop_scan_cmd *cmd;
  5472. struct sk_buff *skb;
  5473. u32 scan_id;
  5474. u32 req_id;
  5475. if (arg->req_id > 0xFFF)
  5476. return ERR_PTR(-EINVAL);
  5477. if (arg->req_type == WMI_SCAN_STOP_ONE && arg->u.scan_id > 0xFFF)
  5478. return ERR_PTR(-EINVAL);
  5479. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5480. if (!skb)
  5481. return ERR_PTR(-ENOMEM);
  5482. scan_id = arg->u.scan_id;
  5483. scan_id |= WMI_HOST_SCAN_REQ_ID_PREFIX;
  5484. req_id = arg->req_id;
  5485. req_id |= WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
  5486. cmd = (struct wmi_stop_scan_cmd *)skb->data;
  5487. cmd->req_type = __cpu_to_le32(arg->req_type);
  5488. cmd->vdev_id = __cpu_to_le32(arg->u.vdev_id);
  5489. cmd->scan_id = __cpu_to_le32(scan_id);
  5490. cmd->scan_req_id = __cpu_to_le32(req_id);
  5491. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5492. "wmi stop scan reqid %d req_type %d vdev/scan_id %d\n",
  5493. arg->req_id, arg->req_type, arg->u.scan_id);
  5494. return skb;
  5495. }
  5496. static struct sk_buff *
  5497. ath10k_wmi_op_gen_vdev_create(struct ath10k *ar, u32 vdev_id,
  5498. enum wmi_vdev_type type,
  5499. enum wmi_vdev_subtype subtype,
  5500. const u8 macaddr[ETH_ALEN])
  5501. {
  5502. struct wmi_vdev_create_cmd *cmd;
  5503. struct sk_buff *skb;
  5504. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5505. if (!skb)
  5506. return ERR_PTR(-ENOMEM);
  5507. cmd = (struct wmi_vdev_create_cmd *)skb->data;
  5508. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5509. cmd->vdev_type = __cpu_to_le32(type);
  5510. cmd->vdev_subtype = __cpu_to_le32(subtype);
  5511. ether_addr_copy(cmd->vdev_macaddr.addr, macaddr);
  5512. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5513. "WMI vdev create: id %d type %d subtype %d macaddr %pM\n",
  5514. vdev_id, type, subtype, macaddr);
  5515. return skb;
  5516. }
  5517. static struct sk_buff *
  5518. ath10k_wmi_op_gen_vdev_delete(struct ath10k *ar, u32 vdev_id)
  5519. {
  5520. struct wmi_vdev_delete_cmd *cmd;
  5521. struct sk_buff *skb;
  5522. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5523. if (!skb)
  5524. return ERR_PTR(-ENOMEM);
  5525. cmd = (struct wmi_vdev_delete_cmd *)skb->data;
  5526. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5527. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5528. "WMI vdev delete id %d\n", vdev_id);
  5529. return skb;
  5530. }
  5531. static struct sk_buff *
  5532. ath10k_wmi_op_gen_vdev_start(struct ath10k *ar,
  5533. const struct wmi_vdev_start_request_arg *arg,
  5534. bool restart)
  5535. {
  5536. struct wmi_vdev_start_request_cmd *cmd;
  5537. struct sk_buff *skb;
  5538. const char *cmdname;
  5539. u32 flags = 0;
  5540. if (WARN_ON(arg->hidden_ssid && !arg->ssid))
  5541. return ERR_PTR(-EINVAL);
  5542. if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid)))
  5543. return ERR_PTR(-EINVAL);
  5544. if (restart)
  5545. cmdname = "restart";
  5546. else
  5547. cmdname = "start";
  5548. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5549. if (!skb)
  5550. return ERR_PTR(-ENOMEM);
  5551. if (arg->hidden_ssid)
  5552. flags |= WMI_VDEV_START_HIDDEN_SSID;
  5553. if (arg->pmf_enabled)
  5554. flags |= WMI_VDEV_START_PMF_ENABLED;
  5555. cmd = (struct wmi_vdev_start_request_cmd *)skb->data;
  5556. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  5557. cmd->disable_hw_ack = __cpu_to_le32(arg->disable_hw_ack);
  5558. cmd->beacon_interval = __cpu_to_le32(arg->bcn_intval);
  5559. cmd->dtim_period = __cpu_to_le32(arg->dtim_period);
  5560. cmd->flags = __cpu_to_le32(flags);
  5561. cmd->bcn_tx_rate = __cpu_to_le32(arg->bcn_tx_rate);
  5562. cmd->bcn_tx_power = __cpu_to_le32(arg->bcn_tx_power);
  5563. if (arg->ssid) {
  5564. cmd->ssid.ssid_len = __cpu_to_le32(arg->ssid_len);
  5565. memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len);
  5566. }
  5567. ath10k_wmi_put_wmi_channel(&cmd->chan, &arg->channel);
  5568. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5569. "wmi vdev %s id 0x%x flags: 0x%0X, freq %d, mode %d, ch_flags: 0x%0X, max_power: %d\n",
  5570. cmdname, arg->vdev_id,
  5571. flags, arg->channel.freq, arg->channel.mode,
  5572. cmd->chan.flags, arg->channel.max_power);
  5573. return skb;
  5574. }
  5575. static struct sk_buff *
  5576. ath10k_wmi_op_gen_vdev_stop(struct ath10k *ar, u32 vdev_id)
  5577. {
  5578. struct wmi_vdev_stop_cmd *cmd;
  5579. struct sk_buff *skb;
  5580. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5581. if (!skb)
  5582. return ERR_PTR(-ENOMEM);
  5583. cmd = (struct wmi_vdev_stop_cmd *)skb->data;
  5584. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5585. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi vdev stop id 0x%x\n", vdev_id);
  5586. return skb;
  5587. }
  5588. static struct sk_buff *
  5589. ath10k_wmi_op_gen_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid,
  5590. const u8 *bssid)
  5591. {
  5592. struct wmi_vdev_up_cmd *cmd;
  5593. struct sk_buff *skb;
  5594. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5595. if (!skb)
  5596. return ERR_PTR(-ENOMEM);
  5597. cmd = (struct wmi_vdev_up_cmd *)skb->data;
  5598. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5599. cmd->vdev_assoc_id = __cpu_to_le32(aid);
  5600. ether_addr_copy(cmd->vdev_bssid.addr, bssid);
  5601. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5602. "wmi mgmt vdev up id 0x%x assoc id %d bssid %pM\n",
  5603. vdev_id, aid, bssid);
  5604. return skb;
  5605. }
  5606. static struct sk_buff *
  5607. ath10k_wmi_op_gen_vdev_down(struct ath10k *ar, u32 vdev_id)
  5608. {
  5609. struct wmi_vdev_down_cmd *cmd;
  5610. struct sk_buff *skb;
  5611. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5612. if (!skb)
  5613. return ERR_PTR(-ENOMEM);
  5614. cmd = (struct wmi_vdev_down_cmd *)skb->data;
  5615. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5616. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5617. "wmi mgmt vdev down id 0x%x\n", vdev_id);
  5618. return skb;
  5619. }
  5620. static struct sk_buff *
  5621. ath10k_wmi_op_gen_vdev_set_param(struct ath10k *ar, u32 vdev_id,
  5622. u32 param_id, u32 param_value)
  5623. {
  5624. struct wmi_vdev_set_param_cmd *cmd;
  5625. struct sk_buff *skb;
  5626. if (param_id == WMI_VDEV_PARAM_UNSUPPORTED) {
  5627. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5628. "vdev param %d not supported by firmware\n",
  5629. param_id);
  5630. return ERR_PTR(-EOPNOTSUPP);
  5631. }
  5632. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5633. if (!skb)
  5634. return ERR_PTR(-ENOMEM);
  5635. cmd = (struct wmi_vdev_set_param_cmd *)skb->data;
  5636. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5637. cmd->param_id = __cpu_to_le32(param_id);
  5638. cmd->param_value = __cpu_to_le32(param_value);
  5639. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5640. "wmi vdev id 0x%x set param %d value %d\n",
  5641. vdev_id, param_id, param_value);
  5642. return skb;
  5643. }
  5644. static struct sk_buff *
  5645. ath10k_wmi_op_gen_vdev_install_key(struct ath10k *ar,
  5646. const struct wmi_vdev_install_key_arg *arg)
  5647. {
  5648. struct wmi_vdev_install_key_cmd *cmd;
  5649. struct sk_buff *skb;
  5650. if (arg->key_cipher == WMI_CIPHER_NONE && arg->key_data != NULL)
  5651. return ERR_PTR(-EINVAL);
  5652. if (arg->key_cipher != WMI_CIPHER_NONE && arg->key_data == NULL)
  5653. return ERR_PTR(-EINVAL);
  5654. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd) + arg->key_len);
  5655. if (!skb)
  5656. return ERR_PTR(-ENOMEM);
  5657. cmd = (struct wmi_vdev_install_key_cmd *)skb->data;
  5658. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  5659. cmd->key_idx = __cpu_to_le32(arg->key_idx);
  5660. cmd->key_flags = __cpu_to_le32(arg->key_flags);
  5661. cmd->key_cipher = __cpu_to_le32(arg->key_cipher);
  5662. cmd->key_len = __cpu_to_le32(arg->key_len);
  5663. cmd->key_txmic_len = __cpu_to_le32(arg->key_txmic_len);
  5664. cmd->key_rxmic_len = __cpu_to_le32(arg->key_rxmic_len);
  5665. if (arg->macaddr)
  5666. ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr);
  5667. if (arg->key_data)
  5668. memcpy(cmd->key_data, arg->key_data, arg->key_len);
  5669. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5670. "wmi vdev install key idx %d cipher %d len %d\n",
  5671. arg->key_idx, arg->key_cipher, arg->key_len);
  5672. return skb;
  5673. }
  5674. static struct sk_buff *
  5675. ath10k_wmi_op_gen_vdev_spectral_conf(struct ath10k *ar,
  5676. const struct wmi_vdev_spectral_conf_arg *arg)
  5677. {
  5678. struct wmi_vdev_spectral_conf_cmd *cmd;
  5679. struct sk_buff *skb;
  5680. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5681. if (!skb)
  5682. return ERR_PTR(-ENOMEM);
  5683. cmd = (struct wmi_vdev_spectral_conf_cmd *)skb->data;
  5684. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  5685. cmd->scan_count = __cpu_to_le32(arg->scan_count);
  5686. cmd->scan_period = __cpu_to_le32(arg->scan_period);
  5687. cmd->scan_priority = __cpu_to_le32(arg->scan_priority);
  5688. cmd->scan_fft_size = __cpu_to_le32(arg->scan_fft_size);
  5689. cmd->scan_gc_ena = __cpu_to_le32(arg->scan_gc_ena);
  5690. cmd->scan_restart_ena = __cpu_to_le32(arg->scan_restart_ena);
  5691. cmd->scan_noise_floor_ref = __cpu_to_le32(arg->scan_noise_floor_ref);
  5692. cmd->scan_init_delay = __cpu_to_le32(arg->scan_init_delay);
  5693. cmd->scan_nb_tone_thr = __cpu_to_le32(arg->scan_nb_tone_thr);
  5694. cmd->scan_str_bin_thr = __cpu_to_le32(arg->scan_str_bin_thr);
  5695. cmd->scan_wb_rpt_mode = __cpu_to_le32(arg->scan_wb_rpt_mode);
  5696. cmd->scan_rssi_rpt_mode = __cpu_to_le32(arg->scan_rssi_rpt_mode);
  5697. cmd->scan_rssi_thr = __cpu_to_le32(arg->scan_rssi_thr);
  5698. cmd->scan_pwr_format = __cpu_to_le32(arg->scan_pwr_format);
  5699. cmd->scan_rpt_mode = __cpu_to_le32(arg->scan_rpt_mode);
  5700. cmd->scan_bin_scale = __cpu_to_le32(arg->scan_bin_scale);
  5701. cmd->scan_dbm_adj = __cpu_to_le32(arg->scan_dbm_adj);
  5702. cmd->scan_chn_mask = __cpu_to_le32(arg->scan_chn_mask);
  5703. return skb;
  5704. }
  5705. static struct sk_buff *
  5706. ath10k_wmi_op_gen_vdev_spectral_enable(struct ath10k *ar, u32 vdev_id,
  5707. u32 trigger, u32 enable)
  5708. {
  5709. struct wmi_vdev_spectral_enable_cmd *cmd;
  5710. struct sk_buff *skb;
  5711. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5712. if (!skb)
  5713. return ERR_PTR(-ENOMEM);
  5714. cmd = (struct wmi_vdev_spectral_enable_cmd *)skb->data;
  5715. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5716. cmd->trigger_cmd = __cpu_to_le32(trigger);
  5717. cmd->enable_cmd = __cpu_to_le32(enable);
  5718. return skb;
  5719. }
  5720. static struct sk_buff *
  5721. ath10k_wmi_op_gen_peer_create(struct ath10k *ar, u32 vdev_id,
  5722. const u8 peer_addr[ETH_ALEN],
  5723. enum wmi_peer_type peer_type)
  5724. {
  5725. struct wmi_peer_create_cmd *cmd;
  5726. struct sk_buff *skb;
  5727. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5728. if (!skb)
  5729. return ERR_PTR(-ENOMEM);
  5730. cmd = (struct wmi_peer_create_cmd *)skb->data;
  5731. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5732. ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
  5733. cmd->peer_type = __cpu_to_le32(peer_type);
  5734. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5735. "wmi peer create vdev_id %d peer_addr %pM\n",
  5736. vdev_id, peer_addr);
  5737. return skb;
  5738. }
  5739. static struct sk_buff *
  5740. ath10k_wmi_op_gen_peer_delete(struct ath10k *ar, u32 vdev_id,
  5741. const u8 peer_addr[ETH_ALEN])
  5742. {
  5743. struct wmi_peer_delete_cmd *cmd;
  5744. struct sk_buff *skb;
  5745. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5746. if (!skb)
  5747. return ERR_PTR(-ENOMEM);
  5748. cmd = (struct wmi_peer_delete_cmd *)skb->data;
  5749. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5750. ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
  5751. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5752. "wmi peer delete vdev_id %d peer_addr %pM\n",
  5753. vdev_id, peer_addr);
  5754. return skb;
  5755. }
  5756. static struct sk_buff *
  5757. ath10k_wmi_op_gen_peer_flush(struct ath10k *ar, u32 vdev_id,
  5758. const u8 peer_addr[ETH_ALEN], u32 tid_bitmap)
  5759. {
  5760. struct wmi_peer_flush_tids_cmd *cmd;
  5761. struct sk_buff *skb;
  5762. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5763. if (!skb)
  5764. return ERR_PTR(-ENOMEM);
  5765. cmd = (struct wmi_peer_flush_tids_cmd *)skb->data;
  5766. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5767. cmd->peer_tid_bitmap = __cpu_to_le32(tid_bitmap);
  5768. ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
  5769. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5770. "wmi peer flush vdev_id %d peer_addr %pM tids %08x\n",
  5771. vdev_id, peer_addr, tid_bitmap);
  5772. return skb;
  5773. }
  5774. static struct sk_buff *
  5775. ath10k_wmi_op_gen_peer_set_param(struct ath10k *ar, u32 vdev_id,
  5776. const u8 *peer_addr,
  5777. enum wmi_peer_param param_id,
  5778. u32 param_value)
  5779. {
  5780. struct wmi_peer_set_param_cmd *cmd;
  5781. struct sk_buff *skb;
  5782. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5783. if (!skb)
  5784. return ERR_PTR(-ENOMEM);
  5785. cmd = (struct wmi_peer_set_param_cmd *)skb->data;
  5786. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5787. cmd->param_id = __cpu_to_le32(param_id);
  5788. cmd->param_value = __cpu_to_le32(param_value);
  5789. ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
  5790. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5791. "wmi vdev %d peer 0x%pM set param %d value %d\n",
  5792. vdev_id, peer_addr, param_id, param_value);
  5793. return skb;
  5794. }
  5795. static struct sk_buff *
  5796. ath10k_wmi_op_gen_set_psmode(struct ath10k *ar, u32 vdev_id,
  5797. enum wmi_sta_ps_mode psmode)
  5798. {
  5799. struct wmi_sta_powersave_mode_cmd *cmd;
  5800. struct sk_buff *skb;
  5801. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5802. if (!skb)
  5803. return ERR_PTR(-ENOMEM);
  5804. cmd = (struct wmi_sta_powersave_mode_cmd *)skb->data;
  5805. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5806. cmd->sta_ps_mode = __cpu_to_le32(psmode);
  5807. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5808. "wmi set powersave id 0x%x mode %d\n",
  5809. vdev_id, psmode);
  5810. return skb;
  5811. }
  5812. static struct sk_buff *
  5813. ath10k_wmi_op_gen_set_sta_ps(struct ath10k *ar, u32 vdev_id,
  5814. enum wmi_sta_powersave_param param_id,
  5815. u32 value)
  5816. {
  5817. struct wmi_sta_powersave_param_cmd *cmd;
  5818. struct sk_buff *skb;
  5819. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5820. if (!skb)
  5821. return ERR_PTR(-ENOMEM);
  5822. cmd = (struct wmi_sta_powersave_param_cmd *)skb->data;
  5823. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5824. cmd->param_id = __cpu_to_le32(param_id);
  5825. cmd->param_value = __cpu_to_le32(value);
  5826. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5827. "wmi sta ps param vdev_id 0x%x param %d value %d\n",
  5828. vdev_id, param_id, value);
  5829. return skb;
  5830. }
  5831. static struct sk_buff *
  5832. ath10k_wmi_op_gen_set_ap_ps(struct ath10k *ar, u32 vdev_id, const u8 *mac,
  5833. enum wmi_ap_ps_peer_param param_id, u32 value)
  5834. {
  5835. struct wmi_ap_ps_peer_cmd *cmd;
  5836. struct sk_buff *skb;
  5837. if (!mac)
  5838. return ERR_PTR(-EINVAL);
  5839. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5840. if (!skb)
  5841. return ERR_PTR(-ENOMEM);
  5842. cmd = (struct wmi_ap_ps_peer_cmd *)skb->data;
  5843. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5844. cmd->param_id = __cpu_to_le32(param_id);
  5845. cmd->param_value = __cpu_to_le32(value);
  5846. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  5847. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5848. "wmi ap ps param vdev_id 0x%X param %d value %d mac_addr %pM\n",
  5849. vdev_id, param_id, value, mac);
  5850. return skb;
  5851. }
  5852. static struct sk_buff *
  5853. ath10k_wmi_op_gen_scan_chan_list(struct ath10k *ar,
  5854. const struct wmi_scan_chan_list_arg *arg)
  5855. {
  5856. struct wmi_scan_chan_list_cmd *cmd;
  5857. struct sk_buff *skb;
  5858. struct wmi_channel_arg *ch;
  5859. struct wmi_channel *ci;
  5860. int len;
  5861. int i;
  5862. len = sizeof(*cmd) + arg->n_channels * sizeof(struct wmi_channel);
  5863. skb = ath10k_wmi_alloc_skb(ar, len);
  5864. if (!skb)
  5865. return ERR_PTR(-EINVAL);
  5866. cmd = (struct wmi_scan_chan_list_cmd *)skb->data;
  5867. cmd->num_scan_chans = __cpu_to_le32(arg->n_channels);
  5868. for (i = 0; i < arg->n_channels; i++) {
  5869. ch = &arg->channels[i];
  5870. ci = &cmd->chan_info[i];
  5871. ath10k_wmi_put_wmi_channel(ci, ch);
  5872. }
  5873. return skb;
  5874. }
  5875. static void
  5876. ath10k_wmi_peer_assoc_fill(struct ath10k *ar, void *buf,
  5877. const struct wmi_peer_assoc_complete_arg *arg)
  5878. {
  5879. struct wmi_common_peer_assoc_complete_cmd *cmd = buf;
  5880. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  5881. cmd->peer_new_assoc = __cpu_to_le32(arg->peer_reassoc ? 0 : 1);
  5882. cmd->peer_associd = __cpu_to_le32(arg->peer_aid);
  5883. cmd->peer_flags = __cpu_to_le32(arg->peer_flags);
  5884. cmd->peer_caps = __cpu_to_le32(arg->peer_caps);
  5885. cmd->peer_listen_intval = __cpu_to_le32(arg->peer_listen_intval);
  5886. cmd->peer_ht_caps = __cpu_to_le32(arg->peer_ht_caps);
  5887. cmd->peer_max_mpdu = __cpu_to_le32(arg->peer_max_mpdu);
  5888. cmd->peer_mpdu_density = __cpu_to_le32(arg->peer_mpdu_density);
  5889. cmd->peer_rate_caps = __cpu_to_le32(arg->peer_rate_caps);
  5890. cmd->peer_nss = __cpu_to_le32(arg->peer_num_spatial_streams);
  5891. cmd->peer_vht_caps = __cpu_to_le32(arg->peer_vht_caps);
  5892. cmd->peer_phymode = __cpu_to_le32(arg->peer_phymode);
  5893. ether_addr_copy(cmd->peer_macaddr.addr, arg->addr);
  5894. cmd->peer_legacy_rates.num_rates =
  5895. __cpu_to_le32(arg->peer_legacy_rates.num_rates);
  5896. memcpy(cmd->peer_legacy_rates.rates, arg->peer_legacy_rates.rates,
  5897. arg->peer_legacy_rates.num_rates);
  5898. cmd->peer_ht_rates.num_rates =
  5899. __cpu_to_le32(arg->peer_ht_rates.num_rates);
  5900. memcpy(cmd->peer_ht_rates.rates, arg->peer_ht_rates.rates,
  5901. arg->peer_ht_rates.num_rates);
  5902. cmd->peer_vht_rates.rx_max_rate =
  5903. __cpu_to_le32(arg->peer_vht_rates.rx_max_rate);
  5904. cmd->peer_vht_rates.rx_mcs_set =
  5905. __cpu_to_le32(arg->peer_vht_rates.rx_mcs_set);
  5906. cmd->peer_vht_rates.tx_max_rate =
  5907. __cpu_to_le32(arg->peer_vht_rates.tx_max_rate);
  5908. cmd->peer_vht_rates.tx_mcs_set =
  5909. __cpu_to_le32(arg->peer_vht_rates.tx_mcs_set);
  5910. }
  5911. static void
  5912. ath10k_wmi_peer_assoc_fill_main(struct ath10k *ar, void *buf,
  5913. const struct wmi_peer_assoc_complete_arg *arg)
  5914. {
  5915. struct wmi_main_peer_assoc_complete_cmd *cmd = buf;
  5916. ath10k_wmi_peer_assoc_fill(ar, buf, arg);
  5917. memset(cmd->peer_ht_info, 0, sizeof(cmd->peer_ht_info));
  5918. }
  5919. static void
  5920. ath10k_wmi_peer_assoc_fill_10_1(struct ath10k *ar, void *buf,
  5921. const struct wmi_peer_assoc_complete_arg *arg)
  5922. {
  5923. ath10k_wmi_peer_assoc_fill(ar, buf, arg);
  5924. }
  5925. static void
  5926. ath10k_wmi_peer_assoc_fill_10_2(struct ath10k *ar, void *buf,
  5927. const struct wmi_peer_assoc_complete_arg *arg)
  5928. {
  5929. struct wmi_10_2_peer_assoc_complete_cmd *cmd = buf;
  5930. int max_mcs, max_nss;
  5931. u32 info0;
  5932. /* TODO: Is using max values okay with firmware? */
  5933. max_mcs = 0xf;
  5934. max_nss = 0xf;
  5935. info0 = SM(max_mcs, WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX) |
  5936. SM(max_nss, WMI_PEER_ASSOC_INFO0_MAX_NSS);
  5937. ath10k_wmi_peer_assoc_fill(ar, buf, arg);
  5938. cmd->info0 = __cpu_to_le32(info0);
  5939. }
  5940. static void
  5941. ath10k_wmi_peer_assoc_fill_10_4(struct ath10k *ar, void *buf,
  5942. const struct wmi_peer_assoc_complete_arg *arg)
  5943. {
  5944. struct wmi_10_4_peer_assoc_complete_cmd *cmd = buf;
  5945. ath10k_wmi_peer_assoc_fill_10_2(ar, buf, arg);
  5946. if (arg->peer_bw_rxnss_override)
  5947. cmd->peer_bw_rxnss_override =
  5948. __cpu_to_le32((arg->peer_bw_rxnss_override - 1) |
  5949. BIT(PEER_BW_RXNSS_OVERRIDE_OFFSET));
  5950. else
  5951. cmd->peer_bw_rxnss_override = 0;
  5952. }
  5953. static int
  5954. ath10k_wmi_peer_assoc_check_arg(const struct wmi_peer_assoc_complete_arg *arg)
  5955. {
  5956. if (arg->peer_mpdu_density > 16)
  5957. return -EINVAL;
  5958. if (arg->peer_legacy_rates.num_rates > MAX_SUPPORTED_RATES)
  5959. return -EINVAL;
  5960. if (arg->peer_ht_rates.num_rates > MAX_SUPPORTED_RATES)
  5961. return -EINVAL;
  5962. return 0;
  5963. }
  5964. static struct sk_buff *
  5965. ath10k_wmi_op_gen_peer_assoc(struct ath10k *ar,
  5966. const struct wmi_peer_assoc_complete_arg *arg)
  5967. {
  5968. size_t len = sizeof(struct wmi_main_peer_assoc_complete_cmd);
  5969. struct sk_buff *skb;
  5970. int ret;
  5971. ret = ath10k_wmi_peer_assoc_check_arg(arg);
  5972. if (ret)
  5973. return ERR_PTR(ret);
  5974. skb = ath10k_wmi_alloc_skb(ar, len);
  5975. if (!skb)
  5976. return ERR_PTR(-ENOMEM);
  5977. ath10k_wmi_peer_assoc_fill_main(ar, skb->data, arg);
  5978. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5979. "wmi peer assoc vdev %d addr %pM (%s)\n",
  5980. arg->vdev_id, arg->addr,
  5981. arg->peer_reassoc ? "reassociate" : "new");
  5982. return skb;
  5983. }
  5984. static struct sk_buff *
  5985. ath10k_wmi_10_1_op_gen_peer_assoc(struct ath10k *ar,
  5986. const struct wmi_peer_assoc_complete_arg *arg)
  5987. {
  5988. size_t len = sizeof(struct wmi_10_1_peer_assoc_complete_cmd);
  5989. struct sk_buff *skb;
  5990. int ret;
  5991. ret = ath10k_wmi_peer_assoc_check_arg(arg);
  5992. if (ret)
  5993. return ERR_PTR(ret);
  5994. skb = ath10k_wmi_alloc_skb(ar, len);
  5995. if (!skb)
  5996. return ERR_PTR(-ENOMEM);
  5997. ath10k_wmi_peer_assoc_fill_10_1(ar, skb->data, arg);
  5998. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5999. "wmi peer assoc vdev %d addr %pM (%s)\n",
  6000. arg->vdev_id, arg->addr,
  6001. arg->peer_reassoc ? "reassociate" : "new");
  6002. return skb;
  6003. }
  6004. static struct sk_buff *
  6005. ath10k_wmi_10_2_op_gen_peer_assoc(struct ath10k *ar,
  6006. const struct wmi_peer_assoc_complete_arg *arg)
  6007. {
  6008. size_t len = sizeof(struct wmi_10_2_peer_assoc_complete_cmd);
  6009. struct sk_buff *skb;
  6010. int ret;
  6011. ret = ath10k_wmi_peer_assoc_check_arg(arg);
  6012. if (ret)
  6013. return ERR_PTR(ret);
  6014. skb = ath10k_wmi_alloc_skb(ar, len);
  6015. if (!skb)
  6016. return ERR_PTR(-ENOMEM);
  6017. ath10k_wmi_peer_assoc_fill_10_2(ar, skb->data, arg);
  6018. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6019. "wmi peer assoc vdev %d addr %pM (%s)\n",
  6020. arg->vdev_id, arg->addr,
  6021. arg->peer_reassoc ? "reassociate" : "new");
  6022. return skb;
  6023. }
  6024. static struct sk_buff *
  6025. ath10k_wmi_10_4_op_gen_peer_assoc(struct ath10k *ar,
  6026. const struct wmi_peer_assoc_complete_arg *arg)
  6027. {
  6028. size_t len = sizeof(struct wmi_10_4_peer_assoc_complete_cmd);
  6029. struct sk_buff *skb;
  6030. int ret;
  6031. ret = ath10k_wmi_peer_assoc_check_arg(arg);
  6032. if (ret)
  6033. return ERR_PTR(ret);
  6034. skb = ath10k_wmi_alloc_skb(ar, len);
  6035. if (!skb)
  6036. return ERR_PTR(-ENOMEM);
  6037. ath10k_wmi_peer_assoc_fill_10_4(ar, skb->data, arg);
  6038. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6039. "wmi peer assoc vdev %d addr %pM (%s)\n",
  6040. arg->vdev_id, arg->addr,
  6041. arg->peer_reassoc ? "reassociate" : "new");
  6042. return skb;
  6043. }
  6044. static struct sk_buff *
  6045. ath10k_wmi_10_2_op_gen_pdev_get_temperature(struct ath10k *ar)
  6046. {
  6047. struct sk_buff *skb;
  6048. skb = ath10k_wmi_alloc_skb(ar, 0);
  6049. if (!skb)
  6050. return ERR_PTR(-ENOMEM);
  6051. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev get temperature\n");
  6052. return skb;
  6053. }
  6054. static struct sk_buff *
  6055. ath10k_wmi_10_2_op_gen_pdev_bss_chan_info(struct ath10k *ar,
  6056. enum wmi_bss_survey_req_type type)
  6057. {
  6058. struct wmi_pdev_chan_info_req_cmd *cmd;
  6059. struct sk_buff *skb;
  6060. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6061. if (!skb)
  6062. return ERR_PTR(-ENOMEM);
  6063. cmd = (struct wmi_pdev_chan_info_req_cmd *)skb->data;
  6064. cmd->type = __cpu_to_le32(type);
  6065. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6066. "wmi pdev bss info request type %d\n", type);
  6067. return skb;
  6068. }
  6069. /* This function assumes the beacon is already DMA mapped */
  6070. static struct sk_buff *
  6071. ath10k_wmi_op_gen_beacon_dma(struct ath10k *ar, u32 vdev_id, const void *bcn,
  6072. size_t bcn_len, u32 bcn_paddr, bool dtim_zero,
  6073. bool deliver_cab)
  6074. {
  6075. struct wmi_bcn_tx_ref_cmd *cmd;
  6076. struct sk_buff *skb;
  6077. struct ieee80211_hdr *hdr;
  6078. u16 fc;
  6079. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6080. if (!skb)
  6081. return ERR_PTR(-ENOMEM);
  6082. hdr = (struct ieee80211_hdr *)bcn;
  6083. fc = le16_to_cpu(hdr->frame_control);
  6084. cmd = (struct wmi_bcn_tx_ref_cmd *)skb->data;
  6085. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6086. cmd->data_len = __cpu_to_le32(bcn_len);
  6087. cmd->data_ptr = __cpu_to_le32(bcn_paddr);
  6088. cmd->msdu_id = 0;
  6089. cmd->frame_control = __cpu_to_le32(fc);
  6090. cmd->flags = 0;
  6091. cmd->antenna_mask = __cpu_to_le32(WMI_BCN_TX_REF_DEF_ANTENNA);
  6092. if (dtim_zero)
  6093. cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DTIM_ZERO);
  6094. if (deliver_cab)
  6095. cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DELIVER_CAB);
  6096. return skb;
  6097. }
  6098. void ath10k_wmi_set_wmm_param(struct wmi_wmm_params *params,
  6099. const struct wmi_wmm_params_arg *arg)
  6100. {
  6101. params->cwmin = __cpu_to_le32(arg->cwmin);
  6102. params->cwmax = __cpu_to_le32(arg->cwmax);
  6103. params->aifs = __cpu_to_le32(arg->aifs);
  6104. params->txop = __cpu_to_le32(arg->txop);
  6105. params->acm = __cpu_to_le32(arg->acm);
  6106. params->no_ack = __cpu_to_le32(arg->no_ack);
  6107. }
  6108. static struct sk_buff *
  6109. ath10k_wmi_op_gen_pdev_set_wmm(struct ath10k *ar,
  6110. const struct wmi_wmm_params_all_arg *arg)
  6111. {
  6112. struct wmi_pdev_set_wmm_params *cmd;
  6113. struct sk_buff *skb;
  6114. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6115. if (!skb)
  6116. return ERR_PTR(-ENOMEM);
  6117. cmd = (struct wmi_pdev_set_wmm_params *)skb->data;
  6118. ath10k_wmi_set_wmm_param(&cmd->ac_be, &arg->ac_be);
  6119. ath10k_wmi_set_wmm_param(&cmd->ac_bk, &arg->ac_bk);
  6120. ath10k_wmi_set_wmm_param(&cmd->ac_vi, &arg->ac_vi);
  6121. ath10k_wmi_set_wmm_param(&cmd->ac_vo, &arg->ac_vo);
  6122. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set wmm params\n");
  6123. return skb;
  6124. }
  6125. static struct sk_buff *
  6126. ath10k_wmi_op_gen_request_stats(struct ath10k *ar, u32 stats_mask)
  6127. {
  6128. struct wmi_request_stats_cmd *cmd;
  6129. struct sk_buff *skb;
  6130. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6131. if (!skb)
  6132. return ERR_PTR(-ENOMEM);
  6133. cmd = (struct wmi_request_stats_cmd *)skb->data;
  6134. cmd->stats_id = __cpu_to_le32(stats_mask);
  6135. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi request stats 0x%08x\n",
  6136. stats_mask);
  6137. return skb;
  6138. }
  6139. static struct sk_buff *
  6140. ath10k_wmi_op_gen_force_fw_hang(struct ath10k *ar,
  6141. enum wmi_force_fw_hang_type type, u32 delay_ms)
  6142. {
  6143. struct wmi_force_fw_hang_cmd *cmd;
  6144. struct sk_buff *skb;
  6145. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6146. if (!skb)
  6147. return ERR_PTR(-ENOMEM);
  6148. cmd = (struct wmi_force_fw_hang_cmd *)skb->data;
  6149. cmd->type = __cpu_to_le32(type);
  6150. cmd->delay_ms = __cpu_to_le32(delay_ms);
  6151. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi force fw hang %d delay %d\n",
  6152. type, delay_ms);
  6153. return skb;
  6154. }
  6155. static struct sk_buff *
  6156. ath10k_wmi_op_gen_dbglog_cfg(struct ath10k *ar, u64 module_enable,
  6157. u32 log_level)
  6158. {
  6159. struct wmi_dbglog_cfg_cmd *cmd;
  6160. struct sk_buff *skb;
  6161. u32 cfg;
  6162. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6163. if (!skb)
  6164. return ERR_PTR(-ENOMEM);
  6165. cmd = (struct wmi_dbglog_cfg_cmd *)skb->data;
  6166. if (module_enable) {
  6167. cfg = SM(log_level,
  6168. ATH10K_DBGLOG_CFG_LOG_LVL);
  6169. } else {
  6170. /* set back defaults, all modules with WARN level */
  6171. cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
  6172. ATH10K_DBGLOG_CFG_LOG_LVL);
  6173. module_enable = ~0;
  6174. }
  6175. cmd->module_enable = __cpu_to_le32(module_enable);
  6176. cmd->module_valid = __cpu_to_le32(~0);
  6177. cmd->config_enable = __cpu_to_le32(cfg);
  6178. cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
  6179. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6180. "wmi dbglog cfg modules %08x %08x config %08x %08x\n",
  6181. __le32_to_cpu(cmd->module_enable),
  6182. __le32_to_cpu(cmd->module_valid),
  6183. __le32_to_cpu(cmd->config_enable),
  6184. __le32_to_cpu(cmd->config_valid));
  6185. return skb;
  6186. }
  6187. static struct sk_buff *
  6188. ath10k_wmi_10_4_op_gen_dbglog_cfg(struct ath10k *ar, u64 module_enable,
  6189. u32 log_level)
  6190. {
  6191. struct wmi_10_4_dbglog_cfg_cmd *cmd;
  6192. struct sk_buff *skb;
  6193. u32 cfg;
  6194. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6195. if (!skb)
  6196. return ERR_PTR(-ENOMEM);
  6197. cmd = (struct wmi_10_4_dbglog_cfg_cmd *)skb->data;
  6198. if (module_enable) {
  6199. cfg = SM(log_level,
  6200. ATH10K_DBGLOG_CFG_LOG_LVL);
  6201. } else {
  6202. /* set back defaults, all modules with WARN level */
  6203. cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
  6204. ATH10K_DBGLOG_CFG_LOG_LVL);
  6205. module_enable = ~0;
  6206. }
  6207. cmd->module_enable = __cpu_to_le64(module_enable);
  6208. cmd->module_valid = __cpu_to_le64(~0);
  6209. cmd->config_enable = __cpu_to_le32(cfg);
  6210. cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
  6211. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6212. "wmi dbglog cfg modules 0x%016llx 0x%016llx config %08x %08x\n",
  6213. __le64_to_cpu(cmd->module_enable),
  6214. __le64_to_cpu(cmd->module_valid),
  6215. __le32_to_cpu(cmd->config_enable),
  6216. __le32_to_cpu(cmd->config_valid));
  6217. return skb;
  6218. }
  6219. static struct sk_buff *
  6220. ath10k_wmi_op_gen_pktlog_enable(struct ath10k *ar, u32 ev_bitmap)
  6221. {
  6222. struct wmi_pdev_pktlog_enable_cmd *cmd;
  6223. struct sk_buff *skb;
  6224. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6225. if (!skb)
  6226. return ERR_PTR(-ENOMEM);
  6227. ev_bitmap &= ATH10K_PKTLOG_ANY;
  6228. cmd = (struct wmi_pdev_pktlog_enable_cmd *)skb->data;
  6229. cmd->ev_bitmap = __cpu_to_le32(ev_bitmap);
  6230. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi enable pktlog filter 0x%08x\n",
  6231. ev_bitmap);
  6232. return skb;
  6233. }
  6234. static struct sk_buff *
  6235. ath10k_wmi_op_gen_pktlog_disable(struct ath10k *ar)
  6236. {
  6237. struct sk_buff *skb;
  6238. skb = ath10k_wmi_alloc_skb(ar, 0);
  6239. if (!skb)
  6240. return ERR_PTR(-ENOMEM);
  6241. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi disable pktlog\n");
  6242. return skb;
  6243. }
  6244. static struct sk_buff *
  6245. ath10k_wmi_op_gen_pdev_set_quiet_mode(struct ath10k *ar, u32 period,
  6246. u32 duration, u32 next_offset,
  6247. u32 enabled)
  6248. {
  6249. struct wmi_pdev_set_quiet_cmd *cmd;
  6250. struct sk_buff *skb;
  6251. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6252. if (!skb)
  6253. return ERR_PTR(-ENOMEM);
  6254. cmd = (struct wmi_pdev_set_quiet_cmd *)skb->data;
  6255. cmd->period = __cpu_to_le32(period);
  6256. cmd->duration = __cpu_to_le32(duration);
  6257. cmd->next_start = __cpu_to_le32(next_offset);
  6258. cmd->enabled = __cpu_to_le32(enabled);
  6259. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6260. "wmi quiet param: period %u duration %u enabled %d\n",
  6261. period, duration, enabled);
  6262. return skb;
  6263. }
  6264. static struct sk_buff *
  6265. ath10k_wmi_op_gen_addba_clear_resp(struct ath10k *ar, u32 vdev_id,
  6266. const u8 *mac)
  6267. {
  6268. struct wmi_addba_clear_resp_cmd *cmd;
  6269. struct sk_buff *skb;
  6270. if (!mac)
  6271. return ERR_PTR(-EINVAL);
  6272. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6273. if (!skb)
  6274. return ERR_PTR(-ENOMEM);
  6275. cmd = (struct wmi_addba_clear_resp_cmd *)skb->data;
  6276. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6277. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  6278. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6279. "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n",
  6280. vdev_id, mac);
  6281. return skb;
  6282. }
  6283. static struct sk_buff *
  6284. ath10k_wmi_op_gen_addba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac,
  6285. u32 tid, u32 buf_size)
  6286. {
  6287. struct wmi_addba_send_cmd *cmd;
  6288. struct sk_buff *skb;
  6289. if (!mac)
  6290. return ERR_PTR(-EINVAL);
  6291. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6292. if (!skb)
  6293. return ERR_PTR(-ENOMEM);
  6294. cmd = (struct wmi_addba_send_cmd *)skb->data;
  6295. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6296. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  6297. cmd->tid = __cpu_to_le32(tid);
  6298. cmd->buffersize = __cpu_to_le32(buf_size);
  6299. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6300. "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n",
  6301. vdev_id, mac, tid, buf_size);
  6302. return skb;
  6303. }
  6304. static struct sk_buff *
  6305. ath10k_wmi_op_gen_addba_set_resp(struct ath10k *ar, u32 vdev_id, const u8 *mac,
  6306. u32 tid, u32 status)
  6307. {
  6308. struct wmi_addba_setresponse_cmd *cmd;
  6309. struct sk_buff *skb;
  6310. if (!mac)
  6311. return ERR_PTR(-EINVAL);
  6312. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6313. if (!skb)
  6314. return ERR_PTR(-ENOMEM);
  6315. cmd = (struct wmi_addba_setresponse_cmd *)skb->data;
  6316. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6317. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  6318. cmd->tid = __cpu_to_le32(tid);
  6319. cmd->statuscode = __cpu_to_le32(status);
  6320. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6321. "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n",
  6322. vdev_id, mac, tid, status);
  6323. return skb;
  6324. }
  6325. static struct sk_buff *
  6326. ath10k_wmi_op_gen_delba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac,
  6327. u32 tid, u32 initiator, u32 reason)
  6328. {
  6329. struct wmi_delba_send_cmd *cmd;
  6330. struct sk_buff *skb;
  6331. if (!mac)
  6332. return ERR_PTR(-EINVAL);
  6333. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6334. if (!skb)
  6335. return ERR_PTR(-ENOMEM);
  6336. cmd = (struct wmi_delba_send_cmd *)skb->data;
  6337. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6338. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  6339. cmd->tid = __cpu_to_le32(tid);
  6340. cmd->initiator = __cpu_to_le32(initiator);
  6341. cmd->reasoncode = __cpu_to_le32(reason);
  6342. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6343. "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n",
  6344. vdev_id, mac, tid, initiator, reason);
  6345. return skb;
  6346. }
  6347. static struct sk_buff *
  6348. ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config(struct ath10k *ar, u32 param)
  6349. {
  6350. struct wmi_pdev_get_tpc_config_cmd *cmd;
  6351. struct sk_buff *skb;
  6352. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6353. if (!skb)
  6354. return ERR_PTR(-ENOMEM);
  6355. cmd = (struct wmi_pdev_get_tpc_config_cmd *)skb->data;
  6356. cmd->param = __cpu_to_le32(param);
  6357. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6358. "wmi pdev get tcp config param:%d\n", param);
  6359. return skb;
  6360. }
  6361. size_t ath10k_wmi_fw_stats_num_peers(struct list_head *head)
  6362. {
  6363. struct ath10k_fw_stats_peer *i;
  6364. size_t num = 0;
  6365. list_for_each_entry(i, head, list)
  6366. ++num;
  6367. return num;
  6368. }
  6369. size_t ath10k_wmi_fw_stats_num_vdevs(struct list_head *head)
  6370. {
  6371. struct ath10k_fw_stats_vdev *i;
  6372. size_t num = 0;
  6373. list_for_each_entry(i, head, list)
  6374. ++num;
  6375. return num;
  6376. }
  6377. static void
  6378. ath10k_wmi_fw_pdev_base_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
  6379. char *buf, u32 *length)
  6380. {
  6381. u32 len = *length;
  6382. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6383. len += scnprintf(buf + len, buf_len - len, "\n");
  6384. len += scnprintf(buf + len, buf_len - len, "%30s\n",
  6385. "ath10k PDEV stats");
  6386. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6387. "=================");
  6388. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6389. "Channel noise floor", pdev->ch_noise_floor);
  6390. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6391. "Channel TX power", pdev->chan_tx_power);
  6392. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6393. "TX frame count", pdev->tx_frame_count);
  6394. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6395. "RX frame count", pdev->rx_frame_count);
  6396. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6397. "RX clear count", pdev->rx_clear_count);
  6398. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6399. "Cycle count", pdev->cycle_count);
  6400. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6401. "PHY error count", pdev->phy_err_count);
  6402. *length = len;
  6403. }
  6404. static void
  6405. ath10k_wmi_fw_pdev_extra_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
  6406. char *buf, u32 *length)
  6407. {
  6408. u32 len = *length;
  6409. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6410. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6411. "RTS bad count", pdev->rts_bad);
  6412. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6413. "RTS good count", pdev->rts_good);
  6414. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6415. "FCS bad count", pdev->fcs_bad);
  6416. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6417. "No beacon count", pdev->no_beacons);
  6418. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6419. "MIB int count", pdev->mib_int_count);
  6420. len += scnprintf(buf + len, buf_len - len, "\n");
  6421. *length = len;
  6422. }
  6423. static void
  6424. ath10k_wmi_fw_pdev_tx_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
  6425. char *buf, u32 *length)
  6426. {
  6427. u32 len = *length;
  6428. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6429. len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
  6430. "ath10k PDEV TX stats");
  6431. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6432. "=================");
  6433. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6434. "HTT cookies queued", pdev->comp_queued);
  6435. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6436. "HTT cookies disp.", pdev->comp_delivered);
  6437. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6438. "MSDU queued", pdev->msdu_enqued);
  6439. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6440. "MPDU queued", pdev->mpdu_enqued);
  6441. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6442. "MSDUs dropped", pdev->wmm_drop);
  6443. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6444. "Local enqued", pdev->local_enqued);
  6445. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6446. "Local freed", pdev->local_freed);
  6447. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6448. "HW queued", pdev->hw_queued);
  6449. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6450. "PPDUs reaped", pdev->hw_reaped);
  6451. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6452. "Num underruns", pdev->underrun);
  6453. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6454. "PPDUs cleaned", pdev->tx_abort);
  6455. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6456. "MPDUs requed", pdev->mpdus_requed);
  6457. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6458. "Excessive retries", pdev->tx_ko);
  6459. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6460. "HW rate", pdev->data_rc);
  6461. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6462. "Sched self tiggers", pdev->self_triggers);
  6463. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6464. "Dropped due to SW retries",
  6465. pdev->sw_retry_failure);
  6466. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6467. "Illegal rate phy errors",
  6468. pdev->illgl_rate_phy_err);
  6469. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6470. "Pdev continuous xretry", pdev->pdev_cont_xretry);
  6471. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6472. "TX timeout", pdev->pdev_tx_timeout);
  6473. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6474. "PDEV resets", pdev->pdev_resets);
  6475. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6476. "PHY underrun", pdev->phy_underrun);
  6477. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6478. "MPDU is more than txop limit", pdev->txop_ovf);
  6479. *length = len;
  6480. }
  6481. static void
  6482. ath10k_wmi_fw_pdev_rx_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
  6483. char *buf, u32 *length)
  6484. {
  6485. u32 len = *length;
  6486. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6487. len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
  6488. "ath10k PDEV RX stats");
  6489. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6490. "=================");
  6491. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6492. "Mid PPDU route change",
  6493. pdev->mid_ppdu_route_change);
  6494. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6495. "Tot. number of statuses", pdev->status_rcvd);
  6496. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6497. "Extra frags on rings 0", pdev->r0_frags);
  6498. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6499. "Extra frags on rings 1", pdev->r1_frags);
  6500. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6501. "Extra frags on rings 2", pdev->r2_frags);
  6502. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6503. "Extra frags on rings 3", pdev->r3_frags);
  6504. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6505. "MSDUs delivered to HTT", pdev->htt_msdus);
  6506. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6507. "MPDUs delivered to HTT", pdev->htt_mpdus);
  6508. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6509. "MSDUs delivered to stack", pdev->loc_msdus);
  6510. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6511. "MPDUs delivered to stack", pdev->loc_mpdus);
  6512. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6513. "Oversized AMSUs", pdev->oversize_amsdu);
  6514. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6515. "PHY errors", pdev->phy_errs);
  6516. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6517. "PHY errors drops", pdev->phy_err_drop);
  6518. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6519. "MPDU errors (FCS, MIC, ENC)", pdev->mpdu_errs);
  6520. *length = len;
  6521. }
  6522. static void
  6523. ath10k_wmi_fw_vdev_stats_fill(const struct ath10k_fw_stats_vdev *vdev,
  6524. char *buf, u32 *length)
  6525. {
  6526. u32 len = *length;
  6527. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6528. int i;
  6529. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6530. "vdev id", vdev->vdev_id);
  6531. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6532. "beacon snr", vdev->beacon_snr);
  6533. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6534. "data snr", vdev->data_snr);
  6535. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6536. "num rx frames", vdev->num_rx_frames);
  6537. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6538. "num rts fail", vdev->num_rts_fail);
  6539. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6540. "num rts success", vdev->num_rts_success);
  6541. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6542. "num rx err", vdev->num_rx_err);
  6543. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6544. "num rx discard", vdev->num_rx_discard);
  6545. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6546. "num tx not acked", vdev->num_tx_not_acked);
  6547. for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames); i++)
  6548. len += scnprintf(buf + len, buf_len - len,
  6549. "%25s [%02d] %u\n",
  6550. "num tx frames", i,
  6551. vdev->num_tx_frames[i]);
  6552. for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames_retries); i++)
  6553. len += scnprintf(buf + len, buf_len - len,
  6554. "%25s [%02d] %u\n",
  6555. "num tx frames retries", i,
  6556. vdev->num_tx_frames_retries[i]);
  6557. for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames_failures); i++)
  6558. len += scnprintf(buf + len, buf_len - len,
  6559. "%25s [%02d] %u\n",
  6560. "num tx frames failures", i,
  6561. vdev->num_tx_frames_failures[i]);
  6562. for (i = 0 ; i < ARRAY_SIZE(vdev->tx_rate_history); i++)
  6563. len += scnprintf(buf + len, buf_len - len,
  6564. "%25s [%02d] 0x%08x\n",
  6565. "tx rate history", i,
  6566. vdev->tx_rate_history[i]);
  6567. for (i = 0 ; i < ARRAY_SIZE(vdev->beacon_rssi_history); i++)
  6568. len += scnprintf(buf + len, buf_len - len,
  6569. "%25s [%02d] %u\n",
  6570. "beacon rssi history", i,
  6571. vdev->beacon_rssi_history[i]);
  6572. len += scnprintf(buf + len, buf_len - len, "\n");
  6573. *length = len;
  6574. }
  6575. static void
  6576. ath10k_wmi_fw_peer_stats_fill(const struct ath10k_fw_stats_peer *peer,
  6577. char *buf, u32 *length)
  6578. {
  6579. u32 len = *length;
  6580. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6581. len += scnprintf(buf + len, buf_len - len, "%30s %pM\n",
  6582. "Peer MAC address", peer->peer_macaddr);
  6583. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6584. "Peer RSSI", peer->peer_rssi);
  6585. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6586. "Peer TX rate", peer->peer_tx_rate);
  6587. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6588. "Peer RX rate", peer->peer_rx_rate);
  6589. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6590. "Peer RX duration", peer->rx_duration);
  6591. len += scnprintf(buf + len, buf_len - len, "\n");
  6592. *length = len;
  6593. }
  6594. void ath10k_wmi_main_op_fw_stats_fill(struct ath10k *ar,
  6595. struct ath10k_fw_stats *fw_stats,
  6596. char *buf)
  6597. {
  6598. u32 len = 0;
  6599. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6600. const struct ath10k_fw_stats_pdev *pdev;
  6601. const struct ath10k_fw_stats_vdev *vdev;
  6602. const struct ath10k_fw_stats_peer *peer;
  6603. size_t num_peers;
  6604. size_t num_vdevs;
  6605. spin_lock_bh(&ar->data_lock);
  6606. pdev = list_first_entry_or_null(&fw_stats->pdevs,
  6607. struct ath10k_fw_stats_pdev, list);
  6608. if (!pdev) {
  6609. ath10k_warn(ar, "failed to get pdev stats\n");
  6610. goto unlock;
  6611. }
  6612. num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
  6613. num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
  6614. ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
  6615. ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
  6616. ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
  6617. len += scnprintf(buf + len, buf_len - len, "\n");
  6618. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  6619. "ath10k VDEV stats", num_vdevs);
  6620. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6621. "=================");
  6622. list_for_each_entry(vdev, &fw_stats->vdevs, list) {
  6623. ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
  6624. }
  6625. len += scnprintf(buf + len, buf_len - len, "\n");
  6626. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  6627. "ath10k PEER stats", num_peers);
  6628. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6629. "=================");
  6630. list_for_each_entry(peer, &fw_stats->peers, list) {
  6631. ath10k_wmi_fw_peer_stats_fill(peer, buf, &len);
  6632. }
  6633. unlock:
  6634. spin_unlock_bh(&ar->data_lock);
  6635. if (len >= buf_len)
  6636. buf[len - 1] = 0;
  6637. else
  6638. buf[len] = 0;
  6639. }
  6640. void ath10k_wmi_10x_op_fw_stats_fill(struct ath10k *ar,
  6641. struct ath10k_fw_stats *fw_stats,
  6642. char *buf)
  6643. {
  6644. unsigned int len = 0;
  6645. unsigned int buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6646. const struct ath10k_fw_stats_pdev *pdev;
  6647. const struct ath10k_fw_stats_vdev *vdev;
  6648. const struct ath10k_fw_stats_peer *peer;
  6649. size_t num_peers;
  6650. size_t num_vdevs;
  6651. spin_lock_bh(&ar->data_lock);
  6652. pdev = list_first_entry_or_null(&fw_stats->pdevs,
  6653. struct ath10k_fw_stats_pdev, list);
  6654. if (!pdev) {
  6655. ath10k_warn(ar, "failed to get pdev stats\n");
  6656. goto unlock;
  6657. }
  6658. num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
  6659. num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
  6660. ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
  6661. ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len);
  6662. ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
  6663. ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
  6664. len += scnprintf(buf + len, buf_len - len, "\n");
  6665. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  6666. "ath10k VDEV stats", num_vdevs);
  6667. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6668. "=================");
  6669. list_for_each_entry(vdev, &fw_stats->vdevs, list) {
  6670. ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
  6671. }
  6672. len += scnprintf(buf + len, buf_len - len, "\n");
  6673. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  6674. "ath10k PEER stats", num_peers);
  6675. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6676. "=================");
  6677. list_for_each_entry(peer, &fw_stats->peers, list) {
  6678. ath10k_wmi_fw_peer_stats_fill(peer, buf, &len);
  6679. }
  6680. unlock:
  6681. spin_unlock_bh(&ar->data_lock);
  6682. if (len >= buf_len)
  6683. buf[len - 1] = 0;
  6684. else
  6685. buf[len] = 0;
  6686. }
  6687. static struct sk_buff *
  6688. ath10k_wmi_op_gen_pdev_enable_adaptive_cca(struct ath10k *ar, u8 enable,
  6689. u32 detect_level, u32 detect_margin)
  6690. {
  6691. struct wmi_pdev_set_adaptive_cca_params *cmd;
  6692. struct sk_buff *skb;
  6693. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6694. if (!skb)
  6695. return ERR_PTR(-ENOMEM);
  6696. cmd = (struct wmi_pdev_set_adaptive_cca_params *)skb->data;
  6697. cmd->enable = __cpu_to_le32(enable);
  6698. cmd->cca_detect_level = __cpu_to_le32(detect_level);
  6699. cmd->cca_detect_margin = __cpu_to_le32(detect_margin);
  6700. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6701. "wmi pdev set adaptive cca params enable:%d detection level:%d detection margin:%d\n",
  6702. enable, detect_level, detect_margin);
  6703. return skb;
  6704. }
  6705. void ath10k_wmi_10_4_op_fw_stats_fill(struct ath10k *ar,
  6706. struct ath10k_fw_stats *fw_stats,
  6707. char *buf)
  6708. {
  6709. u32 len = 0;
  6710. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6711. const struct ath10k_fw_stats_pdev *pdev;
  6712. const struct ath10k_fw_stats_vdev *vdev;
  6713. const struct ath10k_fw_stats_peer *peer;
  6714. size_t num_peers;
  6715. size_t num_vdevs;
  6716. spin_lock_bh(&ar->data_lock);
  6717. pdev = list_first_entry_or_null(&fw_stats->pdevs,
  6718. struct ath10k_fw_stats_pdev, list);
  6719. if (!pdev) {
  6720. ath10k_warn(ar, "failed to get pdev stats\n");
  6721. goto unlock;
  6722. }
  6723. num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
  6724. num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
  6725. ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
  6726. ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len);
  6727. ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
  6728. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6729. "HW paused", pdev->hw_paused);
  6730. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6731. "Seqs posted", pdev->seq_posted);
  6732. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6733. "Seqs failed queueing", pdev->seq_failed_queueing);
  6734. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6735. "Seqs completed", pdev->seq_completed);
  6736. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6737. "Seqs restarted", pdev->seq_restarted);
  6738. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6739. "MU Seqs posted", pdev->mu_seq_posted);
  6740. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6741. "MPDUs SW flushed", pdev->mpdus_sw_flush);
  6742. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6743. "MPDUs HW filtered", pdev->mpdus_hw_filter);
  6744. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6745. "MPDUs truncated", pdev->mpdus_truncated);
  6746. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6747. "MPDUs receive no ACK", pdev->mpdus_ack_failed);
  6748. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6749. "MPDUs expired", pdev->mpdus_expired);
  6750. ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
  6751. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6752. "Num Rx Overflow errors", pdev->rx_ovfl_errs);
  6753. len += scnprintf(buf + len, buf_len - len, "\n");
  6754. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  6755. "ath10k VDEV stats", num_vdevs);
  6756. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6757. "=================");
  6758. list_for_each_entry(vdev, &fw_stats->vdevs, list) {
  6759. ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
  6760. }
  6761. len += scnprintf(buf + len, buf_len - len, "\n");
  6762. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  6763. "ath10k PEER stats", num_peers);
  6764. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6765. "=================");
  6766. list_for_each_entry(peer, &fw_stats->peers, list) {
  6767. ath10k_wmi_fw_peer_stats_fill(peer, buf, &len);
  6768. }
  6769. unlock:
  6770. spin_unlock_bh(&ar->data_lock);
  6771. if (len >= buf_len)
  6772. buf[len - 1] = 0;
  6773. else
  6774. buf[len] = 0;
  6775. }
  6776. int ath10k_wmi_op_get_vdev_subtype(struct ath10k *ar,
  6777. enum wmi_vdev_subtype subtype)
  6778. {
  6779. switch (subtype) {
  6780. case WMI_VDEV_SUBTYPE_NONE:
  6781. return WMI_VDEV_SUBTYPE_LEGACY_NONE;
  6782. case WMI_VDEV_SUBTYPE_P2P_DEVICE:
  6783. return WMI_VDEV_SUBTYPE_LEGACY_P2P_DEV;
  6784. case WMI_VDEV_SUBTYPE_P2P_CLIENT:
  6785. return WMI_VDEV_SUBTYPE_LEGACY_P2P_CLI;
  6786. case WMI_VDEV_SUBTYPE_P2P_GO:
  6787. return WMI_VDEV_SUBTYPE_LEGACY_P2P_GO;
  6788. case WMI_VDEV_SUBTYPE_PROXY_STA:
  6789. return WMI_VDEV_SUBTYPE_LEGACY_PROXY_STA;
  6790. case WMI_VDEV_SUBTYPE_MESH_11S:
  6791. case WMI_VDEV_SUBTYPE_MESH_NON_11S:
  6792. return -ENOTSUPP;
  6793. }
  6794. return -ENOTSUPP;
  6795. }
  6796. static int ath10k_wmi_10_2_4_op_get_vdev_subtype(struct ath10k *ar,
  6797. enum wmi_vdev_subtype subtype)
  6798. {
  6799. switch (subtype) {
  6800. case WMI_VDEV_SUBTYPE_NONE:
  6801. return WMI_VDEV_SUBTYPE_10_2_4_NONE;
  6802. case WMI_VDEV_SUBTYPE_P2P_DEVICE:
  6803. return WMI_VDEV_SUBTYPE_10_2_4_P2P_DEV;
  6804. case WMI_VDEV_SUBTYPE_P2P_CLIENT:
  6805. return WMI_VDEV_SUBTYPE_10_2_4_P2P_CLI;
  6806. case WMI_VDEV_SUBTYPE_P2P_GO:
  6807. return WMI_VDEV_SUBTYPE_10_2_4_P2P_GO;
  6808. case WMI_VDEV_SUBTYPE_PROXY_STA:
  6809. return WMI_VDEV_SUBTYPE_10_2_4_PROXY_STA;
  6810. case WMI_VDEV_SUBTYPE_MESH_11S:
  6811. return WMI_VDEV_SUBTYPE_10_2_4_MESH_11S;
  6812. case WMI_VDEV_SUBTYPE_MESH_NON_11S:
  6813. return -ENOTSUPP;
  6814. }
  6815. return -ENOTSUPP;
  6816. }
  6817. static int ath10k_wmi_10_4_op_get_vdev_subtype(struct ath10k *ar,
  6818. enum wmi_vdev_subtype subtype)
  6819. {
  6820. switch (subtype) {
  6821. case WMI_VDEV_SUBTYPE_NONE:
  6822. return WMI_VDEV_SUBTYPE_10_4_NONE;
  6823. case WMI_VDEV_SUBTYPE_P2P_DEVICE:
  6824. return WMI_VDEV_SUBTYPE_10_4_P2P_DEV;
  6825. case WMI_VDEV_SUBTYPE_P2P_CLIENT:
  6826. return WMI_VDEV_SUBTYPE_10_4_P2P_CLI;
  6827. case WMI_VDEV_SUBTYPE_P2P_GO:
  6828. return WMI_VDEV_SUBTYPE_10_4_P2P_GO;
  6829. case WMI_VDEV_SUBTYPE_PROXY_STA:
  6830. return WMI_VDEV_SUBTYPE_10_4_PROXY_STA;
  6831. case WMI_VDEV_SUBTYPE_MESH_11S:
  6832. return WMI_VDEV_SUBTYPE_10_4_MESH_11S;
  6833. case WMI_VDEV_SUBTYPE_MESH_NON_11S:
  6834. return WMI_VDEV_SUBTYPE_10_4_MESH_NON_11S;
  6835. }
  6836. return -ENOTSUPP;
  6837. }
  6838. static struct sk_buff *
  6839. ath10k_wmi_10_4_ext_resource_config(struct ath10k *ar,
  6840. enum wmi_host_platform_type type,
  6841. u32 fw_feature_bitmap)
  6842. {
  6843. struct wmi_ext_resource_config_10_4_cmd *cmd;
  6844. struct sk_buff *skb;
  6845. u32 num_tdls_sleep_sta = 0;
  6846. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6847. if (!skb)
  6848. return ERR_PTR(-ENOMEM);
  6849. if (test_bit(WMI_SERVICE_TDLS_UAPSD_SLEEP_STA, ar->wmi.svc_map))
  6850. num_tdls_sleep_sta = TARGET_10_4_NUM_TDLS_SLEEP_STA;
  6851. cmd = (struct wmi_ext_resource_config_10_4_cmd *)skb->data;
  6852. cmd->host_platform_config = __cpu_to_le32(type);
  6853. cmd->fw_feature_bitmap = __cpu_to_le32(fw_feature_bitmap);
  6854. cmd->wlan_gpio_priority = __cpu_to_le32(-1);
  6855. cmd->coex_version = __cpu_to_le32(WMI_NO_COEX_VERSION_SUPPORT);
  6856. cmd->coex_gpio_pin1 = __cpu_to_le32(-1);
  6857. cmd->coex_gpio_pin2 = __cpu_to_le32(-1);
  6858. cmd->coex_gpio_pin3 = __cpu_to_le32(-1);
  6859. cmd->num_tdls_vdevs = __cpu_to_le32(TARGET_10_4_NUM_TDLS_VDEVS);
  6860. cmd->num_tdls_conn_table_entries = __cpu_to_le32(20);
  6861. cmd->max_tdls_concurrent_sleep_sta = __cpu_to_le32(num_tdls_sleep_sta);
  6862. cmd->max_tdls_concurrent_buffer_sta =
  6863. __cpu_to_le32(TARGET_10_4_NUM_TDLS_BUFFER_STA);
  6864. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6865. "wmi ext resource config host type %d firmware feature bitmap %08x\n",
  6866. type, fw_feature_bitmap);
  6867. return skb;
  6868. }
  6869. static struct sk_buff *
  6870. ath10k_wmi_10_4_gen_update_fw_tdls_state(struct ath10k *ar, u32 vdev_id,
  6871. enum wmi_tdls_state state)
  6872. {
  6873. struct wmi_10_4_tdls_set_state_cmd *cmd;
  6874. struct sk_buff *skb;
  6875. u32 options = 0;
  6876. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6877. if (!skb)
  6878. return ERR_PTR(-ENOMEM);
  6879. if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY, ar->wmi.svc_map) &&
  6880. state == WMI_TDLS_ENABLE_ACTIVE)
  6881. state = WMI_TDLS_ENABLE_PASSIVE;
  6882. if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA, ar->wmi.svc_map))
  6883. options |= WMI_TDLS_BUFFER_STA_EN;
  6884. cmd = (struct wmi_10_4_tdls_set_state_cmd *)skb->data;
  6885. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6886. cmd->state = __cpu_to_le32(state);
  6887. cmd->notification_interval_ms = __cpu_to_le32(5000);
  6888. cmd->tx_discovery_threshold = __cpu_to_le32(100);
  6889. cmd->tx_teardown_threshold = __cpu_to_le32(5);
  6890. cmd->rssi_teardown_threshold = __cpu_to_le32(-75);
  6891. cmd->rssi_delta = __cpu_to_le32(-20);
  6892. cmd->tdls_options = __cpu_to_le32(options);
  6893. cmd->tdls_peer_traffic_ind_window = __cpu_to_le32(2);
  6894. cmd->tdls_peer_traffic_response_timeout_ms = __cpu_to_le32(5000);
  6895. cmd->tdls_puapsd_mask = __cpu_to_le32(0xf);
  6896. cmd->tdls_puapsd_inactivity_time_ms = __cpu_to_le32(0);
  6897. cmd->tdls_puapsd_rx_frame_threshold = __cpu_to_le32(10);
  6898. cmd->teardown_notification_ms = __cpu_to_le32(10);
  6899. cmd->tdls_peer_kickout_threshold = __cpu_to_le32(96);
  6900. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi update fw tdls state %d for vdev %i\n",
  6901. state, vdev_id);
  6902. return skb;
  6903. }
  6904. static u32 ath10k_wmi_prepare_peer_qos(u8 uapsd_queues, u8 sp)
  6905. {
  6906. u32 peer_qos = 0;
  6907. if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_VO)
  6908. peer_qos |= WMI_TDLS_PEER_QOS_AC_VO;
  6909. if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_VI)
  6910. peer_qos |= WMI_TDLS_PEER_QOS_AC_VI;
  6911. if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_BK)
  6912. peer_qos |= WMI_TDLS_PEER_QOS_AC_BK;
  6913. if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_BE)
  6914. peer_qos |= WMI_TDLS_PEER_QOS_AC_BE;
  6915. peer_qos |= SM(sp, WMI_TDLS_PEER_SP);
  6916. return peer_qos;
  6917. }
  6918. static struct sk_buff *
  6919. ath10k_wmi_10_4_gen_tdls_peer_update(struct ath10k *ar,
  6920. const struct wmi_tdls_peer_update_cmd_arg *arg,
  6921. const struct wmi_tdls_peer_capab_arg *cap,
  6922. const struct wmi_channel_arg *chan_arg)
  6923. {
  6924. struct wmi_10_4_tdls_peer_update_cmd *cmd;
  6925. struct wmi_tdls_peer_capabilities *peer_cap;
  6926. struct wmi_channel *chan;
  6927. struct sk_buff *skb;
  6928. u32 peer_qos;
  6929. int len, chan_len;
  6930. int i;
  6931. /* tdls peer update cmd has place holder for one channel*/
  6932. chan_len = cap->peer_chan_len ? (cap->peer_chan_len - 1) : 0;
  6933. len = sizeof(*cmd) + chan_len * sizeof(*chan);
  6934. skb = ath10k_wmi_alloc_skb(ar, len);
  6935. if (!skb)
  6936. return ERR_PTR(-ENOMEM);
  6937. memset(skb->data, 0, sizeof(*cmd));
  6938. cmd = (struct wmi_10_4_tdls_peer_update_cmd *)skb->data;
  6939. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  6940. ether_addr_copy(cmd->peer_macaddr.addr, arg->addr);
  6941. cmd->peer_state = __cpu_to_le32(arg->peer_state);
  6942. peer_qos = ath10k_wmi_prepare_peer_qos(cap->peer_uapsd_queues,
  6943. cap->peer_max_sp);
  6944. peer_cap = &cmd->peer_capab;
  6945. peer_cap->peer_qos = __cpu_to_le32(peer_qos);
  6946. peer_cap->buff_sta_support = __cpu_to_le32(cap->buff_sta_support);
  6947. peer_cap->off_chan_support = __cpu_to_le32(cap->off_chan_support);
  6948. peer_cap->peer_curr_operclass = __cpu_to_le32(cap->peer_curr_operclass);
  6949. peer_cap->self_curr_operclass = __cpu_to_le32(cap->self_curr_operclass);
  6950. peer_cap->peer_chan_len = __cpu_to_le32(cap->peer_chan_len);
  6951. peer_cap->peer_operclass_len = __cpu_to_le32(cap->peer_operclass_len);
  6952. for (i = 0; i < WMI_TDLS_MAX_SUPP_OPER_CLASSES; i++)
  6953. peer_cap->peer_operclass[i] = cap->peer_operclass[i];
  6954. peer_cap->is_peer_responder = __cpu_to_le32(cap->is_peer_responder);
  6955. peer_cap->pref_offchan_num = __cpu_to_le32(cap->pref_offchan_num);
  6956. peer_cap->pref_offchan_bw = __cpu_to_le32(cap->pref_offchan_bw);
  6957. for (i = 0; i < cap->peer_chan_len; i++) {
  6958. chan = (struct wmi_channel *)&peer_cap->peer_chan_list[i];
  6959. ath10k_wmi_put_wmi_channel(chan, &chan_arg[i]);
  6960. }
  6961. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6962. "wmi tdls peer update vdev %i state %d n_chans %u\n",
  6963. arg->vdev_id, arg->peer_state, cap->peer_chan_len);
  6964. return skb;
  6965. }
  6966. static struct sk_buff *
  6967. ath10k_wmi_op_gen_echo(struct ath10k *ar, u32 value)
  6968. {
  6969. struct wmi_echo_cmd *cmd;
  6970. struct sk_buff *skb;
  6971. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6972. if (!skb)
  6973. return ERR_PTR(-ENOMEM);
  6974. cmd = (struct wmi_echo_cmd *)skb->data;
  6975. cmd->value = cpu_to_le32(value);
  6976. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6977. "wmi echo value 0x%08x\n", value);
  6978. return skb;
  6979. }
  6980. int
  6981. ath10k_wmi_barrier(struct ath10k *ar)
  6982. {
  6983. int ret;
  6984. int time_left;
  6985. spin_lock_bh(&ar->data_lock);
  6986. reinit_completion(&ar->wmi.barrier);
  6987. spin_unlock_bh(&ar->data_lock);
  6988. ret = ath10k_wmi_echo(ar, ATH10K_WMI_BARRIER_ECHO_ID);
  6989. if (ret) {
  6990. ath10k_warn(ar, "failed to submit wmi echo: %d\n", ret);
  6991. return ret;
  6992. }
  6993. time_left = wait_for_completion_timeout(&ar->wmi.barrier,
  6994. ATH10K_WMI_BARRIER_TIMEOUT_HZ);
  6995. if (!time_left)
  6996. return -ETIMEDOUT;
  6997. return 0;
  6998. }
  6999. static const struct wmi_ops wmi_ops = {
  7000. .rx = ath10k_wmi_op_rx,
  7001. .map_svc = wmi_main_svc_map,
  7002. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  7003. .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
  7004. .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
  7005. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  7006. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  7007. .pull_swba = ath10k_wmi_op_pull_swba_ev,
  7008. .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
  7009. .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
  7010. .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev,
  7011. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  7012. .pull_fw_stats = ath10k_wmi_main_op_pull_fw_stats,
  7013. .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
  7014. .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
  7015. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  7016. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  7017. .gen_pdev_set_rd = ath10k_wmi_op_gen_pdev_set_rd,
  7018. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  7019. .gen_init = ath10k_wmi_op_gen_init,
  7020. .gen_start_scan = ath10k_wmi_op_gen_start_scan,
  7021. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  7022. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  7023. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  7024. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  7025. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  7026. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  7027. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  7028. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  7029. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  7030. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  7031. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  7032. /* .gen_vdev_wmm_conf not implemented */
  7033. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  7034. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  7035. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  7036. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  7037. .gen_peer_assoc = ath10k_wmi_op_gen_peer_assoc,
  7038. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  7039. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  7040. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  7041. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  7042. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  7043. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  7044. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  7045. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  7046. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  7047. .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
  7048. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  7049. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  7050. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  7051. /* .gen_pdev_get_temperature not implemented */
  7052. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  7053. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  7054. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  7055. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  7056. .fw_stats_fill = ath10k_wmi_main_op_fw_stats_fill,
  7057. .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
  7058. .gen_echo = ath10k_wmi_op_gen_echo,
  7059. /* .gen_bcn_tmpl not implemented */
  7060. /* .gen_prb_tmpl not implemented */
  7061. /* .gen_p2p_go_bcn_ie not implemented */
  7062. /* .gen_adaptive_qcs not implemented */
  7063. /* .gen_pdev_enable_adaptive_cca not implemented */
  7064. };
  7065. static const struct wmi_ops wmi_10_1_ops = {
  7066. .rx = ath10k_wmi_10_1_op_rx,
  7067. .map_svc = wmi_10x_svc_map,
  7068. .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
  7069. .pull_fw_stats = ath10k_wmi_10x_op_pull_fw_stats,
  7070. .gen_init = ath10k_wmi_10_1_op_gen_init,
  7071. .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
  7072. .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
  7073. .gen_peer_assoc = ath10k_wmi_10_1_op_gen_peer_assoc,
  7074. /* .gen_pdev_get_temperature not implemented */
  7075. /* shared with main branch */
  7076. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  7077. .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
  7078. .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
  7079. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  7080. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  7081. .pull_swba = ath10k_wmi_op_pull_swba_ev,
  7082. .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
  7083. .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
  7084. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  7085. .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
  7086. .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
  7087. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  7088. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  7089. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  7090. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  7091. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  7092. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  7093. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  7094. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  7095. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  7096. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  7097. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  7098. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  7099. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  7100. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  7101. /* .gen_vdev_wmm_conf not implemented */
  7102. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  7103. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  7104. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  7105. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  7106. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  7107. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  7108. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  7109. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  7110. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  7111. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  7112. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  7113. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  7114. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  7115. .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
  7116. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  7117. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  7118. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  7119. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  7120. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  7121. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  7122. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  7123. .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
  7124. .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
  7125. .gen_echo = ath10k_wmi_op_gen_echo,
  7126. /* .gen_bcn_tmpl not implemented */
  7127. /* .gen_prb_tmpl not implemented */
  7128. /* .gen_p2p_go_bcn_ie not implemented */
  7129. /* .gen_adaptive_qcs not implemented */
  7130. /* .gen_pdev_enable_adaptive_cca not implemented */
  7131. };
  7132. static const struct wmi_ops wmi_10_2_ops = {
  7133. .rx = ath10k_wmi_10_2_op_rx,
  7134. .pull_fw_stats = ath10k_wmi_10_2_op_pull_fw_stats,
  7135. .gen_init = ath10k_wmi_10_2_op_gen_init,
  7136. .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
  7137. /* .gen_pdev_get_temperature not implemented */
  7138. /* shared with 10.1 */
  7139. .map_svc = wmi_10x_svc_map,
  7140. .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
  7141. .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
  7142. .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
  7143. .gen_echo = ath10k_wmi_op_gen_echo,
  7144. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  7145. .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
  7146. .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
  7147. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  7148. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  7149. .pull_swba = ath10k_wmi_op_pull_swba_ev,
  7150. .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
  7151. .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
  7152. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  7153. .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
  7154. .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
  7155. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  7156. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  7157. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  7158. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  7159. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  7160. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  7161. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  7162. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  7163. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  7164. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  7165. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  7166. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  7167. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  7168. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  7169. /* .gen_vdev_wmm_conf not implemented */
  7170. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  7171. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  7172. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  7173. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  7174. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  7175. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  7176. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  7177. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  7178. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  7179. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  7180. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  7181. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  7182. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  7183. .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
  7184. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  7185. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  7186. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  7187. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  7188. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  7189. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  7190. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  7191. .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
  7192. .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
  7193. /* .gen_pdev_enable_adaptive_cca not implemented */
  7194. };
  7195. static const struct wmi_ops wmi_10_2_4_ops = {
  7196. .rx = ath10k_wmi_10_2_op_rx,
  7197. .pull_fw_stats = ath10k_wmi_10_2_4_op_pull_fw_stats,
  7198. .gen_init = ath10k_wmi_10_2_op_gen_init,
  7199. .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
  7200. .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature,
  7201. .gen_pdev_bss_chan_info_req = ath10k_wmi_10_2_op_gen_pdev_bss_chan_info,
  7202. /* shared with 10.1 */
  7203. .map_svc = wmi_10x_svc_map,
  7204. .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
  7205. .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
  7206. .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
  7207. .gen_echo = ath10k_wmi_op_gen_echo,
  7208. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  7209. .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
  7210. .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
  7211. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  7212. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  7213. .pull_swba = ath10k_wmi_10_2_4_op_pull_swba_ev,
  7214. .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
  7215. .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
  7216. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  7217. .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
  7218. .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
  7219. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  7220. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  7221. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  7222. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  7223. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  7224. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  7225. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  7226. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  7227. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  7228. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  7229. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  7230. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  7231. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  7232. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  7233. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  7234. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  7235. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  7236. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  7237. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  7238. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  7239. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  7240. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  7241. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  7242. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  7243. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  7244. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  7245. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  7246. .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
  7247. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  7248. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  7249. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  7250. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  7251. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  7252. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  7253. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  7254. .gen_pdev_get_tpc_config = ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config,
  7255. .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
  7256. .gen_pdev_enable_adaptive_cca =
  7257. ath10k_wmi_op_gen_pdev_enable_adaptive_cca,
  7258. .get_vdev_subtype = ath10k_wmi_10_2_4_op_get_vdev_subtype,
  7259. /* .gen_bcn_tmpl not implemented */
  7260. /* .gen_prb_tmpl not implemented */
  7261. /* .gen_p2p_go_bcn_ie not implemented */
  7262. /* .gen_adaptive_qcs not implemented */
  7263. };
  7264. static const struct wmi_ops wmi_10_4_ops = {
  7265. .rx = ath10k_wmi_10_4_op_rx,
  7266. .map_svc = wmi_10_4_svc_map,
  7267. .pull_fw_stats = ath10k_wmi_10_4_op_pull_fw_stats,
  7268. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  7269. .pull_mgmt_rx = ath10k_wmi_10_4_op_pull_mgmt_rx_ev,
  7270. .pull_ch_info = ath10k_wmi_10_4_op_pull_ch_info_ev,
  7271. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  7272. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  7273. .pull_swba = ath10k_wmi_10_4_op_pull_swba_ev,
  7274. .pull_phyerr_hdr = ath10k_wmi_10_4_op_pull_phyerr_ev_hdr,
  7275. .pull_phyerr = ath10k_wmi_10_4_op_pull_phyerr_ev,
  7276. .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev,
  7277. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  7278. .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
  7279. .get_txbf_conf_scheme = ath10k_wmi_10_4_txbf_conf_scheme,
  7280. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  7281. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  7282. .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
  7283. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  7284. .gen_init = ath10k_wmi_10_4_op_gen_init,
  7285. .gen_start_scan = ath10k_wmi_op_gen_start_scan,
  7286. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  7287. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  7288. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  7289. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  7290. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  7291. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  7292. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  7293. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  7294. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  7295. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  7296. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  7297. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  7298. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  7299. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  7300. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  7301. .gen_peer_assoc = ath10k_wmi_10_4_op_gen_peer_assoc,
  7302. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  7303. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  7304. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  7305. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  7306. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  7307. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  7308. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  7309. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  7310. .gen_dbglog_cfg = ath10k_wmi_10_4_op_gen_dbglog_cfg,
  7311. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  7312. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  7313. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  7314. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  7315. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  7316. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  7317. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  7318. .fw_stats_fill = ath10k_wmi_10_4_op_fw_stats_fill,
  7319. .ext_resource_config = ath10k_wmi_10_4_ext_resource_config,
  7320. .gen_update_fw_tdls_state = ath10k_wmi_10_4_gen_update_fw_tdls_state,
  7321. .gen_tdls_peer_update = ath10k_wmi_10_4_gen_tdls_peer_update,
  7322. /* shared with 10.2 */
  7323. .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
  7324. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  7325. .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature,
  7326. .get_vdev_subtype = ath10k_wmi_10_4_op_get_vdev_subtype,
  7327. .gen_pdev_bss_chan_info_req = ath10k_wmi_10_2_op_gen_pdev_bss_chan_info,
  7328. .gen_echo = ath10k_wmi_op_gen_echo,
  7329. .gen_pdev_get_tpc_config = ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config,
  7330. };
  7331. int ath10k_wmi_attach(struct ath10k *ar)
  7332. {
  7333. switch (ar->running_fw->fw_file.wmi_op_version) {
  7334. case ATH10K_FW_WMI_OP_VERSION_10_4:
  7335. ar->wmi.ops = &wmi_10_4_ops;
  7336. ar->wmi.cmd = &wmi_10_4_cmd_map;
  7337. ar->wmi.vdev_param = &wmi_10_4_vdev_param_map;
  7338. ar->wmi.pdev_param = &wmi_10_4_pdev_param_map;
  7339. ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
  7340. break;
  7341. case ATH10K_FW_WMI_OP_VERSION_10_2_4:
  7342. ar->wmi.cmd = &wmi_10_2_4_cmd_map;
  7343. ar->wmi.ops = &wmi_10_2_4_ops;
  7344. ar->wmi.vdev_param = &wmi_10_2_4_vdev_param_map;
  7345. ar->wmi.pdev_param = &wmi_10_2_4_pdev_param_map;
  7346. ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
  7347. break;
  7348. case ATH10K_FW_WMI_OP_VERSION_10_2:
  7349. ar->wmi.cmd = &wmi_10_2_cmd_map;
  7350. ar->wmi.ops = &wmi_10_2_ops;
  7351. ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
  7352. ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
  7353. ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
  7354. break;
  7355. case ATH10K_FW_WMI_OP_VERSION_10_1:
  7356. ar->wmi.cmd = &wmi_10x_cmd_map;
  7357. ar->wmi.ops = &wmi_10_1_ops;
  7358. ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
  7359. ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
  7360. ar->wmi.peer_flags = &wmi_10x_peer_flags_map;
  7361. break;
  7362. case ATH10K_FW_WMI_OP_VERSION_MAIN:
  7363. ar->wmi.cmd = &wmi_cmd_map;
  7364. ar->wmi.ops = &wmi_ops;
  7365. ar->wmi.vdev_param = &wmi_vdev_param_map;
  7366. ar->wmi.pdev_param = &wmi_pdev_param_map;
  7367. ar->wmi.peer_flags = &wmi_peer_flags_map;
  7368. break;
  7369. case ATH10K_FW_WMI_OP_VERSION_TLV:
  7370. ath10k_wmi_tlv_attach(ar);
  7371. break;
  7372. case ATH10K_FW_WMI_OP_VERSION_UNSET:
  7373. case ATH10K_FW_WMI_OP_VERSION_MAX:
  7374. ath10k_err(ar, "unsupported WMI op version: %d\n",
  7375. ar->running_fw->fw_file.wmi_op_version);
  7376. return -EINVAL;
  7377. }
  7378. init_completion(&ar->wmi.service_ready);
  7379. init_completion(&ar->wmi.unified_ready);
  7380. init_completion(&ar->wmi.barrier);
  7381. INIT_WORK(&ar->svc_rdy_work, ath10k_wmi_event_service_ready_work);
  7382. return 0;
  7383. }
  7384. void ath10k_wmi_free_host_mem(struct ath10k *ar)
  7385. {
  7386. int i;
  7387. /* free the host memory chunks requested by firmware */
  7388. for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
  7389. dma_free_coherent(ar->dev,
  7390. ar->wmi.mem_chunks[i].len,
  7391. ar->wmi.mem_chunks[i].vaddr,
  7392. ar->wmi.mem_chunks[i].paddr);
  7393. }
  7394. ar->wmi.num_mem_chunks = 0;
  7395. }
  7396. void ath10k_wmi_detach(struct ath10k *ar)
  7397. {
  7398. cancel_work_sync(&ar->svc_rdy_work);
  7399. if (ar->svc_rdy_skb)
  7400. dev_kfree_skb(ar->svc_rdy_skb);
  7401. }