rtc-ds1343.c 15 KB

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  1. /* rtc-ds1343.c
  2. *
  3. * Driver for Dallas Semiconductor DS1343 Low Current, SPI Compatible
  4. * Real Time Clock
  5. *
  6. * Author : Raghavendra Chandra Ganiga <ravi23ganiga@gmail.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. */
  13. #include <linux/init.h>
  14. #include <linux/module.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/device.h>
  17. #include <linux/spi/spi.h>
  18. #include <linux/regmap.h>
  19. #include <linux/rtc.h>
  20. #include <linux/bcd.h>
  21. #include <linux/pm.h>
  22. #include <linux/slab.h>
  23. #define DS1343_DRV_VERSION "01.00"
  24. #define DALLAS_MAXIM_DS1343 0
  25. #define DALLAS_MAXIM_DS1344 1
  26. /* RTC DS1343 Registers */
  27. #define DS1343_SECONDS_REG 0x00
  28. #define DS1343_MINUTES_REG 0x01
  29. #define DS1343_HOURS_REG 0x02
  30. #define DS1343_DAY_REG 0x03
  31. #define DS1343_DATE_REG 0x04
  32. #define DS1343_MONTH_REG 0x05
  33. #define DS1343_YEAR_REG 0x06
  34. #define DS1343_ALM0_SEC_REG 0x07
  35. #define DS1343_ALM0_MIN_REG 0x08
  36. #define DS1343_ALM0_HOUR_REG 0x09
  37. #define DS1343_ALM0_DAY_REG 0x0A
  38. #define DS1343_ALM1_SEC_REG 0x0B
  39. #define DS1343_ALM1_MIN_REG 0x0C
  40. #define DS1343_ALM1_HOUR_REG 0x0D
  41. #define DS1343_ALM1_DAY_REG 0x0E
  42. #define DS1343_CONTROL_REG 0x0F
  43. #define DS1343_STATUS_REG 0x10
  44. #define DS1343_TRICKLE_REG 0x11
  45. /* DS1343 Control Registers bits */
  46. #define DS1343_EOSC 0x80
  47. #define DS1343_DOSF 0x20
  48. #define DS1343_EGFIL 0x10
  49. #define DS1343_SQW 0x08
  50. #define DS1343_INTCN 0x04
  51. #define DS1343_A1IE 0x02
  52. #define DS1343_A0IE 0x01
  53. /* DS1343 Status Registers bits */
  54. #define DS1343_OSF 0x80
  55. #define DS1343_IRQF1 0x02
  56. #define DS1343_IRQF0 0x01
  57. /* DS1343 Trickle Charger Registers bits */
  58. #define DS1343_TRICKLE_MAGIC 0xa0
  59. #define DS1343_TRICKLE_DS1 0x08
  60. #define DS1343_TRICKLE_1K 0x01
  61. #define DS1343_TRICKLE_2K 0x02
  62. #define DS1343_TRICKLE_4K 0x03
  63. static const struct spi_device_id ds1343_id[] = {
  64. { "ds1343", DALLAS_MAXIM_DS1343 },
  65. { "ds1344", DALLAS_MAXIM_DS1344 },
  66. { }
  67. };
  68. MODULE_DEVICE_TABLE(spi, ds1343_id);
  69. struct ds1343_priv {
  70. struct spi_device *spi;
  71. struct rtc_device *rtc;
  72. struct regmap *map;
  73. struct mutex mutex;
  74. unsigned int irqen;
  75. int alarm_sec;
  76. int alarm_min;
  77. int alarm_hour;
  78. int alarm_mday;
  79. };
  80. static int ds1343_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
  81. {
  82. switch (cmd) {
  83. #ifdef RTC_SET_CHARGE
  84. case RTC_SET_CHARGE:
  85. {
  86. int val;
  87. if (copy_from_user(&val, (int __user *)arg, sizeof(int)))
  88. return -EFAULT;
  89. return regmap_write(priv->map, DS1343_TRICKLE_REG, val);
  90. }
  91. break;
  92. #endif
  93. }
  94. return -ENOIOCTLCMD;
  95. }
  96. static ssize_t ds1343_show_glitchfilter(struct device *dev,
  97. struct device_attribute *attr, char *buf)
  98. {
  99. struct ds1343_priv *priv = dev_get_drvdata(dev);
  100. int glitch_filt_status, data;
  101. regmap_read(priv->map, DS1343_CONTROL_REG, &data);
  102. glitch_filt_status = !!(data & DS1343_EGFIL);
  103. if (glitch_filt_status)
  104. return sprintf(buf, "enabled\n");
  105. else
  106. return sprintf(buf, "disabled\n");
  107. }
  108. static ssize_t ds1343_store_glitchfilter(struct device *dev,
  109. struct device_attribute *attr,
  110. const char *buf, size_t count)
  111. {
  112. struct ds1343_priv *priv = dev_get_drvdata(dev);
  113. int data;
  114. regmap_read(priv->map, DS1343_CONTROL_REG, &data);
  115. if (strncmp(buf, "enabled", 7) == 0)
  116. data |= DS1343_EGFIL;
  117. else if (strncmp(buf, "disabled", 8) == 0)
  118. data &= ~(DS1343_EGFIL);
  119. else
  120. return -EINVAL;
  121. regmap_write(priv->map, DS1343_CONTROL_REG, data);
  122. return count;
  123. }
  124. static DEVICE_ATTR(glitch_filter, S_IRUGO | S_IWUSR, ds1343_show_glitchfilter,
  125. ds1343_store_glitchfilter);
  126. static ssize_t ds1343_show_alarmstatus(struct device *dev,
  127. struct device_attribute *attr, char *buf)
  128. {
  129. struct ds1343_priv *priv = dev_get_drvdata(dev);
  130. int alarmstatus, data;
  131. regmap_read(priv->map, DS1343_CONTROL_REG, &data);
  132. alarmstatus = !!(data & DS1343_A0IE);
  133. if (alarmstatus)
  134. return sprintf(buf, "enabled\n");
  135. else
  136. return sprintf(buf, "disabled\n");
  137. }
  138. static DEVICE_ATTR(alarm_status, S_IRUGO, ds1343_show_alarmstatus, NULL);
  139. static ssize_t ds1343_show_alarmmode(struct device *dev,
  140. struct device_attribute *attr, char *buf)
  141. {
  142. struct ds1343_priv *priv = dev_get_drvdata(dev);
  143. int alarm_mode, data;
  144. char *alarm_str;
  145. regmap_read(priv->map, DS1343_ALM0_SEC_REG, &data);
  146. alarm_mode = (data & 0x80) >> 4;
  147. regmap_read(priv->map, DS1343_ALM0_MIN_REG, &data);
  148. alarm_mode |= (data & 0x80) >> 5;
  149. regmap_read(priv->map, DS1343_ALM0_HOUR_REG, &data);
  150. alarm_mode |= (data & 0x80) >> 6;
  151. regmap_read(priv->map, DS1343_ALM0_DAY_REG, &data);
  152. alarm_mode |= (data & 0x80) >> 7;
  153. switch (alarm_mode) {
  154. case 15:
  155. alarm_str = "each second";
  156. break;
  157. case 7:
  158. alarm_str = "seconds match";
  159. break;
  160. case 3:
  161. alarm_str = "minutes and seconds match";
  162. break;
  163. case 1:
  164. alarm_str = "hours, minutes and seconds match";
  165. break;
  166. case 0:
  167. alarm_str = "day, hours, minutes and seconds match";
  168. break;
  169. default:
  170. alarm_str = "invalid";
  171. break;
  172. }
  173. return sprintf(buf, "%s\n", alarm_str);
  174. }
  175. static DEVICE_ATTR(alarm_mode, S_IRUGO, ds1343_show_alarmmode, NULL);
  176. static ssize_t ds1343_show_tricklecharger(struct device *dev,
  177. struct device_attribute *attr, char *buf)
  178. {
  179. struct ds1343_priv *priv = dev_get_drvdata(dev);
  180. int data;
  181. char *diodes = "disabled", *resistors = " ";
  182. regmap_read(priv->map, DS1343_TRICKLE_REG, &data);
  183. if ((data & 0xf0) == DS1343_TRICKLE_MAGIC) {
  184. switch (data & 0x0c) {
  185. case DS1343_TRICKLE_DS1:
  186. diodes = "one diode,";
  187. break;
  188. default:
  189. diodes = "no diode,";
  190. break;
  191. }
  192. switch (data & 0x03) {
  193. case DS1343_TRICKLE_1K:
  194. resistors = "1k Ohm";
  195. break;
  196. case DS1343_TRICKLE_2K:
  197. resistors = "2k Ohm";
  198. break;
  199. case DS1343_TRICKLE_4K:
  200. resistors = "4k Ohm";
  201. break;
  202. default:
  203. diodes = "disabled";
  204. break;
  205. }
  206. }
  207. return sprintf(buf, "%s %s\n", diodes, resistors);
  208. }
  209. static DEVICE_ATTR(trickle_charger, S_IRUGO, ds1343_show_tricklecharger, NULL);
  210. static int ds1343_sysfs_register(struct device *dev)
  211. {
  212. int err;
  213. err = device_create_file(dev, &dev_attr_glitch_filter);
  214. if (err)
  215. return err;
  216. err = device_create_file(dev, &dev_attr_alarm_status);
  217. if (err)
  218. goto error1;
  219. err = device_create_file(dev, &dev_attr_alarm_mode);
  220. if (err)
  221. goto error2;
  222. err = device_create_file(dev, &dev_attr_trickle_charger);
  223. if (!err)
  224. return err;
  225. device_remove_file(dev, &dev_attr_alarm_mode);
  226. error2:
  227. device_remove_file(dev, &dev_attr_alarm_status);
  228. error1:
  229. device_remove_file(dev, &dev_attr_glitch_filter);
  230. return err;
  231. }
  232. static void ds1343_sysfs_unregister(struct device *dev)
  233. {
  234. device_remove_file(dev, &dev_attr_glitch_filter);
  235. device_remove_file(dev, &dev_attr_alarm_status);
  236. device_remove_file(dev, &dev_attr_alarm_mode);
  237. device_remove_file(dev, &dev_attr_trickle_charger);
  238. }
  239. static int ds1343_read_time(struct device *dev, struct rtc_time *dt)
  240. {
  241. struct ds1343_priv *priv = dev_get_drvdata(dev);
  242. unsigned char buf[7];
  243. int res;
  244. res = regmap_bulk_read(priv->map, DS1343_SECONDS_REG, buf, 7);
  245. if (res)
  246. return res;
  247. dt->tm_sec = bcd2bin(buf[0]);
  248. dt->tm_min = bcd2bin(buf[1]);
  249. dt->tm_hour = bcd2bin(buf[2] & 0x3F);
  250. dt->tm_wday = bcd2bin(buf[3]) - 1;
  251. dt->tm_mday = bcd2bin(buf[4]);
  252. dt->tm_mon = bcd2bin(buf[5] & 0x1F) - 1;
  253. dt->tm_year = bcd2bin(buf[6]) + 100; /* year offset from 1900 */
  254. return rtc_valid_tm(dt);
  255. }
  256. static int ds1343_set_time(struct device *dev, struct rtc_time *dt)
  257. {
  258. struct ds1343_priv *priv = dev_get_drvdata(dev);
  259. int res;
  260. res = regmap_write(priv->map, DS1343_SECONDS_REG,
  261. bin2bcd(dt->tm_sec));
  262. if (res)
  263. return res;
  264. res = regmap_write(priv->map, DS1343_MINUTES_REG,
  265. bin2bcd(dt->tm_min));
  266. if (res)
  267. return res;
  268. res = regmap_write(priv->map, DS1343_HOURS_REG,
  269. bin2bcd(dt->tm_hour) & 0x3F);
  270. if (res)
  271. return res;
  272. res = regmap_write(priv->map, DS1343_DAY_REG,
  273. bin2bcd(dt->tm_wday + 1));
  274. if (res)
  275. return res;
  276. res = regmap_write(priv->map, DS1343_DATE_REG,
  277. bin2bcd(dt->tm_mday));
  278. if (res)
  279. return res;
  280. res = regmap_write(priv->map, DS1343_MONTH_REG,
  281. bin2bcd(dt->tm_mon + 1));
  282. if (res)
  283. return res;
  284. dt->tm_year %= 100;
  285. res = regmap_write(priv->map, DS1343_YEAR_REG,
  286. bin2bcd(dt->tm_year));
  287. if (res)
  288. return res;
  289. return 0;
  290. }
  291. static int ds1343_update_alarm(struct device *dev)
  292. {
  293. struct ds1343_priv *priv = dev_get_drvdata(dev);
  294. unsigned int control, stat;
  295. unsigned char buf[4];
  296. int res = 0;
  297. res = regmap_read(priv->map, DS1343_CONTROL_REG, &control);
  298. if (res)
  299. return res;
  300. res = regmap_read(priv->map, DS1343_STATUS_REG, &stat);
  301. if (res)
  302. return res;
  303. control &= ~(DS1343_A0IE);
  304. stat &= ~(DS1343_IRQF0);
  305. res = regmap_write(priv->map, DS1343_CONTROL_REG, control);
  306. if (res)
  307. return res;
  308. res = regmap_write(priv->map, DS1343_STATUS_REG, stat);
  309. if (res)
  310. return res;
  311. buf[0] = priv->alarm_sec < 0 || (priv->irqen & RTC_UF) ?
  312. 0x80 : bin2bcd(priv->alarm_sec) & 0x7F;
  313. buf[1] = priv->alarm_min < 0 || (priv->irqen & RTC_UF) ?
  314. 0x80 : bin2bcd(priv->alarm_min) & 0x7F;
  315. buf[2] = priv->alarm_hour < 0 || (priv->irqen & RTC_UF) ?
  316. 0x80 : bin2bcd(priv->alarm_hour) & 0x3F;
  317. buf[3] = priv->alarm_mday < 0 || (priv->irqen & RTC_UF) ?
  318. 0x80 : bin2bcd(priv->alarm_mday) & 0x7F;
  319. res = regmap_bulk_write(priv->map, DS1343_ALM0_SEC_REG, buf, 4);
  320. if (res)
  321. return res;
  322. if (priv->irqen) {
  323. control |= DS1343_A0IE;
  324. res = regmap_write(priv->map, DS1343_CONTROL_REG, control);
  325. }
  326. return res;
  327. }
  328. static int ds1343_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
  329. {
  330. struct ds1343_priv *priv = dev_get_drvdata(dev);
  331. struct spi_device *spi = priv->spi;
  332. int res = 0;
  333. unsigned int stat;
  334. if (spi->irq <= 0)
  335. return -EINVAL;
  336. mutex_lock(&priv->mutex);
  337. res = regmap_read(priv->map, DS1343_STATUS_REG, &stat);
  338. if (res)
  339. goto out;
  340. alarm->enabled = !!(priv->irqen & RTC_AF);
  341. alarm->pending = !!(stat & DS1343_IRQF0);
  342. alarm->time.tm_sec = priv->alarm_sec < 0 ? 0 : priv->alarm_sec;
  343. alarm->time.tm_min = priv->alarm_min < 0 ? 0 : priv->alarm_min;
  344. alarm->time.tm_hour = priv->alarm_hour < 0 ? 0 : priv->alarm_hour;
  345. alarm->time.tm_mday = priv->alarm_mday < 0 ? 0 : priv->alarm_mday;
  346. alarm->time.tm_mon = -1;
  347. alarm->time.tm_year = -1;
  348. alarm->time.tm_wday = -1;
  349. alarm->time.tm_yday = -1;
  350. alarm->time.tm_isdst = -1;
  351. out:
  352. mutex_unlock(&priv->mutex);
  353. return res;
  354. }
  355. static int ds1343_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
  356. {
  357. struct ds1343_priv *priv = dev_get_drvdata(dev);
  358. struct spi_device *spi = priv->spi;
  359. int res = 0;
  360. if (spi->irq <= 0)
  361. return -EINVAL;
  362. mutex_lock(&priv->mutex);
  363. priv->alarm_sec = alarm->time.tm_sec;
  364. priv->alarm_min = alarm->time.tm_min;
  365. priv->alarm_hour = alarm->time.tm_hour;
  366. priv->alarm_mday = alarm->time.tm_mday;
  367. if (alarm->enabled)
  368. priv->irqen |= RTC_AF;
  369. res = ds1343_update_alarm(dev);
  370. mutex_unlock(&priv->mutex);
  371. return res;
  372. }
  373. static int ds1343_alarm_irq_enable(struct device *dev, unsigned int enabled)
  374. {
  375. struct ds1343_priv *priv = dev_get_drvdata(dev);
  376. struct spi_device *spi = priv->spi;
  377. int res = 0;
  378. if (spi->irq <= 0)
  379. return -EINVAL;
  380. mutex_lock(&priv->mutex);
  381. if (enabled)
  382. priv->irqen |= RTC_AF;
  383. else
  384. priv->irqen &= ~RTC_AF;
  385. res = ds1343_update_alarm(dev);
  386. mutex_unlock(&priv->mutex);
  387. return res;
  388. }
  389. static irqreturn_t ds1343_thread(int irq, void *dev_id)
  390. {
  391. struct ds1343_priv *priv = dev_id;
  392. unsigned int stat, control;
  393. int res = 0;
  394. mutex_lock(&priv->mutex);
  395. res = regmap_read(priv->map, DS1343_STATUS_REG, &stat);
  396. if (res)
  397. goto out;
  398. if (stat & DS1343_IRQF0) {
  399. stat &= ~DS1343_IRQF0;
  400. regmap_write(priv->map, DS1343_STATUS_REG, stat);
  401. res = regmap_read(priv->map, DS1343_CONTROL_REG, &control);
  402. if (res)
  403. goto out;
  404. control &= ~DS1343_A0IE;
  405. regmap_write(priv->map, DS1343_CONTROL_REG, control);
  406. rtc_update_irq(priv->rtc, 1, RTC_AF | RTC_IRQF);
  407. }
  408. out:
  409. mutex_unlock(&priv->mutex);
  410. return IRQ_HANDLED;
  411. }
  412. static const struct rtc_class_ops ds1343_rtc_ops = {
  413. .ioctl = ds1343_ioctl,
  414. .read_time = ds1343_read_time,
  415. .set_time = ds1343_set_time,
  416. .read_alarm = ds1343_read_alarm,
  417. .set_alarm = ds1343_set_alarm,
  418. .alarm_irq_enable = ds1343_alarm_irq_enable,
  419. };
  420. static int ds1343_probe(struct spi_device *spi)
  421. {
  422. struct ds1343_priv *priv;
  423. struct regmap_config config;
  424. unsigned int data;
  425. int res;
  426. memset(&config, 0, sizeof(config));
  427. config.reg_bits = 8;
  428. config.val_bits = 8;
  429. config.write_flag_mask = 0x80;
  430. priv = devm_kzalloc(&spi->dev, sizeof(struct ds1343_priv), GFP_KERNEL);
  431. if (!priv)
  432. return -ENOMEM;
  433. priv->spi = spi;
  434. mutex_init(&priv->mutex);
  435. /* RTC DS1347 works in spi mode 3 and
  436. * its chip select is active high
  437. */
  438. spi->mode = SPI_MODE_3 | SPI_CS_HIGH;
  439. spi->bits_per_word = 8;
  440. res = spi_setup(spi);
  441. if (res)
  442. return res;
  443. spi_set_drvdata(spi, priv);
  444. priv->map = devm_regmap_init_spi(spi, &config);
  445. if (IS_ERR(priv->map)) {
  446. dev_err(&spi->dev, "spi regmap init failed for rtc ds1343\n");
  447. return PTR_ERR(priv->map);
  448. }
  449. res = regmap_read(priv->map, DS1343_SECONDS_REG, &data);
  450. if (res)
  451. return res;
  452. regmap_read(priv->map, DS1343_CONTROL_REG, &data);
  453. data |= DS1343_INTCN;
  454. data &= ~(DS1343_EOSC | DS1343_A1IE | DS1343_A0IE);
  455. regmap_write(priv->map, DS1343_CONTROL_REG, data);
  456. regmap_read(priv->map, DS1343_STATUS_REG, &data);
  457. data &= ~(DS1343_OSF | DS1343_IRQF1 | DS1343_IRQF0);
  458. regmap_write(priv->map, DS1343_STATUS_REG, data);
  459. priv->rtc = devm_rtc_device_register(&spi->dev, "ds1343",
  460. &ds1343_rtc_ops, THIS_MODULE);
  461. if (IS_ERR(priv->rtc)) {
  462. dev_err(&spi->dev, "unable to register rtc ds1343\n");
  463. return PTR_ERR(priv->rtc);
  464. }
  465. if (spi->irq >= 0) {
  466. res = devm_request_threaded_irq(&spi->dev, spi->irq, NULL,
  467. ds1343_thread,
  468. IRQF_NO_SUSPEND | IRQF_ONESHOT,
  469. "ds1343", priv);
  470. if (res) {
  471. dev_err(&spi->dev,
  472. "unable to request irq for rtc ds1343\n");
  473. return res;
  474. }
  475. device_set_wakeup_capable(&spi->dev, 1);
  476. }
  477. res = ds1343_sysfs_register(&spi->dev);
  478. if (res)
  479. dev_err(&spi->dev,
  480. "unable to create sysfs entries for rtc ds1343\n");
  481. return 0;
  482. }
  483. static int ds1343_remove(struct spi_device *spi)
  484. {
  485. struct ds1343_priv *priv = spi_get_drvdata(spi);
  486. if (spi->irq) {
  487. mutex_lock(&priv->mutex);
  488. priv->irqen &= ~RTC_AF;
  489. mutex_unlock(&priv->mutex);
  490. devm_free_irq(&spi->dev, spi->irq, priv);
  491. }
  492. spi_set_drvdata(spi, NULL);
  493. ds1343_sysfs_unregister(&spi->dev);
  494. return 0;
  495. }
  496. #ifdef CONFIG_PM_SLEEP
  497. static int ds1343_suspend(struct device *dev)
  498. {
  499. struct spi_device *spi = to_spi_device(dev);
  500. if (spi->irq >= 0 && device_may_wakeup(dev))
  501. enable_irq_wake(spi->irq);
  502. return 0;
  503. }
  504. static int ds1343_resume(struct device *dev)
  505. {
  506. struct spi_device *spi = to_spi_device(dev);
  507. if (spi->irq >= 0 && device_may_wakeup(dev))
  508. disable_irq_wake(spi->irq);
  509. return 0;
  510. }
  511. #endif
  512. static SIMPLE_DEV_PM_OPS(ds1343_pm, ds1343_suspend, ds1343_resume);
  513. static struct spi_driver ds1343_driver = {
  514. .driver = {
  515. .name = "ds1343",
  516. .owner = THIS_MODULE,
  517. .pm = &ds1343_pm,
  518. },
  519. .probe = ds1343_probe,
  520. .remove = ds1343_remove,
  521. .id_table = ds1343_id,
  522. };
  523. module_spi_driver(ds1343_driver);
  524. MODULE_DESCRIPTION("DS1343 RTC SPI Driver");
  525. MODULE_AUTHOR("Raghavendra Chandra Ganiga <ravi23ganiga@gmail.com>");
  526. MODULE_LICENSE("GPL v2");
  527. MODULE_VERSION(DS1343_DRV_VERSION);