coretemp.c 20 KB

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  1. /*
  2. * coretemp.c - Linux kernel module for hardware monitoring
  3. *
  4. * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
  5. *
  6. * Inspired from many hwmon drivers
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; version 2 of the License.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  20. * 02110-1301 USA.
  21. */
  22. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/slab.h>
  26. #include <linux/jiffies.h>
  27. #include <linux/hwmon.h>
  28. #include <linux/sysfs.h>
  29. #include <linux/hwmon-sysfs.h>
  30. #include <linux/err.h>
  31. #include <linux/mutex.h>
  32. #include <linux/list.h>
  33. #include <linux/platform_device.h>
  34. #include <linux/cpu.h>
  35. #include <linux/pci.h>
  36. #include <linux/smp.h>
  37. #include <linux/moduleparam.h>
  38. #include <asm/msr.h>
  39. #include <asm/processor.h>
  40. #define DRVNAME "coretemp"
  41. /*
  42. * force_tjmax only matters when TjMax can't be read from the CPU itself.
  43. * When set, it replaces the driver's suboptimal heuristic.
  44. */
  45. static int force_tjmax;
  46. module_param_named(tjmax, force_tjmax, int, 0444);
  47. MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius");
  48. #define BASE_SYSFS_ATTR_NO 2 /* Sysfs Base attr no for coretemp */
  49. #define NUM_REAL_CORES 16 /* Number of Real cores per cpu */
  50. #define CORETEMP_NAME_LENGTH 17 /* String Length of attrs */
  51. #define MAX_CORE_ATTRS 4 /* Maximum no of basic attrs */
  52. #define TOTAL_ATTRS (MAX_CORE_ATTRS + 1)
  53. #define MAX_CORE_DATA (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO)
  54. #define TO_PHYS_ID(cpu) cpu_data(cpu).phys_proc_id
  55. #define TO_CORE_ID(cpu) cpu_data(cpu).cpu_core_id
  56. #define TO_ATTR_NO(cpu) (TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO)
  57. #ifdef CONFIG_SMP
  58. #define for_each_sibling(i, cpu) for_each_cpu(i, cpu_sibling_mask(cpu))
  59. #else
  60. #define for_each_sibling(i, cpu) for (i = 0; false; )
  61. #endif
  62. /*
  63. * Per-Core Temperature Data
  64. * @last_updated: The time when the current temperature value was updated
  65. * earlier (in jiffies).
  66. * @cpu_core_id: The CPU Core from which temperature values should be read
  67. * This value is passed as "id" field to rdmsr/wrmsr functions.
  68. * @status_reg: One of IA32_THERM_STATUS or IA32_PACKAGE_THERM_STATUS,
  69. * from where the temperature values should be read.
  70. * @attr_size: Total number of pre-core attrs displayed in the sysfs.
  71. * @is_pkg_data: If this is 1, the temp_data holds pkgtemp data.
  72. * Otherwise, temp_data holds coretemp data.
  73. * @valid: If this is 1, the current temperature is valid.
  74. */
  75. struct temp_data {
  76. int temp;
  77. int ttarget;
  78. int tjmax;
  79. unsigned long last_updated;
  80. unsigned int cpu;
  81. u32 cpu_core_id;
  82. u32 status_reg;
  83. int attr_size;
  84. bool is_pkg_data;
  85. bool valid;
  86. struct sensor_device_attribute sd_attrs[TOTAL_ATTRS];
  87. char attr_name[TOTAL_ATTRS][CORETEMP_NAME_LENGTH];
  88. struct mutex update_lock;
  89. };
  90. /* Platform Data per Physical CPU */
  91. struct platform_data {
  92. struct device *hwmon_dev;
  93. u16 phys_proc_id;
  94. struct temp_data *core_data[MAX_CORE_DATA];
  95. struct device_attribute name_attr;
  96. };
  97. struct pdev_entry {
  98. struct list_head list;
  99. struct platform_device *pdev;
  100. u16 phys_proc_id;
  101. };
  102. static LIST_HEAD(pdev_list);
  103. static DEFINE_MUTEX(pdev_list_mutex);
  104. static ssize_t show_name(struct device *dev,
  105. struct device_attribute *devattr, char *buf)
  106. {
  107. return sprintf(buf, "%s\n", DRVNAME);
  108. }
  109. static ssize_t show_label(struct device *dev,
  110. struct device_attribute *devattr, char *buf)
  111. {
  112. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  113. struct platform_data *pdata = dev_get_drvdata(dev);
  114. struct temp_data *tdata = pdata->core_data[attr->index];
  115. if (tdata->is_pkg_data)
  116. return sprintf(buf, "Physical id %u\n", pdata->phys_proc_id);
  117. return sprintf(buf, "Core %u\n", tdata->cpu_core_id);
  118. }
  119. static ssize_t show_crit_alarm(struct device *dev,
  120. struct device_attribute *devattr, char *buf)
  121. {
  122. u32 eax, edx;
  123. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  124. struct platform_data *pdata = dev_get_drvdata(dev);
  125. struct temp_data *tdata = pdata->core_data[attr->index];
  126. rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
  127. return sprintf(buf, "%d\n", (eax >> 5) & 1);
  128. }
  129. static ssize_t show_tjmax(struct device *dev,
  130. struct device_attribute *devattr, char *buf)
  131. {
  132. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  133. struct platform_data *pdata = dev_get_drvdata(dev);
  134. return sprintf(buf, "%d\n", pdata->core_data[attr->index]->tjmax);
  135. }
  136. static ssize_t show_ttarget(struct device *dev,
  137. struct device_attribute *devattr, char *buf)
  138. {
  139. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  140. struct platform_data *pdata = dev_get_drvdata(dev);
  141. return sprintf(buf, "%d\n", pdata->core_data[attr->index]->ttarget);
  142. }
  143. static ssize_t show_temp(struct device *dev,
  144. struct device_attribute *devattr, char *buf)
  145. {
  146. u32 eax, edx;
  147. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  148. struct platform_data *pdata = dev_get_drvdata(dev);
  149. struct temp_data *tdata = pdata->core_data[attr->index];
  150. mutex_lock(&tdata->update_lock);
  151. /* Check whether the time interval has elapsed */
  152. if (!tdata->valid || time_after(jiffies, tdata->last_updated + HZ)) {
  153. rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
  154. tdata->valid = 0;
  155. /* Check whether the data is valid */
  156. if (eax & 0x80000000) {
  157. tdata->temp = tdata->tjmax -
  158. ((eax >> 16) & 0x7f) * 1000;
  159. tdata->valid = 1;
  160. }
  161. tdata->last_updated = jiffies;
  162. }
  163. mutex_unlock(&tdata->update_lock);
  164. return tdata->valid ? sprintf(buf, "%d\n", tdata->temp) : -EAGAIN;
  165. }
  166. static int adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
  167. {
  168. /* The 100C is default for both mobile and non mobile CPUs */
  169. int tjmax = 100000;
  170. int tjmax_ee = 85000;
  171. int usemsr_ee = 1;
  172. int err;
  173. u32 eax, edx;
  174. struct pci_dev *host_bridge;
  175. /* Early chips have no MSR for TjMax */
  176. if (c->x86_model == 0xf && c->x86_mask < 4)
  177. usemsr_ee = 0;
  178. /* Atom CPUs */
  179. if (c->x86_model == 0x1c) {
  180. usemsr_ee = 0;
  181. host_bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
  182. if (host_bridge && host_bridge->vendor == PCI_VENDOR_ID_INTEL
  183. && (host_bridge->device == 0xa000 /* NM10 based nettop */
  184. || host_bridge->device == 0xa010)) /* NM10 based netbook */
  185. tjmax = 100000;
  186. else
  187. tjmax = 90000;
  188. pci_dev_put(host_bridge);
  189. }
  190. if (c->x86_model > 0xe && usemsr_ee) {
  191. u8 platform_id;
  192. /*
  193. * Now we can detect the mobile CPU using Intel provided table
  194. * http://softwarecommunity.intel.com/Wiki/Mobility/720.htm
  195. * For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU
  196. */
  197. err = rdmsr_safe_on_cpu(id, 0x17, &eax, &edx);
  198. if (err) {
  199. dev_warn(dev,
  200. "Unable to access MSR 0x17, assuming desktop"
  201. " CPU\n");
  202. usemsr_ee = 0;
  203. } else if (c->x86_model < 0x17 && !(eax & 0x10000000)) {
  204. /*
  205. * Trust bit 28 up to Penryn, I could not find any
  206. * documentation on that; if you happen to know
  207. * someone at Intel please ask
  208. */
  209. usemsr_ee = 0;
  210. } else {
  211. /* Platform ID bits 52:50 (EDX starts at bit 32) */
  212. platform_id = (edx >> 18) & 0x7;
  213. /*
  214. * Mobile Penryn CPU seems to be platform ID 7 or 5
  215. * (guesswork)
  216. */
  217. if (c->x86_model == 0x17 &&
  218. (platform_id == 5 || platform_id == 7)) {
  219. /*
  220. * If MSR EE bit is set, set it to 90 degrees C,
  221. * otherwise 105 degrees C
  222. */
  223. tjmax_ee = 90000;
  224. tjmax = 105000;
  225. }
  226. }
  227. }
  228. if (usemsr_ee) {
  229. err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx);
  230. if (err) {
  231. dev_warn(dev,
  232. "Unable to access MSR 0xEE, for Tjmax, left"
  233. " at default\n");
  234. } else if (eax & 0x40000000) {
  235. tjmax = tjmax_ee;
  236. }
  237. } else if (tjmax == 100000) {
  238. /*
  239. * If we don't use msr EE it means we are desktop CPU
  240. * (with exeception of Atom)
  241. */
  242. dev_warn(dev, "Using relative temperature scale!\n");
  243. }
  244. return tjmax;
  245. }
  246. static int get_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
  247. {
  248. int err;
  249. u32 eax, edx;
  250. u32 val;
  251. /*
  252. * A new feature of current Intel(R) processors, the
  253. * IA32_TEMPERATURE_TARGET contains the TjMax value
  254. */
  255. err = rdmsr_safe_on_cpu(id, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
  256. if (err) {
  257. if (c->x86_model > 0xe && c->x86_model != 0x1c)
  258. dev_warn(dev, "Unable to read TjMax from CPU %u\n", id);
  259. } else {
  260. val = (eax >> 16) & 0xff;
  261. /*
  262. * If the TjMax is not plausible, an assumption
  263. * will be used
  264. */
  265. if (val) {
  266. dev_dbg(dev, "TjMax is %d degrees C\n", val);
  267. return val * 1000;
  268. }
  269. }
  270. if (force_tjmax) {
  271. dev_notice(dev, "TjMax forced to %d degrees C by user\n",
  272. force_tjmax);
  273. return force_tjmax * 1000;
  274. }
  275. /*
  276. * An assumption is made for early CPUs and unreadable MSR.
  277. * NOTE: the calculated value may not be correct.
  278. */
  279. return adjust_tjmax(c, id, dev);
  280. }
  281. static int create_name_attr(struct platform_data *pdata, struct device *dev)
  282. {
  283. sysfs_attr_init(&pdata->name_attr.attr);
  284. pdata->name_attr.attr.name = "name";
  285. pdata->name_attr.attr.mode = S_IRUGO;
  286. pdata->name_attr.show = show_name;
  287. return device_create_file(dev, &pdata->name_attr);
  288. }
  289. static int create_core_attrs(struct temp_data *tdata, struct device *dev,
  290. int attr_no)
  291. {
  292. int err, i;
  293. static ssize_t (*const rd_ptr[TOTAL_ATTRS]) (struct device *dev,
  294. struct device_attribute *devattr, char *buf) = {
  295. show_label, show_crit_alarm, show_temp, show_tjmax,
  296. show_ttarget };
  297. static const char *const names[TOTAL_ATTRS] = {
  298. "temp%d_label", "temp%d_crit_alarm",
  299. "temp%d_input", "temp%d_crit",
  300. "temp%d_max" };
  301. for (i = 0; i < tdata->attr_size; i++) {
  302. snprintf(tdata->attr_name[i], CORETEMP_NAME_LENGTH, names[i],
  303. attr_no);
  304. sysfs_attr_init(&tdata->sd_attrs[i].dev_attr.attr);
  305. tdata->sd_attrs[i].dev_attr.attr.name = tdata->attr_name[i];
  306. tdata->sd_attrs[i].dev_attr.attr.mode = S_IRUGO;
  307. tdata->sd_attrs[i].dev_attr.show = rd_ptr[i];
  308. tdata->sd_attrs[i].index = attr_no;
  309. err = device_create_file(dev, &tdata->sd_attrs[i].dev_attr);
  310. if (err)
  311. goto exit_free;
  312. }
  313. return 0;
  314. exit_free:
  315. while (--i >= 0)
  316. device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
  317. return err;
  318. }
  319. static int __cpuinit chk_ucode_version(unsigned int cpu)
  320. {
  321. struct cpuinfo_x86 *c = &cpu_data(cpu);
  322. /*
  323. * Check if we have problem with errata AE18 of Core processors:
  324. * Readings might stop update when processor visited too deep sleep,
  325. * fixed for stepping D0 (6EC).
  326. */
  327. if (c->x86_model == 0xe && c->x86_mask < 0xc && c->microcode < 0x39) {
  328. pr_err("Errata AE18 not fixed, update BIOS or "
  329. "microcode of the CPU!\n");
  330. return -ENODEV;
  331. }
  332. return 0;
  333. }
  334. static struct platform_device *coretemp_get_pdev(unsigned int cpu)
  335. {
  336. u16 phys_proc_id = TO_PHYS_ID(cpu);
  337. struct pdev_entry *p;
  338. mutex_lock(&pdev_list_mutex);
  339. list_for_each_entry(p, &pdev_list, list)
  340. if (p->phys_proc_id == phys_proc_id) {
  341. mutex_unlock(&pdev_list_mutex);
  342. return p->pdev;
  343. }
  344. mutex_unlock(&pdev_list_mutex);
  345. return NULL;
  346. }
  347. static struct temp_data *init_temp_data(unsigned int cpu, int pkg_flag)
  348. {
  349. struct temp_data *tdata;
  350. tdata = kzalloc(sizeof(struct temp_data), GFP_KERNEL);
  351. if (!tdata)
  352. return NULL;
  353. tdata->status_reg = pkg_flag ? MSR_IA32_PACKAGE_THERM_STATUS :
  354. MSR_IA32_THERM_STATUS;
  355. tdata->is_pkg_data = pkg_flag;
  356. tdata->cpu = cpu;
  357. tdata->cpu_core_id = TO_CORE_ID(cpu);
  358. tdata->attr_size = MAX_CORE_ATTRS;
  359. mutex_init(&tdata->update_lock);
  360. return tdata;
  361. }
  362. static int create_core_data(struct platform_device *pdev,
  363. unsigned int cpu, int pkg_flag)
  364. {
  365. struct temp_data *tdata;
  366. struct platform_data *pdata = platform_get_drvdata(pdev);
  367. struct cpuinfo_x86 *c = &cpu_data(cpu);
  368. u32 eax, edx;
  369. int err, attr_no;
  370. /*
  371. * Find attr number for sysfs:
  372. * We map the attr number to core id of the CPU
  373. * The attr number is always core id + 2
  374. * The Pkgtemp will always show up as temp1_*, if available
  375. */
  376. attr_no = pkg_flag ? 1 : TO_ATTR_NO(cpu);
  377. if (attr_no > MAX_CORE_DATA - 1)
  378. return -ERANGE;
  379. /*
  380. * Provide a single set of attributes for all HT siblings of a core
  381. * to avoid duplicate sensors (the processor ID and core ID of all
  382. * HT siblings of a core are the same).
  383. * Skip if a HT sibling of this core is already registered.
  384. * This is not an error.
  385. */
  386. if (pdata->core_data[attr_no] != NULL)
  387. return 0;
  388. tdata = init_temp_data(cpu, pkg_flag);
  389. if (!tdata)
  390. return -ENOMEM;
  391. /* Test if we can access the status register */
  392. err = rdmsr_safe_on_cpu(cpu, tdata->status_reg, &eax, &edx);
  393. if (err)
  394. goto exit_free;
  395. /* We can access status register. Get Critical Temperature */
  396. tdata->tjmax = get_tjmax(c, cpu, &pdev->dev);
  397. /*
  398. * Read the still undocumented bits 8:15 of IA32_TEMPERATURE_TARGET.
  399. * The target temperature is available on older CPUs but not in this
  400. * register. Atoms don't have the register at all.
  401. */
  402. if (c->x86_model > 0xe && c->x86_model != 0x1c) {
  403. err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET,
  404. &eax, &edx);
  405. if (!err) {
  406. tdata->ttarget
  407. = tdata->tjmax - ((eax >> 8) & 0xff) * 1000;
  408. tdata->attr_size++;
  409. }
  410. }
  411. pdata->core_data[attr_no] = tdata;
  412. /* Create sysfs interfaces */
  413. err = create_core_attrs(tdata, &pdev->dev, attr_no);
  414. if (err)
  415. goto exit_free;
  416. return 0;
  417. exit_free:
  418. pdata->core_data[attr_no] = NULL;
  419. kfree(tdata);
  420. return err;
  421. }
  422. static void coretemp_add_core(unsigned int cpu, int pkg_flag)
  423. {
  424. struct platform_device *pdev = coretemp_get_pdev(cpu);
  425. int err;
  426. if (!pdev)
  427. return;
  428. err = create_core_data(pdev, cpu, pkg_flag);
  429. if (err)
  430. dev_err(&pdev->dev, "Adding Core %u failed\n", cpu);
  431. }
  432. static void coretemp_remove_core(struct platform_data *pdata,
  433. struct device *dev, int indx)
  434. {
  435. int i;
  436. struct temp_data *tdata = pdata->core_data[indx];
  437. /* Remove the sysfs attributes */
  438. for (i = 0; i < tdata->attr_size; i++)
  439. device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
  440. kfree(pdata->core_data[indx]);
  441. pdata->core_data[indx] = NULL;
  442. }
  443. static int __devinit coretemp_probe(struct platform_device *pdev)
  444. {
  445. struct platform_data *pdata;
  446. int err;
  447. /* Initialize the per-package data structures */
  448. pdata = kzalloc(sizeof(struct platform_data), GFP_KERNEL);
  449. if (!pdata)
  450. return -ENOMEM;
  451. err = create_name_attr(pdata, &pdev->dev);
  452. if (err)
  453. goto exit_free;
  454. pdata->phys_proc_id = pdev->id;
  455. platform_set_drvdata(pdev, pdata);
  456. pdata->hwmon_dev = hwmon_device_register(&pdev->dev);
  457. if (IS_ERR(pdata->hwmon_dev)) {
  458. err = PTR_ERR(pdata->hwmon_dev);
  459. dev_err(&pdev->dev, "Class registration failed (%d)\n", err);
  460. goto exit_name;
  461. }
  462. return 0;
  463. exit_name:
  464. device_remove_file(&pdev->dev, &pdata->name_attr);
  465. platform_set_drvdata(pdev, NULL);
  466. exit_free:
  467. kfree(pdata);
  468. return err;
  469. }
  470. static int __devexit coretemp_remove(struct platform_device *pdev)
  471. {
  472. struct platform_data *pdata = platform_get_drvdata(pdev);
  473. int i;
  474. for (i = MAX_CORE_DATA - 1; i >= 0; --i)
  475. if (pdata->core_data[i])
  476. coretemp_remove_core(pdata, &pdev->dev, i);
  477. device_remove_file(&pdev->dev, &pdata->name_attr);
  478. hwmon_device_unregister(pdata->hwmon_dev);
  479. platform_set_drvdata(pdev, NULL);
  480. kfree(pdata);
  481. return 0;
  482. }
  483. static struct platform_driver coretemp_driver = {
  484. .driver = {
  485. .owner = THIS_MODULE,
  486. .name = DRVNAME,
  487. },
  488. .probe = coretemp_probe,
  489. .remove = __devexit_p(coretemp_remove),
  490. };
  491. static int __cpuinit coretemp_device_add(unsigned int cpu)
  492. {
  493. int err;
  494. struct platform_device *pdev;
  495. struct pdev_entry *pdev_entry;
  496. mutex_lock(&pdev_list_mutex);
  497. pdev = platform_device_alloc(DRVNAME, TO_PHYS_ID(cpu));
  498. if (!pdev) {
  499. err = -ENOMEM;
  500. pr_err("Device allocation failed\n");
  501. goto exit;
  502. }
  503. pdev_entry = kzalloc(sizeof(struct pdev_entry), GFP_KERNEL);
  504. if (!pdev_entry) {
  505. err = -ENOMEM;
  506. goto exit_device_put;
  507. }
  508. err = platform_device_add(pdev);
  509. if (err) {
  510. pr_err("Device addition failed (%d)\n", err);
  511. goto exit_device_free;
  512. }
  513. pdev_entry->pdev = pdev;
  514. pdev_entry->phys_proc_id = pdev->id;
  515. list_add_tail(&pdev_entry->list, &pdev_list);
  516. mutex_unlock(&pdev_list_mutex);
  517. return 0;
  518. exit_device_free:
  519. kfree(pdev_entry);
  520. exit_device_put:
  521. platform_device_put(pdev);
  522. exit:
  523. mutex_unlock(&pdev_list_mutex);
  524. return err;
  525. }
  526. static void coretemp_device_remove(unsigned int cpu)
  527. {
  528. struct pdev_entry *p, *n;
  529. u16 phys_proc_id = TO_PHYS_ID(cpu);
  530. mutex_lock(&pdev_list_mutex);
  531. list_for_each_entry_safe(p, n, &pdev_list, list) {
  532. if (p->phys_proc_id != phys_proc_id)
  533. continue;
  534. platform_device_unregister(p->pdev);
  535. list_del(&p->list);
  536. kfree(p);
  537. }
  538. mutex_unlock(&pdev_list_mutex);
  539. }
  540. static bool is_any_core_online(struct platform_data *pdata)
  541. {
  542. int i;
  543. /* Find online cores, except pkgtemp data */
  544. for (i = MAX_CORE_DATA - 1; i >= 0; --i) {
  545. if (pdata->core_data[i] &&
  546. !pdata->core_data[i]->is_pkg_data) {
  547. return true;
  548. }
  549. }
  550. return false;
  551. }
  552. static void __cpuinit get_core_online(unsigned int cpu)
  553. {
  554. struct cpuinfo_x86 *c = &cpu_data(cpu);
  555. struct platform_device *pdev = coretemp_get_pdev(cpu);
  556. int err;
  557. /*
  558. * CPUID.06H.EAX[0] indicates whether the CPU has thermal
  559. * sensors. We check this bit only, all the early CPUs
  560. * without thermal sensors will be filtered out.
  561. */
  562. if (!cpu_has(c, X86_FEATURE_DTS))
  563. return;
  564. if (!pdev) {
  565. /* Check the microcode version of the CPU */
  566. if (chk_ucode_version(cpu))
  567. return;
  568. /*
  569. * Alright, we have DTS support.
  570. * We are bringing the _first_ core in this pkg
  571. * online. So, initialize per-pkg data structures and
  572. * then bring this core online.
  573. */
  574. err = coretemp_device_add(cpu);
  575. if (err)
  576. return;
  577. /*
  578. * Check whether pkgtemp support is available.
  579. * If so, add interfaces for pkgtemp.
  580. */
  581. if (cpu_has(c, X86_FEATURE_PTS))
  582. coretemp_add_core(cpu, 1);
  583. }
  584. /*
  585. * Physical CPU device already exists.
  586. * So, just add interfaces for this core.
  587. */
  588. coretemp_add_core(cpu, 0);
  589. }
  590. static void __cpuinit put_core_offline(unsigned int cpu)
  591. {
  592. int i, indx;
  593. struct platform_data *pdata;
  594. struct platform_device *pdev = coretemp_get_pdev(cpu);
  595. /* If the physical CPU device does not exist, just return */
  596. if (!pdev)
  597. return;
  598. pdata = platform_get_drvdata(pdev);
  599. indx = TO_ATTR_NO(cpu);
  600. if (pdata->core_data[indx] && pdata->core_data[indx]->cpu == cpu)
  601. coretemp_remove_core(pdata, &pdev->dev, indx);
  602. /*
  603. * If a HT sibling of a core is taken offline, but another HT sibling
  604. * of the same core is still online, register the alternate sibling.
  605. * This ensures that exactly one set of attributes is provided as long
  606. * as at least one HT sibling of a core is online.
  607. */
  608. for_each_sibling(i, cpu) {
  609. if (i != cpu) {
  610. get_core_online(i);
  611. /*
  612. * Display temperature sensor data for one HT sibling
  613. * per core only, so abort the loop after one such
  614. * sibling has been found.
  615. */
  616. break;
  617. }
  618. }
  619. /*
  620. * If all cores in this pkg are offline, remove the device.
  621. * coretemp_device_remove calls unregister_platform_device,
  622. * which in turn calls coretemp_remove. This removes the
  623. * pkgtemp entry and does other clean ups.
  624. */
  625. if (!is_any_core_online(pdata))
  626. coretemp_device_remove(cpu);
  627. }
  628. static int __cpuinit coretemp_cpu_callback(struct notifier_block *nfb,
  629. unsigned long action, void *hcpu)
  630. {
  631. unsigned int cpu = (unsigned long) hcpu;
  632. switch (action) {
  633. case CPU_ONLINE:
  634. case CPU_DOWN_FAILED:
  635. get_core_online(cpu);
  636. break;
  637. case CPU_DOWN_PREPARE:
  638. put_core_offline(cpu);
  639. break;
  640. }
  641. return NOTIFY_OK;
  642. }
  643. static struct notifier_block coretemp_cpu_notifier __refdata = {
  644. .notifier_call = coretemp_cpu_callback,
  645. };
  646. static int __init coretemp_init(void)
  647. {
  648. int i, err = -ENODEV;
  649. /* quick check if we run Intel */
  650. if (cpu_data(0).x86_vendor != X86_VENDOR_INTEL)
  651. goto exit;
  652. err = platform_driver_register(&coretemp_driver);
  653. if (err)
  654. goto exit;
  655. for_each_online_cpu(i)
  656. get_core_online(i);
  657. #ifndef CONFIG_HOTPLUG_CPU
  658. if (list_empty(&pdev_list)) {
  659. err = -ENODEV;
  660. goto exit_driver_unreg;
  661. }
  662. #endif
  663. register_hotcpu_notifier(&coretemp_cpu_notifier);
  664. return 0;
  665. #ifndef CONFIG_HOTPLUG_CPU
  666. exit_driver_unreg:
  667. platform_driver_unregister(&coretemp_driver);
  668. #endif
  669. exit:
  670. return err;
  671. }
  672. static void __exit coretemp_exit(void)
  673. {
  674. struct pdev_entry *p, *n;
  675. unregister_hotcpu_notifier(&coretemp_cpu_notifier);
  676. mutex_lock(&pdev_list_mutex);
  677. list_for_each_entry_safe(p, n, &pdev_list, list) {
  678. platform_device_unregister(p->pdev);
  679. list_del(&p->list);
  680. kfree(p);
  681. }
  682. mutex_unlock(&pdev_list_mutex);
  683. platform_driver_unregister(&coretemp_driver);
  684. }
  685. MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>");
  686. MODULE_DESCRIPTION("Intel Core temperature monitor");
  687. MODULE_LICENSE("GPL");
  688. module_init(coretemp_init)
  689. module_exit(coretemp_exit)