rdma.c 51 KB

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  1. /*
  2. * NVMe over Fabrics RDMA host code.
  3. * Copyright (c) 2015-2016 HGST, a Western Digital Company.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms and conditions of the GNU General Public License,
  7. * version 2, as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. */
  14. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  15. #include <linux/module.h>
  16. #include <linux/init.h>
  17. #include <linux/slab.h>
  18. #include <linux/err.h>
  19. #include <linux/string.h>
  20. #include <linux/atomic.h>
  21. #include <linux/blk-mq.h>
  22. #include <linux/blk-mq-rdma.h>
  23. #include <linux/types.h>
  24. #include <linux/list.h>
  25. #include <linux/mutex.h>
  26. #include <linux/scatterlist.h>
  27. #include <linux/nvme.h>
  28. #include <asm/unaligned.h>
  29. #include <rdma/ib_verbs.h>
  30. #include <rdma/rdma_cm.h>
  31. #include <linux/nvme-rdma.h>
  32. #include "nvme.h"
  33. #include "fabrics.h"
  34. #define NVME_RDMA_CONNECT_TIMEOUT_MS 3000 /* 3 second */
  35. #define NVME_RDMA_MAX_SEGMENTS 256
  36. #define NVME_RDMA_MAX_INLINE_SEGMENTS 1
  37. /*
  38. * We handle AEN commands ourselves and don't even let the
  39. * block layer know about them.
  40. */
  41. #define NVME_RDMA_NR_AEN_COMMANDS 1
  42. #define NVME_RDMA_AQ_BLKMQ_DEPTH \
  43. (NVME_AQ_DEPTH - NVME_RDMA_NR_AEN_COMMANDS)
  44. struct nvme_rdma_device {
  45. struct ib_device *dev;
  46. struct ib_pd *pd;
  47. struct kref ref;
  48. struct list_head entry;
  49. };
  50. struct nvme_rdma_qe {
  51. struct ib_cqe cqe;
  52. void *data;
  53. u64 dma;
  54. };
  55. struct nvme_rdma_queue;
  56. struct nvme_rdma_request {
  57. struct nvme_request req;
  58. struct ib_mr *mr;
  59. struct nvme_rdma_qe sqe;
  60. struct ib_sge sge[1 + NVME_RDMA_MAX_INLINE_SEGMENTS];
  61. u32 num_sge;
  62. int nents;
  63. bool inline_data;
  64. struct ib_reg_wr reg_wr;
  65. struct ib_cqe reg_cqe;
  66. struct nvme_rdma_queue *queue;
  67. struct sg_table sg_table;
  68. struct scatterlist first_sgl[];
  69. };
  70. enum nvme_rdma_queue_flags {
  71. NVME_RDMA_Q_LIVE = 0,
  72. NVME_RDMA_Q_DELETING = 1,
  73. };
  74. struct nvme_rdma_queue {
  75. struct nvme_rdma_qe *rsp_ring;
  76. atomic_t sig_count;
  77. int queue_size;
  78. size_t cmnd_capsule_len;
  79. struct nvme_rdma_ctrl *ctrl;
  80. struct nvme_rdma_device *device;
  81. struct ib_cq *ib_cq;
  82. struct ib_qp *qp;
  83. unsigned long flags;
  84. struct rdma_cm_id *cm_id;
  85. int cm_error;
  86. struct completion cm_done;
  87. };
  88. struct nvme_rdma_ctrl {
  89. /* read only in the hot path */
  90. struct nvme_rdma_queue *queues;
  91. /* other member variables */
  92. struct blk_mq_tag_set tag_set;
  93. struct work_struct delete_work;
  94. struct work_struct err_work;
  95. struct nvme_rdma_qe async_event_sqe;
  96. struct delayed_work reconnect_work;
  97. struct list_head list;
  98. struct blk_mq_tag_set admin_tag_set;
  99. struct nvme_rdma_device *device;
  100. u32 max_fr_pages;
  101. struct sockaddr_storage addr;
  102. struct sockaddr_storage src_addr;
  103. struct nvme_ctrl ctrl;
  104. };
  105. static inline struct nvme_rdma_ctrl *to_rdma_ctrl(struct nvme_ctrl *ctrl)
  106. {
  107. return container_of(ctrl, struct nvme_rdma_ctrl, ctrl);
  108. }
  109. static LIST_HEAD(device_list);
  110. static DEFINE_MUTEX(device_list_mutex);
  111. static LIST_HEAD(nvme_rdma_ctrl_list);
  112. static DEFINE_MUTEX(nvme_rdma_ctrl_mutex);
  113. /*
  114. * Disabling this option makes small I/O goes faster, but is fundamentally
  115. * unsafe. With it turned off we will have to register a global rkey that
  116. * allows read and write access to all physical memory.
  117. */
  118. static bool register_always = true;
  119. module_param(register_always, bool, 0444);
  120. MODULE_PARM_DESC(register_always,
  121. "Use memory registration even for contiguous memory regions");
  122. static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id,
  123. struct rdma_cm_event *event);
  124. static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc);
  125. static const struct blk_mq_ops nvme_rdma_mq_ops;
  126. static const struct blk_mq_ops nvme_rdma_admin_mq_ops;
  127. /* XXX: really should move to a generic header sooner or later.. */
  128. static inline void put_unaligned_le24(u32 val, u8 *p)
  129. {
  130. *p++ = val;
  131. *p++ = val >> 8;
  132. *p++ = val >> 16;
  133. }
  134. static inline int nvme_rdma_queue_idx(struct nvme_rdma_queue *queue)
  135. {
  136. return queue - queue->ctrl->queues;
  137. }
  138. static inline size_t nvme_rdma_inline_data_size(struct nvme_rdma_queue *queue)
  139. {
  140. return queue->cmnd_capsule_len - sizeof(struct nvme_command);
  141. }
  142. static void nvme_rdma_free_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe,
  143. size_t capsule_size, enum dma_data_direction dir)
  144. {
  145. ib_dma_unmap_single(ibdev, qe->dma, capsule_size, dir);
  146. kfree(qe->data);
  147. }
  148. static int nvme_rdma_alloc_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe,
  149. size_t capsule_size, enum dma_data_direction dir)
  150. {
  151. qe->data = kzalloc(capsule_size, GFP_KERNEL);
  152. if (!qe->data)
  153. return -ENOMEM;
  154. qe->dma = ib_dma_map_single(ibdev, qe->data, capsule_size, dir);
  155. if (ib_dma_mapping_error(ibdev, qe->dma)) {
  156. kfree(qe->data);
  157. return -ENOMEM;
  158. }
  159. return 0;
  160. }
  161. static void nvme_rdma_free_ring(struct ib_device *ibdev,
  162. struct nvme_rdma_qe *ring, size_t ib_queue_size,
  163. size_t capsule_size, enum dma_data_direction dir)
  164. {
  165. int i;
  166. for (i = 0; i < ib_queue_size; i++)
  167. nvme_rdma_free_qe(ibdev, &ring[i], capsule_size, dir);
  168. kfree(ring);
  169. }
  170. static struct nvme_rdma_qe *nvme_rdma_alloc_ring(struct ib_device *ibdev,
  171. size_t ib_queue_size, size_t capsule_size,
  172. enum dma_data_direction dir)
  173. {
  174. struct nvme_rdma_qe *ring;
  175. int i;
  176. ring = kcalloc(ib_queue_size, sizeof(struct nvme_rdma_qe), GFP_KERNEL);
  177. if (!ring)
  178. return NULL;
  179. for (i = 0; i < ib_queue_size; i++) {
  180. if (nvme_rdma_alloc_qe(ibdev, &ring[i], capsule_size, dir))
  181. goto out_free_ring;
  182. }
  183. return ring;
  184. out_free_ring:
  185. nvme_rdma_free_ring(ibdev, ring, i, capsule_size, dir);
  186. return NULL;
  187. }
  188. static void nvme_rdma_qp_event(struct ib_event *event, void *context)
  189. {
  190. pr_debug("QP event %s (%d)\n",
  191. ib_event_msg(event->event), event->event);
  192. }
  193. static int nvme_rdma_wait_for_cm(struct nvme_rdma_queue *queue)
  194. {
  195. wait_for_completion_interruptible_timeout(&queue->cm_done,
  196. msecs_to_jiffies(NVME_RDMA_CONNECT_TIMEOUT_MS) + 1);
  197. return queue->cm_error;
  198. }
  199. static int nvme_rdma_create_qp(struct nvme_rdma_queue *queue, const int factor)
  200. {
  201. struct nvme_rdma_device *dev = queue->device;
  202. struct ib_qp_init_attr init_attr;
  203. int ret;
  204. memset(&init_attr, 0, sizeof(init_attr));
  205. init_attr.event_handler = nvme_rdma_qp_event;
  206. /* +1 for drain */
  207. init_attr.cap.max_send_wr = factor * queue->queue_size + 1;
  208. /* +1 for drain */
  209. init_attr.cap.max_recv_wr = queue->queue_size + 1;
  210. init_attr.cap.max_recv_sge = 1;
  211. init_attr.cap.max_send_sge = 1 + NVME_RDMA_MAX_INLINE_SEGMENTS;
  212. init_attr.sq_sig_type = IB_SIGNAL_REQ_WR;
  213. init_attr.qp_type = IB_QPT_RC;
  214. init_attr.send_cq = queue->ib_cq;
  215. init_attr.recv_cq = queue->ib_cq;
  216. ret = rdma_create_qp(queue->cm_id, dev->pd, &init_attr);
  217. queue->qp = queue->cm_id->qp;
  218. return ret;
  219. }
  220. static int nvme_rdma_reinit_request(void *data, struct request *rq)
  221. {
  222. struct nvme_rdma_ctrl *ctrl = data;
  223. struct nvme_rdma_device *dev = ctrl->device;
  224. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  225. int ret = 0;
  226. ib_dereg_mr(req->mr);
  227. req->mr = ib_alloc_mr(dev->pd, IB_MR_TYPE_MEM_REG,
  228. ctrl->max_fr_pages);
  229. if (IS_ERR(req->mr)) {
  230. ret = PTR_ERR(req->mr);
  231. req->mr = NULL;
  232. goto out;
  233. }
  234. req->mr->need_inval = false;
  235. out:
  236. return ret;
  237. }
  238. static void nvme_rdma_exit_request(struct blk_mq_tag_set *set,
  239. struct request *rq, unsigned int hctx_idx)
  240. {
  241. struct nvme_rdma_ctrl *ctrl = set->driver_data;
  242. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  243. int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0;
  244. struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx];
  245. struct nvme_rdma_device *dev = queue->device;
  246. if (req->mr)
  247. ib_dereg_mr(req->mr);
  248. nvme_rdma_free_qe(dev->dev, &req->sqe, sizeof(struct nvme_command),
  249. DMA_TO_DEVICE);
  250. }
  251. static int nvme_rdma_init_request(struct blk_mq_tag_set *set,
  252. struct request *rq, unsigned int hctx_idx,
  253. unsigned int numa_node)
  254. {
  255. struct nvme_rdma_ctrl *ctrl = set->driver_data;
  256. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  257. int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0;
  258. struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx];
  259. struct nvme_rdma_device *dev = queue->device;
  260. struct ib_device *ibdev = dev->dev;
  261. int ret;
  262. ret = nvme_rdma_alloc_qe(ibdev, &req->sqe, sizeof(struct nvme_command),
  263. DMA_TO_DEVICE);
  264. if (ret)
  265. return ret;
  266. req->mr = ib_alloc_mr(dev->pd, IB_MR_TYPE_MEM_REG,
  267. ctrl->max_fr_pages);
  268. if (IS_ERR(req->mr)) {
  269. ret = PTR_ERR(req->mr);
  270. goto out_free_qe;
  271. }
  272. req->queue = queue;
  273. return 0;
  274. out_free_qe:
  275. nvme_rdma_free_qe(dev->dev, &req->sqe, sizeof(struct nvme_command),
  276. DMA_TO_DEVICE);
  277. return -ENOMEM;
  278. }
  279. static int nvme_rdma_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
  280. unsigned int hctx_idx)
  281. {
  282. struct nvme_rdma_ctrl *ctrl = data;
  283. struct nvme_rdma_queue *queue = &ctrl->queues[hctx_idx + 1];
  284. BUG_ON(hctx_idx >= ctrl->ctrl.queue_count);
  285. hctx->driver_data = queue;
  286. return 0;
  287. }
  288. static int nvme_rdma_init_admin_hctx(struct blk_mq_hw_ctx *hctx, void *data,
  289. unsigned int hctx_idx)
  290. {
  291. struct nvme_rdma_ctrl *ctrl = data;
  292. struct nvme_rdma_queue *queue = &ctrl->queues[0];
  293. BUG_ON(hctx_idx != 0);
  294. hctx->driver_data = queue;
  295. return 0;
  296. }
  297. static void nvme_rdma_free_dev(struct kref *ref)
  298. {
  299. struct nvme_rdma_device *ndev =
  300. container_of(ref, struct nvme_rdma_device, ref);
  301. mutex_lock(&device_list_mutex);
  302. list_del(&ndev->entry);
  303. mutex_unlock(&device_list_mutex);
  304. ib_dealloc_pd(ndev->pd);
  305. kfree(ndev);
  306. }
  307. static void nvme_rdma_dev_put(struct nvme_rdma_device *dev)
  308. {
  309. kref_put(&dev->ref, nvme_rdma_free_dev);
  310. }
  311. static int nvme_rdma_dev_get(struct nvme_rdma_device *dev)
  312. {
  313. return kref_get_unless_zero(&dev->ref);
  314. }
  315. static struct nvme_rdma_device *
  316. nvme_rdma_find_get_device(struct rdma_cm_id *cm_id)
  317. {
  318. struct nvme_rdma_device *ndev;
  319. mutex_lock(&device_list_mutex);
  320. list_for_each_entry(ndev, &device_list, entry) {
  321. if (ndev->dev->node_guid == cm_id->device->node_guid &&
  322. nvme_rdma_dev_get(ndev))
  323. goto out_unlock;
  324. }
  325. ndev = kzalloc(sizeof(*ndev), GFP_KERNEL);
  326. if (!ndev)
  327. goto out_err;
  328. ndev->dev = cm_id->device;
  329. kref_init(&ndev->ref);
  330. ndev->pd = ib_alloc_pd(ndev->dev,
  331. register_always ? 0 : IB_PD_UNSAFE_GLOBAL_RKEY);
  332. if (IS_ERR(ndev->pd))
  333. goto out_free_dev;
  334. if (!(ndev->dev->attrs.device_cap_flags &
  335. IB_DEVICE_MEM_MGT_EXTENSIONS)) {
  336. dev_err(&ndev->dev->dev,
  337. "Memory registrations not supported.\n");
  338. goto out_free_pd;
  339. }
  340. list_add(&ndev->entry, &device_list);
  341. out_unlock:
  342. mutex_unlock(&device_list_mutex);
  343. return ndev;
  344. out_free_pd:
  345. ib_dealloc_pd(ndev->pd);
  346. out_free_dev:
  347. kfree(ndev);
  348. out_err:
  349. mutex_unlock(&device_list_mutex);
  350. return NULL;
  351. }
  352. static void nvme_rdma_destroy_queue_ib(struct nvme_rdma_queue *queue)
  353. {
  354. struct nvme_rdma_device *dev;
  355. struct ib_device *ibdev;
  356. dev = queue->device;
  357. ibdev = dev->dev;
  358. rdma_destroy_qp(queue->cm_id);
  359. ib_free_cq(queue->ib_cq);
  360. nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size,
  361. sizeof(struct nvme_completion), DMA_FROM_DEVICE);
  362. nvme_rdma_dev_put(dev);
  363. }
  364. static int nvme_rdma_create_queue_ib(struct nvme_rdma_queue *queue)
  365. {
  366. struct ib_device *ibdev;
  367. const int send_wr_factor = 3; /* MR, SEND, INV */
  368. const int cq_factor = send_wr_factor + 1; /* + RECV */
  369. int comp_vector, idx = nvme_rdma_queue_idx(queue);
  370. int ret;
  371. queue->device = nvme_rdma_find_get_device(queue->cm_id);
  372. if (!queue->device) {
  373. dev_err(queue->cm_id->device->dev.parent,
  374. "no client data found!\n");
  375. return -ECONNREFUSED;
  376. }
  377. ibdev = queue->device->dev;
  378. /*
  379. * Spread I/O queues completion vectors according their queue index.
  380. * Admin queues can always go on completion vector 0.
  381. */
  382. comp_vector = idx == 0 ? idx : idx - 1;
  383. /* +1 for ib_stop_cq */
  384. queue->ib_cq = ib_alloc_cq(ibdev, queue,
  385. cq_factor * queue->queue_size + 1,
  386. comp_vector, IB_POLL_SOFTIRQ);
  387. if (IS_ERR(queue->ib_cq)) {
  388. ret = PTR_ERR(queue->ib_cq);
  389. goto out_put_dev;
  390. }
  391. ret = nvme_rdma_create_qp(queue, send_wr_factor);
  392. if (ret)
  393. goto out_destroy_ib_cq;
  394. queue->rsp_ring = nvme_rdma_alloc_ring(ibdev, queue->queue_size,
  395. sizeof(struct nvme_completion), DMA_FROM_DEVICE);
  396. if (!queue->rsp_ring) {
  397. ret = -ENOMEM;
  398. goto out_destroy_qp;
  399. }
  400. return 0;
  401. out_destroy_qp:
  402. ib_destroy_qp(queue->qp);
  403. out_destroy_ib_cq:
  404. ib_free_cq(queue->ib_cq);
  405. out_put_dev:
  406. nvme_rdma_dev_put(queue->device);
  407. return ret;
  408. }
  409. static int nvme_rdma_alloc_queue(struct nvme_rdma_ctrl *ctrl,
  410. int idx, size_t queue_size)
  411. {
  412. struct nvme_rdma_queue *queue;
  413. struct sockaddr *src_addr = NULL;
  414. int ret;
  415. queue = &ctrl->queues[idx];
  416. queue->ctrl = ctrl;
  417. init_completion(&queue->cm_done);
  418. if (idx > 0)
  419. queue->cmnd_capsule_len = ctrl->ctrl.ioccsz * 16;
  420. else
  421. queue->cmnd_capsule_len = sizeof(struct nvme_command);
  422. queue->queue_size = queue_size;
  423. atomic_set(&queue->sig_count, 0);
  424. queue->cm_id = rdma_create_id(&init_net, nvme_rdma_cm_handler, queue,
  425. RDMA_PS_TCP, IB_QPT_RC);
  426. if (IS_ERR(queue->cm_id)) {
  427. dev_info(ctrl->ctrl.device,
  428. "failed to create CM ID: %ld\n", PTR_ERR(queue->cm_id));
  429. return PTR_ERR(queue->cm_id);
  430. }
  431. if (ctrl->ctrl.opts->mask & NVMF_OPT_HOST_TRADDR)
  432. src_addr = (struct sockaddr *)&ctrl->src_addr;
  433. queue->cm_error = -ETIMEDOUT;
  434. ret = rdma_resolve_addr(queue->cm_id, src_addr,
  435. (struct sockaddr *)&ctrl->addr,
  436. NVME_RDMA_CONNECT_TIMEOUT_MS);
  437. if (ret) {
  438. dev_info(ctrl->ctrl.device,
  439. "rdma_resolve_addr failed (%d).\n", ret);
  440. goto out_destroy_cm_id;
  441. }
  442. ret = nvme_rdma_wait_for_cm(queue);
  443. if (ret) {
  444. dev_info(ctrl->ctrl.device,
  445. "rdma_resolve_addr wait failed (%d).\n", ret);
  446. goto out_destroy_cm_id;
  447. }
  448. clear_bit(NVME_RDMA_Q_DELETING, &queue->flags);
  449. return 0;
  450. out_destroy_cm_id:
  451. rdma_destroy_id(queue->cm_id);
  452. return ret;
  453. }
  454. static void nvme_rdma_stop_queue(struct nvme_rdma_queue *queue)
  455. {
  456. if (!test_and_clear_bit(NVME_RDMA_Q_LIVE, &queue->flags))
  457. return;
  458. rdma_disconnect(queue->cm_id);
  459. ib_drain_qp(queue->qp);
  460. }
  461. static void nvme_rdma_free_queue(struct nvme_rdma_queue *queue)
  462. {
  463. if (test_and_set_bit(NVME_RDMA_Q_DELETING, &queue->flags))
  464. return;
  465. nvme_rdma_destroy_queue_ib(queue);
  466. rdma_destroy_id(queue->cm_id);
  467. }
  468. static void nvme_rdma_free_io_queues(struct nvme_rdma_ctrl *ctrl)
  469. {
  470. int i;
  471. for (i = 1; i < ctrl->ctrl.queue_count; i++)
  472. nvme_rdma_free_queue(&ctrl->queues[i]);
  473. }
  474. static void nvme_rdma_stop_io_queues(struct nvme_rdma_ctrl *ctrl)
  475. {
  476. int i;
  477. for (i = 1; i < ctrl->ctrl.queue_count; i++)
  478. nvme_rdma_stop_queue(&ctrl->queues[i]);
  479. }
  480. static int nvme_rdma_start_queue(struct nvme_rdma_ctrl *ctrl, int idx)
  481. {
  482. int ret;
  483. if (idx)
  484. ret = nvmf_connect_io_queue(&ctrl->ctrl, idx);
  485. else
  486. ret = nvmf_connect_admin_queue(&ctrl->ctrl);
  487. if (!ret)
  488. set_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[idx].flags);
  489. else
  490. dev_info(ctrl->ctrl.device,
  491. "failed to connect queue: %d ret=%d\n", idx, ret);
  492. return ret;
  493. }
  494. static int nvme_rdma_start_io_queues(struct nvme_rdma_ctrl *ctrl)
  495. {
  496. int i, ret = 0;
  497. for (i = 1; i < ctrl->ctrl.queue_count; i++) {
  498. ret = nvme_rdma_start_queue(ctrl, i);
  499. if (ret)
  500. goto out_stop_queues;
  501. }
  502. return 0;
  503. out_stop_queues:
  504. for (i--; i >= 1; i--)
  505. nvme_rdma_stop_queue(&ctrl->queues[i]);
  506. return ret;
  507. }
  508. static int nvme_rdma_alloc_io_queues(struct nvme_rdma_ctrl *ctrl)
  509. {
  510. struct nvmf_ctrl_options *opts = ctrl->ctrl.opts;
  511. struct ib_device *ibdev = ctrl->device->dev;
  512. unsigned int nr_io_queues;
  513. int i, ret;
  514. nr_io_queues = min(opts->nr_io_queues, num_online_cpus());
  515. /*
  516. * we map queues according to the device irq vectors for
  517. * optimal locality so we don't need more queues than
  518. * completion vectors.
  519. */
  520. nr_io_queues = min_t(unsigned int, nr_io_queues,
  521. ibdev->num_comp_vectors);
  522. ret = nvme_set_queue_count(&ctrl->ctrl, &nr_io_queues);
  523. if (ret)
  524. return ret;
  525. ctrl->ctrl.queue_count = nr_io_queues + 1;
  526. if (ctrl->ctrl.queue_count < 2)
  527. return 0;
  528. dev_info(ctrl->ctrl.device,
  529. "creating %d I/O queues.\n", nr_io_queues);
  530. for (i = 1; i < ctrl->ctrl.queue_count; i++) {
  531. ret = nvme_rdma_alloc_queue(ctrl, i,
  532. ctrl->ctrl.sqsize + 1);
  533. if (ret)
  534. goto out_free_queues;
  535. }
  536. return 0;
  537. out_free_queues:
  538. for (i--; i >= 1; i--)
  539. nvme_rdma_free_queue(&ctrl->queues[i]);
  540. return ret;
  541. }
  542. static void nvme_rdma_free_tagset(struct nvme_ctrl *nctrl, bool admin)
  543. {
  544. struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
  545. struct blk_mq_tag_set *set = admin ?
  546. &ctrl->admin_tag_set : &ctrl->tag_set;
  547. blk_mq_free_tag_set(set);
  548. nvme_rdma_dev_put(ctrl->device);
  549. }
  550. static struct blk_mq_tag_set *nvme_rdma_alloc_tagset(struct nvme_ctrl *nctrl,
  551. bool admin)
  552. {
  553. struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
  554. struct blk_mq_tag_set *set;
  555. int ret;
  556. if (admin) {
  557. set = &ctrl->admin_tag_set;
  558. memset(set, 0, sizeof(*set));
  559. set->ops = &nvme_rdma_admin_mq_ops;
  560. set->queue_depth = NVME_RDMA_AQ_BLKMQ_DEPTH;
  561. set->reserved_tags = 2; /* connect + keep-alive */
  562. set->numa_node = NUMA_NO_NODE;
  563. set->cmd_size = sizeof(struct nvme_rdma_request) +
  564. SG_CHUNK_SIZE * sizeof(struct scatterlist);
  565. set->driver_data = ctrl;
  566. set->nr_hw_queues = 1;
  567. set->timeout = ADMIN_TIMEOUT;
  568. } else {
  569. set = &ctrl->tag_set;
  570. memset(set, 0, sizeof(*set));
  571. set->ops = &nvme_rdma_mq_ops;
  572. set->queue_depth = nctrl->opts->queue_size;
  573. set->reserved_tags = 1; /* fabric connect */
  574. set->numa_node = NUMA_NO_NODE;
  575. set->flags = BLK_MQ_F_SHOULD_MERGE;
  576. set->cmd_size = sizeof(struct nvme_rdma_request) +
  577. SG_CHUNK_SIZE * sizeof(struct scatterlist);
  578. set->driver_data = ctrl;
  579. set->nr_hw_queues = nctrl->queue_count - 1;
  580. set->timeout = NVME_IO_TIMEOUT;
  581. }
  582. ret = blk_mq_alloc_tag_set(set);
  583. if (ret)
  584. goto out;
  585. /*
  586. * We need a reference on the device as long as the tag_set is alive,
  587. * as the MRs in the request structures need a valid ib_device.
  588. */
  589. ret = nvme_rdma_dev_get(ctrl->device);
  590. if (!ret) {
  591. ret = -EINVAL;
  592. goto out_free_tagset;
  593. }
  594. return set;
  595. out_free_tagset:
  596. blk_mq_free_tag_set(set);
  597. out:
  598. return ERR_PTR(ret);
  599. }
  600. static void nvme_rdma_destroy_admin_queue(struct nvme_rdma_ctrl *ctrl,
  601. bool remove)
  602. {
  603. nvme_rdma_free_qe(ctrl->queues[0].device->dev, &ctrl->async_event_sqe,
  604. sizeof(struct nvme_command), DMA_TO_DEVICE);
  605. nvme_rdma_stop_queue(&ctrl->queues[0]);
  606. if (remove) {
  607. blk_cleanup_queue(ctrl->ctrl.admin_q);
  608. nvme_rdma_free_tagset(&ctrl->ctrl, true);
  609. }
  610. nvme_rdma_free_queue(&ctrl->queues[0]);
  611. }
  612. static int nvme_rdma_configure_admin_queue(struct nvme_rdma_ctrl *ctrl,
  613. bool new)
  614. {
  615. int error;
  616. error = nvme_rdma_alloc_queue(ctrl, 0, NVME_AQ_DEPTH);
  617. if (error)
  618. return error;
  619. ctrl->device = ctrl->queues[0].device;
  620. ctrl->max_fr_pages = min_t(u32, NVME_RDMA_MAX_SEGMENTS,
  621. ctrl->device->dev->attrs.max_fast_reg_page_list_len);
  622. if (new) {
  623. ctrl->ctrl.admin_tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, true);
  624. if (IS_ERR(ctrl->ctrl.admin_tagset))
  625. goto out_free_queue;
  626. ctrl->ctrl.admin_q = blk_mq_init_queue(&ctrl->admin_tag_set);
  627. if (IS_ERR(ctrl->ctrl.admin_q)) {
  628. error = PTR_ERR(ctrl->ctrl.admin_q);
  629. goto out_free_tagset;
  630. }
  631. } else {
  632. error = blk_mq_reinit_tagset(&ctrl->admin_tag_set,
  633. nvme_rdma_reinit_request);
  634. if (error)
  635. goto out_free_queue;
  636. }
  637. error = nvme_rdma_start_queue(ctrl, 0);
  638. if (error)
  639. goto out_cleanup_queue;
  640. error = ctrl->ctrl.ops->reg_read64(&ctrl->ctrl, NVME_REG_CAP,
  641. &ctrl->ctrl.cap);
  642. if (error) {
  643. dev_err(ctrl->ctrl.device,
  644. "prop_get NVME_REG_CAP failed\n");
  645. goto out_cleanup_queue;
  646. }
  647. ctrl->ctrl.sqsize =
  648. min_t(int, NVME_CAP_MQES(ctrl->ctrl.cap), ctrl->ctrl.sqsize);
  649. error = nvme_enable_ctrl(&ctrl->ctrl, ctrl->ctrl.cap);
  650. if (error)
  651. goto out_cleanup_queue;
  652. ctrl->ctrl.max_hw_sectors =
  653. (ctrl->max_fr_pages - 1) << (ilog2(SZ_4K) - 9);
  654. error = nvme_init_identify(&ctrl->ctrl);
  655. if (error)
  656. goto out_cleanup_queue;
  657. error = nvme_rdma_alloc_qe(ctrl->queues[0].device->dev,
  658. &ctrl->async_event_sqe, sizeof(struct nvme_command),
  659. DMA_TO_DEVICE);
  660. if (error)
  661. goto out_cleanup_queue;
  662. return 0;
  663. out_cleanup_queue:
  664. if (new)
  665. blk_cleanup_queue(ctrl->ctrl.admin_q);
  666. out_free_tagset:
  667. if (new)
  668. nvme_rdma_free_tagset(&ctrl->ctrl, true);
  669. out_free_queue:
  670. nvme_rdma_free_queue(&ctrl->queues[0]);
  671. return error;
  672. }
  673. static void nvme_rdma_destroy_io_queues(struct nvme_rdma_ctrl *ctrl,
  674. bool remove)
  675. {
  676. nvme_rdma_stop_io_queues(ctrl);
  677. if (remove) {
  678. blk_cleanup_queue(ctrl->ctrl.connect_q);
  679. nvme_rdma_free_tagset(&ctrl->ctrl, false);
  680. }
  681. nvme_rdma_free_io_queues(ctrl);
  682. }
  683. static int nvme_rdma_configure_io_queues(struct nvme_rdma_ctrl *ctrl, bool new)
  684. {
  685. int ret;
  686. ret = nvme_rdma_alloc_io_queues(ctrl);
  687. if (ret)
  688. return ret;
  689. if (new) {
  690. ctrl->ctrl.tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, false);
  691. if (IS_ERR(ctrl->ctrl.tagset))
  692. goto out_free_io_queues;
  693. ctrl->ctrl.connect_q = blk_mq_init_queue(&ctrl->tag_set);
  694. if (IS_ERR(ctrl->ctrl.connect_q)) {
  695. ret = PTR_ERR(ctrl->ctrl.connect_q);
  696. goto out_free_tag_set;
  697. }
  698. } else {
  699. ret = blk_mq_reinit_tagset(&ctrl->tag_set,
  700. nvme_rdma_reinit_request);
  701. if (ret)
  702. goto out_free_io_queues;
  703. blk_mq_update_nr_hw_queues(&ctrl->tag_set,
  704. ctrl->ctrl.queue_count - 1);
  705. }
  706. ret = nvme_rdma_start_io_queues(ctrl);
  707. if (ret)
  708. goto out_cleanup_connect_q;
  709. return 0;
  710. out_cleanup_connect_q:
  711. if (new)
  712. blk_cleanup_queue(ctrl->ctrl.connect_q);
  713. out_free_tag_set:
  714. if (new)
  715. nvme_rdma_free_tagset(&ctrl->ctrl, false);
  716. out_free_io_queues:
  717. nvme_rdma_free_io_queues(ctrl);
  718. return ret;
  719. }
  720. static void nvme_rdma_free_ctrl(struct nvme_ctrl *nctrl)
  721. {
  722. struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
  723. if (list_empty(&ctrl->list))
  724. goto free_ctrl;
  725. mutex_lock(&nvme_rdma_ctrl_mutex);
  726. list_del(&ctrl->list);
  727. mutex_unlock(&nvme_rdma_ctrl_mutex);
  728. kfree(ctrl->queues);
  729. nvmf_free_options(nctrl->opts);
  730. free_ctrl:
  731. kfree(ctrl);
  732. }
  733. static void nvme_rdma_reconnect_or_remove(struct nvme_rdma_ctrl *ctrl)
  734. {
  735. /* If we are resetting/deleting then do nothing */
  736. if (ctrl->ctrl.state != NVME_CTRL_RECONNECTING) {
  737. WARN_ON_ONCE(ctrl->ctrl.state == NVME_CTRL_NEW ||
  738. ctrl->ctrl.state == NVME_CTRL_LIVE);
  739. return;
  740. }
  741. if (nvmf_should_reconnect(&ctrl->ctrl)) {
  742. dev_info(ctrl->ctrl.device, "Reconnecting in %d seconds...\n",
  743. ctrl->ctrl.opts->reconnect_delay);
  744. queue_delayed_work(nvme_wq, &ctrl->reconnect_work,
  745. ctrl->ctrl.opts->reconnect_delay * HZ);
  746. } else {
  747. dev_info(ctrl->ctrl.device, "Removing controller...\n");
  748. queue_work(nvme_wq, &ctrl->delete_work);
  749. }
  750. }
  751. static void nvme_rdma_reconnect_ctrl_work(struct work_struct *work)
  752. {
  753. struct nvme_rdma_ctrl *ctrl = container_of(to_delayed_work(work),
  754. struct nvme_rdma_ctrl, reconnect_work);
  755. bool changed;
  756. int ret;
  757. ++ctrl->ctrl.nr_reconnects;
  758. if (ctrl->ctrl.queue_count > 1)
  759. nvme_rdma_destroy_io_queues(ctrl, false);
  760. nvme_rdma_destroy_admin_queue(ctrl, false);
  761. ret = nvme_rdma_configure_admin_queue(ctrl, false);
  762. if (ret)
  763. goto requeue;
  764. if (ctrl->ctrl.queue_count > 1) {
  765. ret = nvme_rdma_configure_io_queues(ctrl, false);
  766. if (ret)
  767. goto requeue;
  768. }
  769. changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE);
  770. WARN_ON_ONCE(!changed);
  771. ctrl->ctrl.nr_reconnects = 0;
  772. nvme_start_ctrl(&ctrl->ctrl);
  773. dev_info(ctrl->ctrl.device, "Successfully reconnected\n");
  774. return;
  775. requeue:
  776. dev_info(ctrl->ctrl.device, "Failed reconnect attempt %d\n",
  777. ctrl->ctrl.nr_reconnects);
  778. nvme_rdma_reconnect_or_remove(ctrl);
  779. }
  780. static void nvme_rdma_error_recovery_work(struct work_struct *work)
  781. {
  782. struct nvme_rdma_ctrl *ctrl = container_of(work,
  783. struct nvme_rdma_ctrl, err_work);
  784. nvme_stop_ctrl(&ctrl->ctrl);
  785. if (ctrl->ctrl.queue_count > 1) {
  786. nvme_stop_queues(&ctrl->ctrl);
  787. nvme_rdma_stop_io_queues(ctrl);
  788. }
  789. blk_mq_quiesce_queue(ctrl->ctrl.admin_q);
  790. nvme_rdma_stop_queue(&ctrl->queues[0]);
  791. /* We must take care of fastfail/requeue all our inflight requests */
  792. if (ctrl->ctrl.queue_count > 1)
  793. blk_mq_tagset_busy_iter(&ctrl->tag_set,
  794. nvme_cancel_request, &ctrl->ctrl);
  795. blk_mq_tagset_busy_iter(&ctrl->admin_tag_set,
  796. nvme_cancel_request, &ctrl->ctrl);
  797. /*
  798. * queues are not a live anymore, so restart the queues to fail fast
  799. * new IO
  800. */
  801. blk_mq_unquiesce_queue(ctrl->ctrl.admin_q);
  802. nvme_start_queues(&ctrl->ctrl);
  803. nvme_rdma_reconnect_or_remove(ctrl);
  804. }
  805. static void nvme_rdma_error_recovery(struct nvme_rdma_ctrl *ctrl)
  806. {
  807. if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_RECONNECTING))
  808. return;
  809. queue_work(nvme_wq, &ctrl->err_work);
  810. }
  811. static void nvme_rdma_wr_error(struct ib_cq *cq, struct ib_wc *wc,
  812. const char *op)
  813. {
  814. struct nvme_rdma_queue *queue = cq->cq_context;
  815. struct nvme_rdma_ctrl *ctrl = queue->ctrl;
  816. if (ctrl->ctrl.state == NVME_CTRL_LIVE)
  817. dev_info(ctrl->ctrl.device,
  818. "%s for CQE 0x%p failed with status %s (%d)\n",
  819. op, wc->wr_cqe,
  820. ib_wc_status_msg(wc->status), wc->status);
  821. nvme_rdma_error_recovery(ctrl);
  822. }
  823. static void nvme_rdma_memreg_done(struct ib_cq *cq, struct ib_wc *wc)
  824. {
  825. if (unlikely(wc->status != IB_WC_SUCCESS))
  826. nvme_rdma_wr_error(cq, wc, "MEMREG");
  827. }
  828. static void nvme_rdma_inv_rkey_done(struct ib_cq *cq, struct ib_wc *wc)
  829. {
  830. if (unlikely(wc->status != IB_WC_SUCCESS))
  831. nvme_rdma_wr_error(cq, wc, "LOCAL_INV");
  832. }
  833. static int nvme_rdma_inv_rkey(struct nvme_rdma_queue *queue,
  834. struct nvme_rdma_request *req)
  835. {
  836. struct ib_send_wr *bad_wr;
  837. struct ib_send_wr wr = {
  838. .opcode = IB_WR_LOCAL_INV,
  839. .next = NULL,
  840. .num_sge = 0,
  841. .send_flags = 0,
  842. .ex.invalidate_rkey = req->mr->rkey,
  843. };
  844. req->reg_cqe.done = nvme_rdma_inv_rkey_done;
  845. wr.wr_cqe = &req->reg_cqe;
  846. return ib_post_send(queue->qp, &wr, &bad_wr);
  847. }
  848. static void nvme_rdma_unmap_data(struct nvme_rdma_queue *queue,
  849. struct request *rq)
  850. {
  851. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  852. struct nvme_rdma_ctrl *ctrl = queue->ctrl;
  853. struct nvme_rdma_device *dev = queue->device;
  854. struct ib_device *ibdev = dev->dev;
  855. int res;
  856. if (!blk_rq_bytes(rq))
  857. return;
  858. if (req->mr->need_inval) {
  859. res = nvme_rdma_inv_rkey(queue, req);
  860. if (unlikely(res < 0)) {
  861. dev_err(ctrl->ctrl.device,
  862. "Queueing INV WR for rkey %#x failed (%d)\n",
  863. req->mr->rkey, res);
  864. nvme_rdma_error_recovery(queue->ctrl);
  865. }
  866. }
  867. ib_dma_unmap_sg(ibdev, req->sg_table.sgl,
  868. req->nents, rq_data_dir(rq) ==
  869. WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
  870. nvme_cleanup_cmd(rq);
  871. sg_free_table_chained(&req->sg_table, true);
  872. }
  873. static int nvme_rdma_set_sg_null(struct nvme_command *c)
  874. {
  875. struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
  876. sg->addr = 0;
  877. put_unaligned_le24(0, sg->length);
  878. put_unaligned_le32(0, sg->key);
  879. sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
  880. return 0;
  881. }
  882. static int nvme_rdma_map_sg_inline(struct nvme_rdma_queue *queue,
  883. struct nvme_rdma_request *req, struct nvme_command *c)
  884. {
  885. struct nvme_sgl_desc *sg = &c->common.dptr.sgl;
  886. req->sge[1].addr = sg_dma_address(req->sg_table.sgl);
  887. req->sge[1].length = sg_dma_len(req->sg_table.sgl);
  888. req->sge[1].lkey = queue->device->pd->local_dma_lkey;
  889. sg->addr = cpu_to_le64(queue->ctrl->ctrl.icdoff);
  890. sg->length = cpu_to_le32(sg_dma_len(req->sg_table.sgl));
  891. sg->type = (NVME_SGL_FMT_DATA_DESC << 4) | NVME_SGL_FMT_OFFSET;
  892. req->inline_data = true;
  893. req->num_sge++;
  894. return 0;
  895. }
  896. static int nvme_rdma_map_sg_single(struct nvme_rdma_queue *queue,
  897. struct nvme_rdma_request *req, struct nvme_command *c)
  898. {
  899. struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
  900. sg->addr = cpu_to_le64(sg_dma_address(req->sg_table.sgl));
  901. put_unaligned_le24(sg_dma_len(req->sg_table.sgl), sg->length);
  902. put_unaligned_le32(queue->device->pd->unsafe_global_rkey, sg->key);
  903. sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
  904. return 0;
  905. }
  906. static int nvme_rdma_map_sg_fr(struct nvme_rdma_queue *queue,
  907. struct nvme_rdma_request *req, struct nvme_command *c,
  908. int count)
  909. {
  910. struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
  911. int nr;
  912. /*
  913. * Align the MR to a 4K page size to match the ctrl page size and
  914. * the block virtual boundary.
  915. */
  916. nr = ib_map_mr_sg(req->mr, req->sg_table.sgl, count, NULL, SZ_4K);
  917. if (unlikely(nr < count)) {
  918. if (nr < 0)
  919. return nr;
  920. return -EINVAL;
  921. }
  922. ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey));
  923. req->reg_cqe.done = nvme_rdma_memreg_done;
  924. memset(&req->reg_wr, 0, sizeof(req->reg_wr));
  925. req->reg_wr.wr.opcode = IB_WR_REG_MR;
  926. req->reg_wr.wr.wr_cqe = &req->reg_cqe;
  927. req->reg_wr.wr.num_sge = 0;
  928. req->reg_wr.mr = req->mr;
  929. req->reg_wr.key = req->mr->rkey;
  930. req->reg_wr.access = IB_ACCESS_LOCAL_WRITE |
  931. IB_ACCESS_REMOTE_READ |
  932. IB_ACCESS_REMOTE_WRITE;
  933. req->mr->need_inval = true;
  934. sg->addr = cpu_to_le64(req->mr->iova);
  935. put_unaligned_le24(req->mr->length, sg->length);
  936. put_unaligned_le32(req->mr->rkey, sg->key);
  937. sg->type = (NVME_KEY_SGL_FMT_DATA_DESC << 4) |
  938. NVME_SGL_FMT_INVALIDATE;
  939. return 0;
  940. }
  941. static int nvme_rdma_map_data(struct nvme_rdma_queue *queue,
  942. struct request *rq, struct nvme_command *c)
  943. {
  944. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  945. struct nvme_rdma_device *dev = queue->device;
  946. struct ib_device *ibdev = dev->dev;
  947. int count, ret;
  948. req->num_sge = 1;
  949. req->inline_data = false;
  950. req->mr->need_inval = false;
  951. c->common.flags |= NVME_CMD_SGL_METABUF;
  952. if (!blk_rq_bytes(rq))
  953. return nvme_rdma_set_sg_null(c);
  954. req->sg_table.sgl = req->first_sgl;
  955. ret = sg_alloc_table_chained(&req->sg_table,
  956. blk_rq_nr_phys_segments(rq), req->sg_table.sgl);
  957. if (ret)
  958. return -ENOMEM;
  959. req->nents = blk_rq_map_sg(rq->q, rq, req->sg_table.sgl);
  960. count = ib_dma_map_sg(ibdev, req->sg_table.sgl, req->nents,
  961. rq_data_dir(rq) == WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
  962. if (unlikely(count <= 0)) {
  963. sg_free_table_chained(&req->sg_table, true);
  964. return -EIO;
  965. }
  966. if (count == 1) {
  967. if (rq_data_dir(rq) == WRITE && nvme_rdma_queue_idx(queue) &&
  968. blk_rq_payload_bytes(rq) <=
  969. nvme_rdma_inline_data_size(queue))
  970. return nvme_rdma_map_sg_inline(queue, req, c);
  971. if (dev->pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY)
  972. return nvme_rdma_map_sg_single(queue, req, c);
  973. }
  974. return nvme_rdma_map_sg_fr(queue, req, c, count);
  975. }
  976. static void nvme_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc)
  977. {
  978. if (unlikely(wc->status != IB_WC_SUCCESS))
  979. nvme_rdma_wr_error(cq, wc, "SEND");
  980. }
  981. /*
  982. * We want to signal completion at least every queue depth/2. This returns the
  983. * largest power of two that is not above half of (queue size + 1) to optimize
  984. * (avoid divisions).
  985. */
  986. static inline bool nvme_rdma_queue_sig_limit(struct nvme_rdma_queue *queue)
  987. {
  988. int limit = 1 << ilog2((queue->queue_size + 1) / 2);
  989. return (atomic_inc_return(&queue->sig_count) & (limit - 1)) == 0;
  990. }
  991. static int nvme_rdma_post_send(struct nvme_rdma_queue *queue,
  992. struct nvme_rdma_qe *qe, struct ib_sge *sge, u32 num_sge,
  993. struct ib_send_wr *first, bool flush)
  994. {
  995. struct ib_send_wr wr, *bad_wr;
  996. int ret;
  997. sge->addr = qe->dma;
  998. sge->length = sizeof(struct nvme_command),
  999. sge->lkey = queue->device->pd->local_dma_lkey;
  1000. qe->cqe.done = nvme_rdma_send_done;
  1001. wr.next = NULL;
  1002. wr.wr_cqe = &qe->cqe;
  1003. wr.sg_list = sge;
  1004. wr.num_sge = num_sge;
  1005. wr.opcode = IB_WR_SEND;
  1006. wr.send_flags = 0;
  1007. /*
  1008. * Unsignalled send completions are another giant desaster in the
  1009. * IB Verbs spec: If we don't regularly post signalled sends
  1010. * the send queue will fill up and only a QP reset will rescue us.
  1011. * Would have been way to obvious to handle this in hardware or
  1012. * at least the RDMA stack..
  1013. *
  1014. * Always signal the flushes. The magic request used for the flush
  1015. * sequencer is not allocated in our driver's tagset and it's
  1016. * triggered to be freed by blk_cleanup_queue(). So we need to
  1017. * always mark it as signaled to ensure that the "wr_cqe", which is
  1018. * embedded in request's payload, is not freed when __ib_process_cq()
  1019. * calls wr_cqe->done().
  1020. */
  1021. if (nvme_rdma_queue_sig_limit(queue) || flush)
  1022. wr.send_flags |= IB_SEND_SIGNALED;
  1023. if (first)
  1024. first->next = &wr;
  1025. else
  1026. first = &wr;
  1027. ret = ib_post_send(queue->qp, first, &bad_wr);
  1028. if (unlikely(ret)) {
  1029. dev_err(queue->ctrl->ctrl.device,
  1030. "%s failed with error code %d\n", __func__, ret);
  1031. }
  1032. return ret;
  1033. }
  1034. static int nvme_rdma_post_recv(struct nvme_rdma_queue *queue,
  1035. struct nvme_rdma_qe *qe)
  1036. {
  1037. struct ib_recv_wr wr, *bad_wr;
  1038. struct ib_sge list;
  1039. int ret;
  1040. list.addr = qe->dma;
  1041. list.length = sizeof(struct nvme_completion);
  1042. list.lkey = queue->device->pd->local_dma_lkey;
  1043. qe->cqe.done = nvme_rdma_recv_done;
  1044. wr.next = NULL;
  1045. wr.wr_cqe = &qe->cqe;
  1046. wr.sg_list = &list;
  1047. wr.num_sge = 1;
  1048. ret = ib_post_recv(queue->qp, &wr, &bad_wr);
  1049. if (unlikely(ret)) {
  1050. dev_err(queue->ctrl->ctrl.device,
  1051. "%s failed with error code %d\n", __func__, ret);
  1052. }
  1053. return ret;
  1054. }
  1055. static struct blk_mq_tags *nvme_rdma_tagset(struct nvme_rdma_queue *queue)
  1056. {
  1057. u32 queue_idx = nvme_rdma_queue_idx(queue);
  1058. if (queue_idx == 0)
  1059. return queue->ctrl->admin_tag_set.tags[queue_idx];
  1060. return queue->ctrl->tag_set.tags[queue_idx - 1];
  1061. }
  1062. static void nvme_rdma_submit_async_event(struct nvme_ctrl *arg, int aer_idx)
  1063. {
  1064. struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(arg);
  1065. struct nvme_rdma_queue *queue = &ctrl->queues[0];
  1066. struct ib_device *dev = queue->device->dev;
  1067. struct nvme_rdma_qe *sqe = &ctrl->async_event_sqe;
  1068. struct nvme_command *cmd = sqe->data;
  1069. struct ib_sge sge;
  1070. int ret;
  1071. if (WARN_ON_ONCE(aer_idx != 0))
  1072. return;
  1073. ib_dma_sync_single_for_cpu(dev, sqe->dma, sizeof(*cmd), DMA_TO_DEVICE);
  1074. memset(cmd, 0, sizeof(*cmd));
  1075. cmd->common.opcode = nvme_admin_async_event;
  1076. cmd->common.command_id = NVME_RDMA_AQ_BLKMQ_DEPTH;
  1077. cmd->common.flags |= NVME_CMD_SGL_METABUF;
  1078. nvme_rdma_set_sg_null(cmd);
  1079. ib_dma_sync_single_for_device(dev, sqe->dma, sizeof(*cmd),
  1080. DMA_TO_DEVICE);
  1081. ret = nvme_rdma_post_send(queue, sqe, &sge, 1, NULL, false);
  1082. WARN_ON_ONCE(ret);
  1083. }
  1084. static int nvme_rdma_process_nvme_rsp(struct nvme_rdma_queue *queue,
  1085. struct nvme_completion *cqe, struct ib_wc *wc, int tag)
  1086. {
  1087. struct request *rq;
  1088. struct nvme_rdma_request *req;
  1089. int ret = 0;
  1090. rq = blk_mq_tag_to_rq(nvme_rdma_tagset(queue), cqe->command_id);
  1091. if (!rq) {
  1092. dev_err(queue->ctrl->ctrl.device,
  1093. "tag 0x%x on QP %#x not found\n",
  1094. cqe->command_id, queue->qp->qp_num);
  1095. nvme_rdma_error_recovery(queue->ctrl);
  1096. return ret;
  1097. }
  1098. req = blk_mq_rq_to_pdu(rq);
  1099. if (rq->tag == tag)
  1100. ret = 1;
  1101. if ((wc->wc_flags & IB_WC_WITH_INVALIDATE) &&
  1102. wc->ex.invalidate_rkey == req->mr->rkey)
  1103. req->mr->need_inval = false;
  1104. nvme_end_request(rq, cqe->status, cqe->result);
  1105. return ret;
  1106. }
  1107. static int __nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc, int tag)
  1108. {
  1109. struct nvme_rdma_qe *qe =
  1110. container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe);
  1111. struct nvme_rdma_queue *queue = cq->cq_context;
  1112. struct ib_device *ibdev = queue->device->dev;
  1113. struct nvme_completion *cqe = qe->data;
  1114. const size_t len = sizeof(struct nvme_completion);
  1115. int ret = 0;
  1116. if (unlikely(wc->status != IB_WC_SUCCESS)) {
  1117. nvme_rdma_wr_error(cq, wc, "RECV");
  1118. return 0;
  1119. }
  1120. ib_dma_sync_single_for_cpu(ibdev, qe->dma, len, DMA_FROM_DEVICE);
  1121. /*
  1122. * AEN requests are special as they don't time out and can
  1123. * survive any kind of queue freeze and often don't respond to
  1124. * aborts. We don't even bother to allocate a struct request
  1125. * for them but rather special case them here.
  1126. */
  1127. if (unlikely(nvme_rdma_queue_idx(queue) == 0 &&
  1128. cqe->command_id >= NVME_RDMA_AQ_BLKMQ_DEPTH))
  1129. nvme_complete_async_event(&queue->ctrl->ctrl, cqe->status,
  1130. &cqe->result);
  1131. else
  1132. ret = nvme_rdma_process_nvme_rsp(queue, cqe, wc, tag);
  1133. ib_dma_sync_single_for_device(ibdev, qe->dma, len, DMA_FROM_DEVICE);
  1134. nvme_rdma_post_recv(queue, qe);
  1135. return ret;
  1136. }
  1137. static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc)
  1138. {
  1139. __nvme_rdma_recv_done(cq, wc, -1);
  1140. }
  1141. static int nvme_rdma_conn_established(struct nvme_rdma_queue *queue)
  1142. {
  1143. int ret, i;
  1144. for (i = 0; i < queue->queue_size; i++) {
  1145. ret = nvme_rdma_post_recv(queue, &queue->rsp_ring[i]);
  1146. if (ret)
  1147. goto out_destroy_queue_ib;
  1148. }
  1149. return 0;
  1150. out_destroy_queue_ib:
  1151. nvme_rdma_destroy_queue_ib(queue);
  1152. return ret;
  1153. }
  1154. static int nvme_rdma_conn_rejected(struct nvme_rdma_queue *queue,
  1155. struct rdma_cm_event *ev)
  1156. {
  1157. struct rdma_cm_id *cm_id = queue->cm_id;
  1158. int status = ev->status;
  1159. const char *rej_msg;
  1160. const struct nvme_rdma_cm_rej *rej_data;
  1161. u8 rej_data_len;
  1162. rej_msg = rdma_reject_msg(cm_id, status);
  1163. rej_data = rdma_consumer_reject_data(cm_id, ev, &rej_data_len);
  1164. if (rej_data && rej_data_len >= sizeof(u16)) {
  1165. u16 sts = le16_to_cpu(rej_data->sts);
  1166. dev_err(queue->ctrl->ctrl.device,
  1167. "Connect rejected: status %d (%s) nvme status %d (%s).\n",
  1168. status, rej_msg, sts, nvme_rdma_cm_msg(sts));
  1169. } else {
  1170. dev_err(queue->ctrl->ctrl.device,
  1171. "Connect rejected: status %d (%s).\n", status, rej_msg);
  1172. }
  1173. return -ECONNRESET;
  1174. }
  1175. static int nvme_rdma_addr_resolved(struct nvme_rdma_queue *queue)
  1176. {
  1177. int ret;
  1178. ret = nvme_rdma_create_queue_ib(queue);
  1179. if (ret)
  1180. return ret;
  1181. ret = rdma_resolve_route(queue->cm_id, NVME_RDMA_CONNECT_TIMEOUT_MS);
  1182. if (ret) {
  1183. dev_err(queue->ctrl->ctrl.device,
  1184. "rdma_resolve_route failed (%d).\n",
  1185. queue->cm_error);
  1186. goto out_destroy_queue;
  1187. }
  1188. return 0;
  1189. out_destroy_queue:
  1190. nvme_rdma_destroy_queue_ib(queue);
  1191. return ret;
  1192. }
  1193. static int nvme_rdma_route_resolved(struct nvme_rdma_queue *queue)
  1194. {
  1195. struct nvme_rdma_ctrl *ctrl = queue->ctrl;
  1196. struct rdma_conn_param param = { };
  1197. struct nvme_rdma_cm_req priv = { };
  1198. int ret;
  1199. param.qp_num = queue->qp->qp_num;
  1200. param.flow_control = 1;
  1201. param.responder_resources = queue->device->dev->attrs.max_qp_rd_atom;
  1202. /* maximum retry count */
  1203. param.retry_count = 7;
  1204. param.rnr_retry_count = 7;
  1205. param.private_data = &priv;
  1206. param.private_data_len = sizeof(priv);
  1207. priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0);
  1208. priv.qid = cpu_to_le16(nvme_rdma_queue_idx(queue));
  1209. /*
  1210. * set the admin queue depth to the minimum size
  1211. * specified by the Fabrics standard.
  1212. */
  1213. if (priv.qid == 0) {
  1214. priv.hrqsize = cpu_to_le16(NVME_AQ_DEPTH);
  1215. priv.hsqsize = cpu_to_le16(NVME_AQ_DEPTH - 1);
  1216. } else {
  1217. /*
  1218. * current interpretation of the fabrics spec
  1219. * is at minimum you make hrqsize sqsize+1, or a
  1220. * 1's based representation of sqsize.
  1221. */
  1222. priv.hrqsize = cpu_to_le16(queue->queue_size);
  1223. priv.hsqsize = cpu_to_le16(queue->ctrl->ctrl.sqsize);
  1224. }
  1225. ret = rdma_connect(queue->cm_id, &param);
  1226. if (ret) {
  1227. dev_err(ctrl->ctrl.device,
  1228. "rdma_connect failed (%d).\n", ret);
  1229. goto out_destroy_queue_ib;
  1230. }
  1231. return 0;
  1232. out_destroy_queue_ib:
  1233. nvme_rdma_destroy_queue_ib(queue);
  1234. return ret;
  1235. }
  1236. static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id,
  1237. struct rdma_cm_event *ev)
  1238. {
  1239. struct nvme_rdma_queue *queue = cm_id->context;
  1240. int cm_error = 0;
  1241. dev_dbg(queue->ctrl->ctrl.device, "%s (%d): status %d id %p\n",
  1242. rdma_event_msg(ev->event), ev->event,
  1243. ev->status, cm_id);
  1244. switch (ev->event) {
  1245. case RDMA_CM_EVENT_ADDR_RESOLVED:
  1246. cm_error = nvme_rdma_addr_resolved(queue);
  1247. break;
  1248. case RDMA_CM_EVENT_ROUTE_RESOLVED:
  1249. cm_error = nvme_rdma_route_resolved(queue);
  1250. break;
  1251. case RDMA_CM_EVENT_ESTABLISHED:
  1252. queue->cm_error = nvme_rdma_conn_established(queue);
  1253. /* complete cm_done regardless of success/failure */
  1254. complete(&queue->cm_done);
  1255. return 0;
  1256. case RDMA_CM_EVENT_REJECTED:
  1257. nvme_rdma_destroy_queue_ib(queue);
  1258. cm_error = nvme_rdma_conn_rejected(queue, ev);
  1259. break;
  1260. case RDMA_CM_EVENT_ROUTE_ERROR:
  1261. case RDMA_CM_EVENT_CONNECT_ERROR:
  1262. case RDMA_CM_EVENT_UNREACHABLE:
  1263. nvme_rdma_destroy_queue_ib(queue);
  1264. case RDMA_CM_EVENT_ADDR_ERROR:
  1265. dev_dbg(queue->ctrl->ctrl.device,
  1266. "CM error event %d\n", ev->event);
  1267. cm_error = -ECONNRESET;
  1268. break;
  1269. case RDMA_CM_EVENT_DISCONNECTED:
  1270. case RDMA_CM_EVENT_ADDR_CHANGE:
  1271. case RDMA_CM_EVENT_TIMEWAIT_EXIT:
  1272. dev_dbg(queue->ctrl->ctrl.device,
  1273. "disconnect received - connection closed\n");
  1274. nvme_rdma_error_recovery(queue->ctrl);
  1275. break;
  1276. case RDMA_CM_EVENT_DEVICE_REMOVAL:
  1277. /* device removal is handled via the ib_client API */
  1278. break;
  1279. default:
  1280. dev_err(queue->ctrl->ctrl.device,
  1281. "Unexpected RDMA CM event (%d)\n", ev->event);
  1282. nvme_rdma_error_recovery(queue->ctrl);
  1283. break;
  1284. }
  1285. if (cm_error) {
  1286. queue->cm_error = cm_error;
  1287. complete(&queue->cm_done);
  1288. }
  1289. return 0;
  1290. }
  1291. static enum blk_eh_timer_return
  1292. nvme_rdma_timeout(struct request *rq, bool reserved)
  1293. {
  1294. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  1295. /* queue error recovery */
  1296. nvme_rdma_error_recovery(req->queue->ctrl);
  1297. /* fail with DNR on cmd timeout */
  1298. nvme_req(rq)->status = NVME_SC_ABORT_REQ | NVME_SC_DNR;
  1299. return BLK_EH_HANDLED;
  1300. }
  1301. /*
  1302. * We cannot accept any other command until the Connect command has completed.
  1303. */
  1304. static inline blk_status_t
  1305. nvme_rdma_queue_is_ready(struct nvme_rdma_queue *queue, struct request *rq)
  1306. {
  1307. if (unlikely(!test_bit(NVME_RDMA_Q_LIVE, &queue->flags))) {
  1308. struct nvme_command *cmd = nvme_req(rq)->cmd;
  1309. if (!blk_rq_is_passthrough(rq) ||
  1310. cmd->common.opcode != nvme_fabrics_command ||
  1311. cmd->fabrics.fctype != nvme_fabrics_type_connect) {
  1312. /*
  1313. * reconnecting state means transport disruption, which
  1314. * can take a long time and even might fail permanently,
  1315. * so we can't let incoming I/O be requeued forever.
  1316. * fail it fast to allow upper layers a chance to
  1317. * failover.
  1318. */
  1319. if (queue->ctrl->ctrl.state == NVME_CTRL_RECONNECTING)
  1320. return BLK_STS_IOERR;
  1321. return BLK_STS_RESOURCE; /* try again later */
  1322. }
  1323. }
  1324. return 0;
  1325. }
  1326. static blk_status_t nvme_rdma_queue_rq(struct blk_mq_hw_ctx *hctx,
  1327. const struct blk_mq_queue_data *bd)
  1328. {
  1329. struct nvme_ns *ns = hctx->queue->queuedata;
  1330. struct nvme_rdma_queue *queue = hctx->driver_data;
  1331. struct request *rq = bd->rq;
  1332. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  1333. struct nvme_rdma_qe *sqe = &req->sqe;
  1334. struct nvme_command *c = sqe->data;
  1335. bool flush = false;
  1336. struct ib_device *dev;
  1337. blk_status_t ret;
  1338. int err;
  1339. WARN_ON_ONCE(rq->tag < 0);
  1340. ret = nvme_rdma_queue_is_ready(queue, rq);
  1341. if (unlikely(ret))
  1342. return ret;
  1343. dev = queue->device->dev;
  1344. ib_dma_sync_single_for_cpu(dev, sqe->dma,
  1345. sizeof(struct nvme_command), DMA_TO_DEVICE);
  1346. ret = nvme_setup_cmd(ns, rq, c);
  1347. if (ret)
  1348. return ret;
  1349. blk_mq_start_request(rq);
  1350. err = nvme_rdma_map_data(queue, rq, c);
  1351. if (unlikely(err < 0)) {
  1352. dev_err(queue->ctrl->ctrl.device,
  1353. "Failed to map data (%d)\n", err);
  1354. nvme_cleanup_cmd(rq);
  1355. goto err;
  1356. }
  1357. ib_dma_sync_single_for_device(dev, sqe->dma,
  1358. sizeof(struct nvme_command), DMA_TO_DEVICE);
  1359. if (req_op(rq) == REQ_OP_FLUSH)
  1360. flush = true;
  1361. err = nvme_rdma_post_send(queue, sqe, req->sge, req->num_sge,
  1362. req->mr->need_inval ? &req->reg_wr.wr : NULL, flush);
  1363. if (unlikely(err)) {
  1364. nvme_rdma_unmap_data(queue, rq);
  1365. goto err;
  1366. }
  1367. return BLK_STS_OK;
  1368. err:
  1369. if (err == -ENOMEM || err == -EAGAIN)
  1370. return BLK_STS_RESOURCE;
  1371. return BLK_STS_IOERR;
  1372. }
  1373. static int nvme_rdma_poll(struct blk_mq_hw_ctx *hctx, unsigned int tag)
  1374. {
  1375. struct nvme_rdma_queue *queue = hctx->driver_data;
  1376. struct ib_cq *cq = queue->ib_cq;
  1377. struct ib_wc wc;
  1378. int found = 0;
  1379. while (ib_poll_cq(cq, 1, &wc) > 0) {
  1380. struct ib_cqe *cqe = wc.wr_cqe;
  1381. if (cqe) {
  1382. if (cqe->done == nvme_rdma_recv_done)
  1383. found |= __nvme_rdma_recv_done(cq, &wc, tag);
  1384. else
  1385. cqe->done(cq, &wc);
  1386. }
  1387. }
  1388. return found;
  1389. }
  1390. static void nvme_rdma_complete_rq(struct request *rq)
  1391. {
  1392. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  1393. nvme_rdma_unmap_data(req->queue, rq);
  1394. nvme_complete_rq(rq);
  1395. }
  1396. static int nvme_rdma_map_queues(struct blk_mq_tag_set *set)
  1397. {
  1398. struct nvme_rdma_ctrl *ctrl = set->driver_data;
  1399. return blk_mq_rdma_map_queues(set, ctrl->device->dev, 0);
  1400. }
  1401. static const struct blk_mq_ops nvme_rdma_mq_ops = {
  1402. .queue_rq = nvme_rdma_queue_rq,
  1403. .complete = nvme_rdma_complete_rq,
  1404. .init_request = nvme_rdma_init_request,
  1405. .exit_request = nvme_rdma_exit_request,
  1406. .init_hctx = nvme_rdma_init_hctx,
  1407. .poll = nvme_rdma_poll,
  1408. .timeout = nvme_rdma_timeout,
  1409. .map_queues = nvme_rdma_map_queues,
  1410. };
  1411. static const struct blk_mq_ops nvme_rdma_admin_mq_ops = {
  1412. .queue_rq = nvme_rdma_queue_rq,
  1413. .complete = nvme_rdma_complete_rq,
  1414. .init_request = nvme_rdma_init_request,
  1415. .exit_request = nvme_rdma_exit_request,
  1416. .init_hctx = nvme_rdma_init_admin_hctx,
  1417. .timeout = nvme_rdma_timeout,
  1418. };
  1419. static void nvme_rdma_shutdown_ctrl(struct nvme_rdma_ctrl *ctrl, bool shutdown)
  1420. {
  1421. cancel_work_sync(&ctrl->err_work);
  1422. cancel_delayed_work_sync(&ctrl->reconnect_work);
  1423. if (ctrl->ctrl.queue_count > 1) {
  1424. nvme_stop_queues(&ctrl->ctrl);
  1425. blk_mq_tagset_busy_iter(&ctrl->tag_set,
  1426. nvme_cancel_request, &ctrl->ctrl);
  1427. nvme_rdma_destroy_io_queues(ctrl, shutdown);
  1428. }
  1429. if (shutdown)
  1430. nvme_shutdown_ctrl(&ctrl->ctrl);
  1431. else
  1432. nvme_disable_ctrl(&ctrl->ctrl, ctrl->ctrl.cap);
  1433. blk_mq_quiesce_queue(ctrl->ctrl.admin_q);
  1434. blk_mq_tagset_busy_iter(&ctrl->admin_tag_set,
  1435. nvme_cancel_request, &ctrl->ctrl);
  1436. blk_mq_unquiesce_queue(ctrl->ctrl.admin_q);
  1437. nvme_rdma_destroy_admin_queue(ctrl, shutdown);
  1438. }
  1439. static void nvme_rdma_remove_ctrl(struct nvme_rdma_ctrl *ctrl)
  1440. {
  1441. nvme_remove_namespaces(&ctrl->ctrl);
  1442. nvme_rdma_shutdown_ctrl(ctrl, true);
  1443. nvme_uninit_ctrl(&ctrl->ctrl);
  1444. nvme_put_ctrl(&ctrl->ctrl);
  1445. }
  1446. static void nvme_rdma_del_ctrl_work(struct work_struct *work)
  1447. {
  1448. struct nvme_rdma_ctrl *ctrl = container_of(work,
  1449. struct nvme_rdma_ctrl, delete_work);
  1450. nvme_stop_ctrl(&ctrl->ctrl);
  1451. nvme_rdma_remove_ctrl(ctrl);
  1452. }
  1453. static int __nvme_rdma_del_ctrl(struct nvme_rdma_ctrl *ctrl)
  1454. {
  1455. if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_DELETING))
  1456. return -EBUSY;
  1457. if (!queue_work(nvme_wq, &ctrl->delete_work))
  1458. return -EBUSY;
  1459. return 0;
  1460. }
  1461. static int nvme_rdma_del_ctrl(struct nvme_ctrl *nctrl)
  1462. {
  1463. struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
  1464. int ret = 0;
  1465. /*
  1466. * Keep a reference until all work is flushed since
  1467. * __nvme_rdma_del_ctrl can free the ctrl mem
  1468. */
  1469. if (!kref_get_unless_zero(&ctrl->ctrl.kref))
  1470. return -EBUSY;
  1471. ret = __nvme_rdma_del_ctrl(ctrl);
  1472. if (!ret)
  1473. flush_work(&ctrl->delete_work);
  1474. nvme_put_ctrl(&ctrl->ctrl);
  1475. return ret;
  1476. }
  1477. static void nvme_rdma_reset_ctrl_work(struct work_struct *work)
  1478. {
  1479. struct nvme_rdma_ctrl *ctrl =
  1480. container_of(work, struct nvme_rdma_ctrl, ctrl.reset_work);
  1481. int ret;
  1482. bool changed;
  1483. nvme_stop_ctrl(&ctrl->ctrl);
  1484. nvme_rdma_shutdown_ctrl(ctrl, false);
  1485. ret = nvme_rdma_configure_admin_queue(ctrl, false);
  1486. if (ret)
  1487. goto out_fail;
  1488. if (ctrl->ctrl.queue_count > 1) {
  1489. ret = nvme_rdma_configure_io_queues(ctrl, false);
  1490. if (ret)
  1491. goto out_fail;
  1492. }
  1493. changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE);
  1494. WARN_ON_ONCE(!changed);
  1495. nvme_start_ctrl(&ctrl->ctrl);
  1496. return;
  1497. out_fail:
  1498. dev_warn(ctrl->ctrl.device, "Removing after reset failure\n");
  1499. nvme_rdma_remove_ctrl(ctrl);
  1500. }
  1501. static const struct nvme_ctrl_ops nvme_rdma_ctrl_ops = {
  1502. .name = "rdma",
  1503. .module = THIS_MODULE,
  1504. .flags = NVME_F_FABRICS,
  1505. .reg_read32 = nvmf_reg_read32,
  1506. .reg_read64 = nvmf_reg_read64,
  1507. .reg_write32 = nvmf_reg_write32,
  1508. .free_ctrl = nvme_rdma_free_ctrl,
  1509. .submit_async_event = nvme_rdma_submit_async_event,
  1510. .delete_ctrl = nvme_rdma_del_ctrl,
  1511. .get_address = nvmf_get_address,
  1512. };
  1513. static struct nvme_ctrl *nvme_rdma_create_ctrl(struct device *dev,
  1514. struct nvmf_ctrl_options *opts)
  1515. {
  1516. struct nvme_rdma_ctrl *ctrl;
  1517. int ret;
  1518. bool changed;
  1519. char *port;
  1520. ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL);
  1521. if (!ctrl)
  1522. return ERR_PTR(-ENOMEM);
  1523. ctrl->ctrl.opts = opts;
  1524. INIT_LIST_HEAD(&ctrl->list);
  1525. if (opts->mask & NVMF_OPT_TRSVCID)
  1526. port = opts->trsvcid;
  1527. else
  1528. port = __stringify(NVME_RDMA_IP_PORT);
  1529. ret = inet_pton_with_scope(&init_net, AF_UNSPEC,
  1530. opts->traddr, port, &ctrl->addr);
  1531. if (ret) {
  1532. pr_err("malformed address passed: %s:%s\n", opts->traddr, port);
  1533. goto out_free_ctrl;
  1534. }
  1535. if (opts->mask & NVMF_OPT_HOST_TRADDR) {
  1536. ret = inet_pton_with_scope(&init_net, AF_UNSPEC,
  1537. opts->host_traddr, NULL, &ctrl->src_addr);
  1538. if (ret) {
  1539. pr_err("malformed src address passed: %s\n",
  1540. opts->host_traddr);
  1541. goto out_free_ctrl;
  1542. }
  1543. }
  1544. ret = nvme_init_ctrl(&ctrl->ctrl, dev, &nvme_rdma_ctrl_ops,
  1545. 0 /* no quirks, we're perfect! */);
  1546. if (ret)
  1547. goto out_free_ctrl;
  1548. INIT_DELAYED_WORK(&ctrl->reconnect_work,
  1549. nvme_rdma_reconnect_ctrl_work);
  1550. INIT_WORK(&ctrl->err_work, nvme_rdma_error_recovery_work);
  1551. INIT_WORK(&ctrl->delete_work, nvme_rdma_del_ctrl_work);
  1552. INIT_WORK(&ctrl->ctrl.reset_work, nvme_rdma_reset_ctrl_work);
  1553. ctrl->ctrl.queue_count = opts->nr_io_queues + 1; /* +1 for admin queue */
  1554. ctrl->ctrl.sqsize = opts->queue_size - 1;
  1555. ctrl->ctrl.kato = opts->kato;
  1556. ret = -ENOMEM;
  1557. ctrl->queues = kcalloc(ctrl->ctrl.queue_count, sizeof(*ctrl->queues),
  1558. GFP_KERNEL);
  1559. if (!ctrl->queues)
  1560. goto out_uninit_ctrl;
  1561. ret = nvme_rdma_configure_admin_queue(ctrl, true);
  1562. if (ret)
  1563. goto out_kfree_queues;
  1564. /* sanity check icdoff */
  1565. if (ctrl->ctrl.icdoff) {
  1566. dev_err(ctrl->ctrl.device, "icdoff is not supported!\n");
  1567. ret = -EINVAL;
  1568. goto out_remove_admin_queue;
  1569. }
  1570. /* sanity check keyed sgls */
  1571. if (!(ctrl->ctrl.sgls & (1 << 20))) {
  1572. dev_err(ctrl->ctrl.device, "Mandatory keyed sgls are not support\n");
  1573. ret = -EINVAL;
  1574. goto out_remove_admin_queue;
  1575. }
  1576. if (opts->queue_size > ctrl->ctrl.maxcmd) {
  1577. /* warn if maxcmd is lower than queue_size */
  1578. dev_warn(ctrl->ctrl.device,
  1579. "queue_size %zu > ctrl maxcmd %u, clamping down\n",
  1580. opts->queue_size, ctrl->ctrl.maxcmd);
  1581. opts->queue_size = ctrl->ctrl.maxcmd;
  1582. }
  1583. if (opts->queue_size > ctrl->ctrl.sqsize + 1) {
  1584. /* warn if sqsize is lower than queue_size */
  1585. dev_warn(ctrl->ctrl.device,
  1586. "queue_size %zu > ctrl sqsize %u, clamping down\n",
  1587. opts->queue_size, ctrl->ctrl.sqsize + 1);
  1588. opts->queue_size = ctrl->ctrl.sqsize + 1;
  1589. }
  1590. if (opts->nr_io_queues) {
  1591. ret = nvme_rdma_configure_io_queues(ctrl, true);
  1592. if (ret)
  1593. goto out_remove_admin_queue;
  1594. }
  1595. changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE);
  1596. WARN_ON_ONCE(!changed);
  1597. dev_info(ctrl->ctrl.device, "new ctrl: NQN \"%s\", addr %pISpcs\n",
  1598. ctrl->ctrl.opts->subsysnqn, &ctrl->addr);
  1599. kref_get(&ctrl->ctrl.kref);
  1600. mutex_lock(&nvme_rdma_ctrl_mutex);
  1601. list_add_tail(&ctrl->list, &nvme_rdma_ctrl_list);
  1602. mutex_unlock(&nvme_rdma_ctrl_mutex);
  1603. nvme_start_ctrl(&ctrl->ctrl);
  1604. return &ctrl->ctrl;
  1605. out_remove_admin_queue:
  1606. nvme_rdma_destroy_admin_queue(ctrl, true);
  1607. out_kfree_queues:
  1608. kfree(ctrl->queues);
  1609. out_uninit_ctrl:
  1610. nvme_uninit_ctrl(&ctrl->ctrl);
  1611. nvme_put_ctrl(&ctrl->ctrl);
  1612. if (ret > 0)
  1613. ret = -EIO;
  1614. return ERR_PTR(ret);
  1615. out_free_ctrl:
  1616. kfree(ctrl);
  1617. return ERR_PTR(ret);
  1618. }
  1619. static struct nvmf_transport_ops nvme_rdma_transport = {
  1620. .name = "rdma",
  1621. .required_opts = NVMF_OPT_TRADDR,
  1622. .allowed_opts = NVMF_OPT_TRSVCID | NVMF_OPT_RECONNECT_DELAY |
  1623. NVMF_OPT_HOST_TRADDR | NVMF_OPT_CTRL_LOSS_TMO,
  1624. .create_ctrl = nvme_rdma_create_ctrl,
  1625. };
  1626. static void nvme_rdma_remove_one(struct ib_device *ib_device, void *client_data)
  1627. {
  1628. struct nvme_rdma_ctrl *ctrl;
  1629. /* Delete all controllers using this device */
  1630. mutex_lock(&nvme_rdma_ctrl_mutex);
  1631. list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) {
  1632. if (ctrl->device->dev != ib_device)
  1633. continue;
  1634. dev_info(ctrl->ctrl.device,
  1635. "Removing ctrl: NQN \"%s\", addr %pISp\n",
  1636. ctrl->ctrl.opts->subsysnqn, &ctrl->addr);
  1637. __nvme_rdma_del_ctrl(ctrl);
  1638. }
  1639. mutex_unlock(&nvme_rdma_ctrl_mutex);
  1640. flush_workqueue(nvme_wq);
  1641. }
  1642. static struct ib_client nvme_rdma_ib_client = {
  1643. .name = "nvme_rdma",
  1644. .remove = nvme_rdma_remove_one
  1645. };
  1646. static int __init nvme_rdma_init_module(void)
  1647. {
  1648. int ret;
  1649. ret = ib_register_client(&nvme_rdma_ib_client);
  1650. if (ret)
  1651. return ret;
  1652. ret = nvmf_register_transport(&nvme_rdma_transport);
  1653. if (ret)
  1654. goto err_unreg_client;
  1655. return 0;
  1656. err_unreg_client:
  1657. ib_unregister_client(&nvme_rdma_ib_client);
  1658. return ret;
  1659. }
  1660. static void __exit nvme_rdma_cleanup_module(void)
  1661. {
  1662. nvmf_unregister_transport(&nvme_rdma_transport);
  1663. ib_unregister_client(&nvme_rdma_ib_client);
  1664. }
  1665. module_init(nvme_rdma_init_module);
  1666. module_exit(nvme_rdma_cleanup_module);
  1667. MODULE_LICENSE("GPL v2");