core.c 74 KB

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  1. /*
  2. * NVM Express device driver
  3. * Copyright (c) 2011-2014, Intel Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms and conditions of the GNU General Public License,
  7. * version 2, as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. */
  14. #include <linux/blkdev.h>
  15. #include <linux/blk-mq.h>
  16. #include <linux/delay.h>
  17. #include <linux/errno.h>
  18. #include <linux/hdreg.h>
  19. #include <linux/kernel.h>
  20. #include <linux/module.h>
  21. #include <linux/list_sort.h>
  22. #include <linux/slab.h>
  23. #include <linux/types.h>
  24. #include <linux/pr.h>
  25. #include <linux/ptrace.h>
  26. #include <linux/nvme_ioctl.h>
  27. #include <linux/t10-pi.h>
  28. #include <linux/pm_qos.h>
  29. #include <asm/unaligned.h>
  30. #include "nvme.h"
  31. #include "fabrics.h"
  32. #define NVME_MINORS (1U << MINORBITS)
  33. unsigned char admin_timeout = 60;
  34. module_param(admin_timeout, byte, 0644);
  35. MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
  36. EXPORT_SYMBOL_GPL(admin_timeout);
  37. unsigned char nvme_io_timeout = 30;
  38. module_param_named(io_timeout, nvme_io_timeout, byte, 0644);
  39. MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
  40. EXPORT_SYMBOL_GPL(nvme_io_timeout);
  41. static unsigned char shutdown_timeout = 5;
  42. module_param(shutdown_timeout, byte, 0644);
  43. MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
  44. static u8 nvme_max_retries = 5;
  45. module_param_named(max_retries, nvme_max_retries, byte, 0644);
  46. MODULE_PARM_DESC(max_retries, "max number of retries a command may have");
  47. static int nvme_char_major;
  48. module_param(nvme_char_major, int, 0);
  49. static unsigned long default_ps_max_latency_us = 100000;
  50. module_param(default_ps_max_latency_us, ulong, 0644);
  51. MODULE_PARM_DESC(default_ps_max_latency_us,
  52. "max power saving latency for new devices; use PM QOS to change per device");
  53. static bool force_apst;
  54. module_param(force_apst, bool, 0644);
  55. MODULE_PARM_DESC(force_apst, "allow APST for newly enumerated devices even if quirked off");
  56. static bool streams;
  57. module_param(streams, bool, 0644);
  58. MODULE_PARM_DESC(streams, "turn on support for Streams write directives");
  59. struct workqueue_struct *nvme_wq;
  60. EXPORT_SYMBOL_GPL(nvme_wq);
  61. static LIST_HEAD(nvme_ctrl_list);
  62. static DEFINE_SPINLOCK(dev_list_lock);
  63. static struct class *nvme_class;
  64. static __le32 nvme_get_log_dw10(u8 lid, size_t size)
  65. {
  66. return cpu_to_le32((((size / 4) - 1) << 16) | lid);
  67. }
  68. int nvme_reset_ctrl(struct nvme_ctrl *ctrl)
  69. {
  70. if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING))
  71. return -EBUSY;
  72. if (!queue_work(nvme_wq, &ctrl->reset_work))
  73. return -EBUSY;
  74. return 0;
  75. }
  76. EXPORT_SYMBOL_GPL(nvme_reset_ctrl);
  77. static int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl)
  78. {
  79. int ret;
  80. ret = nvme_reset_ctrl(ctrl);
  81. if (!ret)
  82. flush_work(&ctrl->reset_work);
  83. return ret;
  84. }
  85. static blk_status_t nvme_error_status(struct request *req)
  86. {
  87. switch (nvme_req(req)->status & 0x7ff) {
  88. case NVME_SC_SUCCESS:
  89. return BLK_STS_OK;
  90. case NVME_SC_CAP_EXCEEDED:
  91. return BLK_STS_NOSPC;
  92. case NVME_SC_ONCS_NOT_SUPPORTED:
  93. return BLK_STS_NOTSUPP;
  94. case NVME_SC_WRITE_FAULT:
  95. case NVME_SC_READ_ERROR:
  96. case NVME_SC_UNWRITTEN_BLOCK:
  97. case NVME_SC_ACCESS_DENIED:
  98. case NVME_SC_READ_ONLY:
  99. return BLK_STS_MEDIUM;
  100. case NVME_SC_GUARD_CHECK:
  101. case NVME_SC_APPTAG_CHECK:
  102. case NVME_SC_REFTAG_CHECK:
  103. case NVME_SC_INVALID_PI:
  104. return BLK_STS_PROTECTION;
  105. case NVME_SC_RESERVATION_CONFLICT:
  106. return BLK_STS_NEXUS;
  107. default:
  108. return BLK_STS_IOERR;
  109. }
  110. }
  111. static inline bool nvme_req_needs_retry(struct request *req)
  112. {
  113. if (blk_noretry_request(req))
  114. return false;
  115. if (nvme_req(req)->status & NVME_SC_DNR)
  116. return false;
  117. if (jiffies - req->start_time >= req->timeout)
  118. return false;
  119. if (nvme_req(req)->retries >= nvme_max_retries)
  120. return false;
  121. return true;
  122. }
  123. void nvme_complete_rq(struct request *req)
  124. {
  125. if (unlikely(nvme_req(req)->status && nvme_req_needs_retry(req))) {
  126. nvme_req(req)->retries++;
  127. blk_mq_requeue_request(req, true);
  128. return;
  129. }
  130. blk_mq_end_request(req, nvme_error_status(req));
  131. }
  132. EXPORT_SYMBOL_GPL(nvme_complete_rq);
  133. void nvme_cancel_request(struct request *req, void *data, bool reserved)
  134. {
  135. int status;
  136. if (!blk_mq_request_started(req))
  137. return;
  138. dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device,
  139. "Cancelling I/O %d", req->tag);
  140. status = NVME_SC_ABORT_REQ;
  141. if (blk_queue_dying(req->q))
  142. status |= NVME_SC_DNR;
  143. nvme_req(req)->status = status;
  144. blk_mq_complete_request(req);
  145. }
  146. EXPORT_SYMBOL_GPL(nvme_cancel_request);
  147. bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
  148. enum nvme_ctrl_state new_state)
  149. {
  150. enum nvme_ctrl_state old_state;
  151. unsigned long flags;
  152. bool changed = false;
  153. spin_lock_irqsave(&ctrl->lock, flags);
  154. old_state = ctrl->state;
  155. switch (new_state) {
  156. case NVME_CTRL_LIVE:
  157. switch (old_state) {
  158. case NVME_CTRL_NEW:
  159. case NVME_CTRL_RESETTING:
  160. case NVME_CTRL_RECONNECTING:
  161. changed = true;
  162. /* FALLTHRU */
  163. default:
  164. break;
  165. }
  166. break;
  167. case NVME_CTRL_RESETTING:
  168. switch (old_state) {
  169. case NVME_CTRL_NEW:
  170. case NVME_CTRL_LIVE:
  171. changed = true;
  172. /* FALLTHRU */
  173. default:
  174. break;
  175. }
  176. break;
  177. case NVME_CTRL_RECONNECTING:
  178. switch (old_state) {
  179. case NVME_CTRL_LIVE:
  180. changed = true;
  181. /* FALLTHRU */
  182. default:
  183. break;
  184. }
  185. break;
  186. case NVME_CTRL_DELETING:
  187. switch (old_state) {
  188. case NVME_CTRL_LIVE:
  189. case NVME_CTRL_RESETTING:
  190. case NVME_CTRL_RECONNECTING:
  191. changed = true;
  192. /* FALLTHRU */
  193. default:
  194. break;
  195. }
  196. break;
  197. case NVME_CTRL_DEAD:
  198. switch (old_state) {
  199. case NVME_CTRL_DELETING:
  200. changed = true;
  201. /* FALLTHRU */
  202. default:
  203. break;
  204. }
  205. break;
  206. default:
  207. break;
  208. }
  209. if (changed)
  210. ctrl->state = new_state;
  211. spin_unlock_irqrestore(&ctrl->lock, flags);
  212. return changed;
  213. }
  214. EXPORT_SYMBOL_GPL(nvme_change_ctrl_state);
  215. static void nvme_free_ns(struct kref *kref)
  216. {
  217. struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
  218. if (ns->ndev)
  219. nvme_nvm_unregister(ns);
  220. if (ns->disk) {
  221. spin_lock(&dev_list_lock);
  222. ns->disk->private_data = NULL;
  223. spin_unlock(&dev_list_lock);
  224. }
  225. put_disk(ns->disk);
  226. ida_simple_remove(&ns->ctrl->ns_ida, ns->instance);
  227. nvme_put_ctrl(ns->ctrl);
  228. kfree(ns);
  229. }
  230. static void nvme_put_ns(struct nvme_ns *ns)
  231. {
  232. kref_put(&ns->kref, nvme_free_ns);
  233. }
  234. static struct nvme_ns *nvme_get_ns_from_disk(struct gendisk *disk)
  235. {
  236. struct nvme_ns *ns;
  237. spin_lock(&dev_list_lock);
  238. ns = disk->private_data;
  239. if (ns) {
  240. if (!kref_get_unless_zero(&ns->kref))
  241. goto fail;
  242. if (!try_module_get(ns->ctrl->ops->module))
  243. goto fail_put_ns;
  244. }
  245. spin_unlock(&dev_list_lock);
  246. return ns;
  247. fail_put_ns:
  248. kref_put(&ns->kref, nvme_free_ns);
  249. fail:
  250. spin_unlock(&dev_list_lock);
  251. return NULL;
  252. }
  253. struct request *nvme_alloc_request(struct request_queue *q,
  254. struct nvme_command *cmd, unsigned int flags, int qid)
  255. {
  256. unsigned op = nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN;
  257. struct request *req;
  258. if (qid == NVME_QID_ANY) {
  259. req = blk_mq_alloc_request(q, op, flags);
  260. } else {
  261. req = blk_mq_alloc_request_hctx(q, op, flags,
  262. qid ? qid - 1 : 0);
  263. }
  264. if (IS_ERR(req))
  265. return req;
  266. req->cmd_flags |= REQ_FAILFAST_DRIVER;
  267. nvme_req(req)->cmd = cmd;
  268. return req;
  269. }
  270. EXPORT_SYMBOL_GPL(nvme_alloc_request);
  271. static int nvme_toggle_streams(struct nvme_ctrl *ctrl, bool enable)
  272. {
  273. struct nvme_command c;
  274. memset(&c, 0, sizeof(c));
  275. c.directive.opcode = nvme_admin_directive_send;
  276. c.directive.nsid = cpu_to_le32(NVME_NSID_ALL);
  277. c.directive.doper = NVME_DIR_SND_ID_OP_ENABLE;
  278. c.directive.dtype = NVME_DIR_IDENTIFY;
  279. c.directive.tdtype = NVME_DIR_STREAMS;
  280. c.directive.endir = enable ? NVME_DIR_ENDIR : 0;
  281. return nvme_submit_sync_cmd(ctrl->admin_q, &c, NULL, 0);
  282. }
  283. static int nvme_disable_streams(struct nvme_ctrl *ctrl)
  284. {
  285. return nvme_toggle_streams(ctrl, false);
  286. }
  287. static int nvme_enable_streams(struct nvme_ctrl *ctrl)
  288. {
  289. return nvme_toggle_streams(ctrl, true);
  290. }
  291. static int nvme_get_stream_params(struct nvme_ctrl *ctrl,
  292. struct streams_directive_params *s, u32 nsid)
  293. {
  294. struct nvme_command c;
  295. memset(&c, 0, sizeof(c));
  296. memset(s, 0, sizeof(*s));
  297. c.directive.opcode = nvme_admin_directive_recv;
  298. c.directive.nsid = cpu_to_le32(nsid);
  299. c.directive.numd = cpu_to_le32((sizeof(*s) >> 2) - 1);
  300. c.directive.doper = NVME_DIR_RCV_ST_OP_PARAM;
  301. c.directive.dtype = NVME_DIR_STREAMS;
  302. return nvme_submit_sync_cmd(ctrl->admin_q, &c, s, sizeof(*s));
  303. }
  304. static int nvme_configure_directives(struct nvme_ctrl *ctrl)
  305. {
  306. struct streams_directive_params s;
  307. int ret;
  308. if (!(ctrl->oacs & NVME_CTRL_OACS_DIRECTIVES))
  309. return 0;
  310. if (!streams)
  311. return 0;
  312. ret = nvme_enable_streams(ctrl);
  313. if (ret)
  314. return ret;
  315. ret = nvme_get_stream_params(ctrl, &s, NVME_NSID_ALL);
  316. if (ret)
  317. return ret;
  318. ctrl->nssa = le16_to_cpu(s.nssa);
  319. if (ctrl->nssa < BLK_MAX_WRITE_HINTS - 1) {
  320. dev_info(ctrl->device, "too few streams (%u) available\n",
  321. ctrl->nssa);
  322. nvme_disable_streams(ctrl);
  323. return 0;
  324. }
  325. ctrl->nr_streams = min_t(unsigned, ctrl->nssa, BLK_MAX_WRITE_HINTS - 1);
  326. dev_info(ctrl->device, "Using %u streams\n", ctrl->nr_streams);
  327. return 0;
  328. }
  329. /*
  330. * Check if 'req' has a write hint associated with it. If it does, assign
  331. * a valid namespace stream to the write.
  332. */
  333. static void nvme_assign_write_stream(struct nvme_ctrl *ctrl,
  334. struct request *req, u16 *control,
  335. u32 *dsmgmt)
  336. {
  337. enum rw_hint streamid = req->write_hint;
  338. if (streamid == WRITE_LIFE_NOT_SET || streamid == WRITE_LIFE_NONE)
  339. streamid = 0;
  340. else {
  341. streamid--;
  342. if (WARN_ON_ONCE(streamid > ctrl->nr_streams))
  343. return;
  344. *control |= NVME_RW_DTYPE_STREAMS;
  345. *dsmgmt |= streamid << 16;
  346. }
  347. if (streamid < ARRAY_SIZE(req->q->write_hints))
  348. req->q->write_hints[streamid] += blk_rq_bytes(req) >> 9;
  349. }
  350. static inline void nvme_setup_flush(struct nvme_ns *ns,
  351. struct nvme_command *cmnd)
  352. {
  353. memset(cmnd, 0, sizeof(*cmnd));
  354. cmnd->common.opcode = nvme_cmd_flush;
  355. cmnd->common.nsid = cpu_to_le32(ns->ns_id);
  356. }
  357. static blk_status_t nvme_setup_discard(struct nvme_ns *ns, struct request *req,
  358. struct nvme_command *cmnd)
  359. {
  360. unsigned short segments = blk_rq_nr_discard_segments(req), n = 0;
  361. struct nvme_dsm_range *range;
  362. struct bio *bio;
  363. range = kmalloc_array(segments, sizeof(*range), GFP_ATOMIC);
  364. if (!range)
  365. return BLK_STS_RESOURCE;
  366. __rq_for_each_bio(bio, req) {
  367. u64 slba = nvme_block_nr(ns, bio->bi_iter.bi_sector);
  368. u32 nlb = bio->bi_iter.bi_size >> ns->lba_shift;
  369. range[n].cattr = cpu_to_le32(0);
  370. range[n].nlb = cpu_to_le32(nlb);
  371. range[n].slba = cpu_to_le64(slba);
  372. n++;
  373. }
  374. if (WARN_ON_ONCE(n != segments)) {
  375. kfree(range);
  376. return BLK_STS_IOERR;
  377. }
  378. memset(cmnd, 0, sizeof(*cmnd));
  379. cmnd->dsm.opcode = nvme_cmd_dsm;
  380. cmnd->dsm.nsid = cpu_to_le32(ns->ns_id);
  381. cmnd->dsm.nr = cpu_to_le32(segments - 1);
  382. cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
  383. req->special_vec.bv_page = virt_to_page(range);
  384. req->special_vec.bv_offset = offset_in_page(range);
  385. req->special_vec.bv_len = sizeof(*range) * segments;
  386. req->rq_flags |= RQF_SPECIAL_PAYLOAD;
  387. return BLK_STS_OK;
  388. }
  389. static inline blk_status_t nvme_setup_rw(struct nvme_ns *ns,
  390. struct request *req, struct nvme_command *cmnd)
  391. {
  392. struct nvme_ctrl *ctrl = ns->ctrl;
  393. u16 control = 0;
  394. u32 dsmgmt = 0;
  395. /*
  396. * If formated with metadata, require the block layer provide a buffer
  397. * unless this namespace is formated such that the metadata can be
  398. * stripped/generated by the controller with PRACT=1.
  399. */
  400. if (ns && ns->ms &&
  401. (!ns->pi_type || ns->ms != sizeof(struct t10_pi_tuple)) &&
  402. !blk_integrity_rq(req) && !blk_rq_is_passthrough(req))
  403. return BLK_STS_NOTSUPP;
  404. if (req->cmd_flags & REQ_FUA)
  405. control |= NVME_RW_FUA;
  406. if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
  407. control |= NVME_RW_LR;
  408. if (req->cmd_flags & REQ_RAHEAD)
  409. dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
  410. memset(cmnd, 0, sizeof(*cmnd));
  411. cmnd->rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
  412. cmnd->rw.nsid = cpu_to_le32(ns->ns_id);
  413. cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
  414. cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
  415. if (req_op(req) == REQ_OP_WRITE && ctrl->nr_streams)
  416. nvme_assign_write_stream(ctrl, req, &control, &dsmgmt);
  417. if (ns->ms) {
  418. switch (ns->pi_type) {
  419. case NVME_NS_DPS_PI_TYPE3:
  420. control |= NVME_RW_PRINFO_PRCHK_GUARD;
  421. break;
  422. case NVME_NS_DPS_PI_TYPE1:
  423. case NVME_NS_DPS_PI_TYPE2:
  424. control |= NVME_RW_PRINFO_PRCHK_GUARD |
  425. NVME_RW_PRINFO_PRCHK_REF;
  426. cmnd->rw.reftag = cpu_to_le32(
  427. nvme_block_nr(ns, blk_rq_pos(req)));
  428. break;
  429. }
  430. if (!blk_integrity_rq(req))
  431. control |= NVME_RW_PRINFO_PRACT;
  432. }
  433. cmnd->rw.control = cpu_to_le16(control);
  434. cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
  435. return 0;
  436. }
  437. blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req,
  438. struct nvme_command *cmd)
  439. {
  440. blk_status_t ret = BLK_STS_OK;
  441. if (!(req->rq_flags & RQF_DONTPREP)) {
  442. nvme_req(req)->retries = 0;
  443. nvme_req(req)->flags = 0;
  444. req->rq_flags |= RQF_DONTPREP;
  445. }
  446. switch (req_op(req)) {
  447. case REQ_OP_DRV_IN:
  448. case REQ_OP_DRV_OUT:
  449. memcpy(cmd, nvme_req(req)->cmd, sizeof(*cmd));
  450. break;
  451. case REQ_OP_FLUSH:
  452. nvme_setup_flush(ns, cmd);
  453. break;
  454. case REQ_OP_WRITE_ZEROES:
  455. /* currently only aliased to deallocate for a few ctrls: */
  456. case REQ_OP_DISCARD:
  457. ret = nvme_setup_discard(ns, req, cmd);
  458. break;
  459. case REQ_OP_READ:
  460. case REQ_OP_WRITE:
  461. ret = nvme_setup_rw(ns, req, cmd);
  462. break;
  463. default:
  464. WARN_ON_ONCE(1);
  465. return BLK_STS_IOERR;
  466. }
  467. cmd->common.command_id = req->tag;
  468. return ret;
  469. }
  470. EXPORT_SYMBOL_GPL(nvme_setup_cmd);
  471. /*
  472. * Returns 0 on success. If the result is negative, it's a Linux error code;
  473. * if the result is positive, it's an NVM Express status code
  474. */
  475. int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
  476. union nvme_result *result, void *buffer, unsigned bufflen,
  477. unsigned timeout, int qid, int at_head, int flags)
  478. {
  479. struct request *req;
  480. int ret;
  481. req = nvme_alloc_request(q, cmd, flags, qid);
  482. if (IS_ERR(req))
  483. return PTR_ERR(req);
  484. req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
  485. if (buffer && bufflen) {
  486. ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL);
  487. if (ret)
  488. goto out;
  489. }
  490. blk_execute_rq(req->q, NULL, req, at_head);
  491. if (result)
  492. *result = nvme_req(req)->result;
  493. if (nvme_req(req)->flags & NVME_REQ_CANCELLED)
  494. ret = -EINTR;
  495. else
  496. ret = nvme_req(req)->status;
  497. out:
  498. blk_mq_free_request(req);
  499. return ret;
  500. }
  501. EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd);
  502. int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
  503. void *buffer, unsigned bufflen)
  504. {
  505. return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen, 0,
  506. NVME_QID_ANY, 0, 0);
  507. }
  508. EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd);
  509. static void *nvme_add_user_metadata(struct bio *bio, void __user *ubuf,
  510. unsigned len, u32 seed, bool write)
  511. {
  512. struct bio_integrity_payload *bip;
  513. int ret = -ENOMEM;
  514. void *buf;
  515. buf = kmalloc(len, GFP_KERNEL);
  516. if (!buf)
  517. goto out;
  518. ret = -EFAULT;
  519. if (write && copy_from_user(buf, ubuf, len))
  520. goto out_free_meta;
  521. bip = bio_integrity_alloc(bio, GFP_KERNEL, 1);
  522. if (IS_ERR(bip)) {
  523. ret = PTR_ERR(bip);
  524. goto out_free_meta;
  525. }
  526. bip->bip_iter.bi_size = len;
  527. bip->bip_iter.bi_sector = seed;
  528. ret = bio_integrity_add_page(bio, virt_to_page(buf), len,
  529. offset_in_page(buf));
  530. if (ret == len)
  531. return buf;
  532. ret = -ENOMEM;
  533. out_free_meta:
  534. kfree(buf);
  535. out:
  536. return ERR_PTR(ret);
  537. }
  538. static int nvme_submit_user_cmd(struct request_queue *q,
  539. struct nvme_command *cmd, void __user *ubuffer,
  540. unsigned bufflen, void __user *meta_buffer, unsigned meta_len,
  541. u32 meta_seed, u32 *result, unsigned timeout)
  542. {
  543. bool write = nvme_is_write(cmd);
  544. struct nvme_ns *ns = q->queuedata;
  545. struct gendisk *disk = ns ? ns->disk : NULL;
  546. struct request *req;
  547. struct bio *bio = NULL;
  548. void *meta = NULL;
  549. int ret;
  550. req = nvme_alloc_request(q, cmd, 0, NVME_QID_ANY);
  551. if (IS_ERR(req))
  552. return PTR_ERR(req);
  553. req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
  554. if (ubuffer && bufflen) {
  555. ret = blk_rq_map_user(q, req, NULL, ubuffer, bufflen,
  556. GFP_KERNEL);
  557. if (ret)
  558. goto out;
  559. bio = req->bio;
  560. bio->bi_disk = disk;
  561. if (disk && meta_buffer && meta_len) {
  562. meta = nvme_add_user_metadata(bio, meta_buffer, meta_len,
  563. meta_seed, write);
  564. if (IS_ERR(meta)) {
  565. ret = PTR_ERR(meta);
  566. goto out_unmap;
  567. }
  568. }
  569. }
  570. blk_execute_rq(req->q, disk, req, 0);
  571. if (nvme_req(req)->flags & NVME_REQ_CANCELLED)
  572. ret = -EINTR;
  573. else
  574. ret = nvme_req(req)->status;
  575. if (result)
  576. *result = le32_to_cpu(nvme_req(req)->result.u32);
  577. if (meta && !ret && !write) {
  578. if (copy_to_user(meta_buffer, meta, meta_len))
  579. ret = -EFAULT;
  580. }
  581. kfree(meta);
  582. out_unmap:
  583. if (bio)
  584. blk_rq_unmap_user(bio);
  585. out:
  586. blk_mq_free_request(req);
  587. return ret;
  588. }
  589. static void nvme_keep_alive_end_io(struct request *rq, blk_status_t status)
  590. {
  591. struct nvme_ctrl *ctrl = rq->end_io_data;
  592. blk_mq_free_request(rq);
  593. if (status) {
  594. dev_err(ctrl->device,
  595. "failed nvme_keep_alive_end_io error=%d\n",
  596. status);
  597. return;
  598. }
  599. schedule_delayed_work(&ctrl->ka_work, ctrl->kato * HZ);
  600. }
  601. static int nvme_keep_alive(struct nvme_ctrl *ctrl)
  602. {
  603. struct nvme_command c;
  604. struct request *rq;
  605. memset(&c, 0, sizeof(c));
  606. c.common.opcode = nvme_admin_keep_alive;
  607. rq = nvme_alloc_request(ctrl->admin_q, &c, BLK_MQ_REQ_RESERVED,
  608. NVME_QID_ANY);
  609. if (IS_ERR(rq))
  610. return PTR_ERR(rq);
  611. rq->timeout = ctrl->kato * HZ;
  612. rq->end_io_data = ctrl;
  613. blk_execute_rq_nowait(rq->q, NULL, rq, 0, nvme_keep_alive_end_io);
  614. return 0;
  615. }
  616. static void nvme_keep_alive_work(struct work_struct *work)
  617. {
  618. struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
  619. struct nvme_ctrl, ka_work);
  620. if (nvme_keep_alive(ctrl)) {
  621. /* allocation failure, reset the controller */
  622. dev_err(ctrl->device, "keep-alive failed\n");
  623. nvme_reset_ctrl(ctrl);
  624. return;
  625. }
  626. }
  627. void nvme_start_keep_alive(struct nvme_ctrl *ctrl)
  628. {
  629. if (unlikely(ctrl->kato == 0))
  630. return;
  631. INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work);
  632. schedule_delayed_work(&ctrl->ka_work, ctrl->kato * HZ);
  633. }
  634. EXPORT_SYMBOL_GPL(nvme_start_keep_alive);
  635. void nvme_stop_keep_alive(struct nvme_ctrl *ctrl)
  636. {
  637. if (unlikely(ctrl->kato == 0))
  638. return;
  639. cancel_delayed_work_sync(&ctrl->ka_work);
  640. }
  641. EXPORT_SYMBOL_GPL(nvme_stop_keep_alive);
  642. static int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id)
  643. {
  644. struct nvme_command c = { };
  645. int error;
  646. /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
  647. c.identify.opcode = nvme_admin_identify;
  648. c.identify.cns = NVME_ID_CNS_CTRL;
  649. *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
  650. if (!*id)
  651. return -ENOMEM;
  652. error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
  653. sizeof(struct nvme_id_ctrl));
  654. if (error)
  655. kfree(*id);
  656. return error;
  657. }
  658. static int nvme_identify_ns_descs(struct nvme_ctrl *ctrl, unsigned nsid,
  659. u8 *eui64, u8 *nguid, uuid_t *uuid)
  660. {
  661. struct nvme_command c = { };
  662. int status;
  663. void *data;
  664. int pos;
  665. int len;
  666. c.identify.opcode = nvme_admin_identify;
  667. c.identify.nsid = cpu_to_le32(nsid);
  668. c.identify.cns = NVME_ID_CNS_NS_DESC_LIST;
  669. data = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL);
  670. if (!data)
  671. return -ENOMEM;
  672. status = nvme_submit_sync_cmd(ctrl->admin_q, &c, data,
  673. NVME_IDENTIFY_DATA_SIZE);
  674. if (status)
  675. goto free_data;
  676. for (pos = 0; pos < NVME_IDENTIFY_DATA_SIZE; pos += len) {
  677. struct nvme_ns_id_desc *cur = data + pos;
  678. if (cur->nidl == 0)
  679. break;
  680. switch (cur->nidt) {
  681. case NVME_NIDT_EUI64:
  682. if (cur->nidl != NVME_NIDT_EUI64_LEN) {
  683. dev_warn(ctrl->device,
  684. "ctrl returned bogus length: %d for NVME_NIDT_EUI64\n",
  685. cur->nidl);
  686. goto free_data;
  687. }
  688. len = NVME_NIDT_EUI64_LEN;
  689. memcpy(eui64, data + pos + sizeof(*cur), len);
  690. break;
  691. case NVME_NIDT_NGUID:
  692. if (cur->nidl != NVME_NIDT_NGUID_LEN) {
  693. dev_warn(ctrl->device,
  694. "ctrl returned bogus length: %d for NVME_NIDT_NGUID\n",
  695. cur->nidl);
  696. goto free_data;
  697. }
  698. len = NVME_NIDT_NGUID_LEN;
  699. memcpy(nguid, data + pos + sizeof(*cur), len);
  700. break;
  701. case NVME_NIDT_UUID:
  702. if (cur->nidl != NVME_NIDT_UUID_LEN) {
  703. dev_warn(ctrl->device,
  704. "ctrl returned bogus length: %d for NVME_NIDT_UUID\n",
  705. cur->nidl);
  706. goto free_data;
  707. }
  708. len = NVME_NIDT_UUID_LEN;
  709. uuid_copy(uuid, data + pos + sizeof(*cur));
  710. break;
  711. default:
  712. /* Skip unnkown types */
  713. len = cur->nidl;
  714. break;
  715. }
  716. len += sizeof(*cur);
  717. }
  718. free_data:
  719. kfree(data);
  720. return status;
  721. }
  722. static int nvme_identify_ns_list(struct nvme_ctrl *dev, unsigned nsid, __le32 *ns_list)
  723. {
  724. struct nvme_command c = { };
  725. c.identify.opcode = nvme_admin_identify;
  726. c.identify.cns = NVME_ID_CNS_NS_ACTIVE_LIST;
  727. c.identify.nsid = cpu_to_le32(nsid);
  728. return nvme_submit_sync_cmd(dev->admin_q, &c, ns_list, 0x1000);
  729. }
  730. static struct nvme_id_ns *nvme_identify_ns(struct nvme_ctrl *ctrl,
  731. unsigned nsid)
  732. {
  733. struct nvme_id_ns *id;
  734. struct nvme_command c = { };
  735. int error;
  736. /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
  737. c.identify.opcode = nvme_admin_identify;
  738. c.identify.nsid = cpu_to_le32(nsid);
  739. c.identify.cns = NVME_ID_CNS_NS;
  740. id = kmalloc(sizeof(*id), GFP_KERNEL);
  741. if (!id)
  742. return NULL;
  743. error = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id));
  744. if (error) {
  745. dev_warn(ctrl->device, "Identify namespace failed\n");
  746. kfree(id);
  747. return NULL;
  748. }
  749. return id;
  750. }
  751. static int nvme_set_features(struct nvme_ctrl *dev, unsigned fid, unsigned dword11,
  752. void *buffer, size_t buflen, u32 *result)
  753. {
  754. struct nvme_command c;
  755. union nvme_result res;
  756. int ret;
  757. memset(&c, 0, sizeof(c));
  758. c.features.opcode = nvme_admin_set_features;
  759. c.features.fid = cpu_to_le32(fid);
  760. c.features.dword11 = cpu_to_le32(dword11);
  761. ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res,
  762. buffer, buflen, 0, NVME_QID_ANY, 0, 0);
  763. if (ret >= 0 && result)
  764. *result = le32_to_cpu(res.u32);
  765. return ret;
  766. }
  767. int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count)
  768. {
  769. u32 q_count = (*count - 1) | ((*count - 1) << 16);
  770. u32 result;
  771. int status, nr_io_queues;
  772. status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0,
  773. &result);
  774. if (status < 0)
  775. return status;
  776. /*
  777. * Degraded controllers might return an error when setting the queue
  778. * count. We still want to be able to bring them online and offer
  779. * access to the admin queue, as that might be only way to fix them up.
  780. */
  781. if (status > 0) {
  782. dev_err(ctrl->device, "Could not set queue count (%d)\n", status);
  783. *count = 0;
  784. } else {
  785. nr_io_queues = min(result & 0xffff, result >> 16) + 1;
  786. *count = min(*count, nr_io_queues);
  787. }
  788. return 0;
  789. }
  790. EXPORT_SYMBOL_GPL(nvme_set_queue_count);
  791. static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
  792. {
  793. struct nvme_user_io io;
  794. struct nvme_command c;
  795. unsigned length, meta_len;
  796. void __user *metadata;
  797. if (copy_from_user(&io, uio, sizeof(io)))
  798. return -EFAULT;
  799. if (io.flags)
  800. return -EINVAL;
  801. switch (io.opcode) {
  802. case nvme_cmd_write:
  803. case nvme_cmd_read:
  804. case nvme_cmd_compare:
  805. break;
  806. default:
  807. return -EINVAL;
  808. }
  809. length = (io.nblocks + 1) << ns->lba_shift;
  810. meta_len = (io.nblocks + 1) * ns->ms;
  811. metadata = (void __user *)(uintptr_t)io.metadata;
  812. if (ns->ext) {
  813. length += meta_len;
  814. meta_len = 0;
  815. } else if (meta_len) {
  816. if ((io.metadata & 3) || !io.metadata)
  817. return -EINVAL;
  818. }
  819. memset(&c, 0, sizeof(c));
  820. c.rw.opcode = io.opcode;
  821. c.rw.flags = io.flags;
  822. c.rw.nsid = cpu_to_le32(ns->ns_id);
  823. c.rw.slba = cpu_to_le64(io.slba);
  824. c.rw.length = cpu_to_le16(io.nblocks);
  825. c.rw.control = cpu_to_le16(io.control);
  826. c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
  827. c.rw.reftag = cpu_to_le32(io.reftag);
  828. c.rw.apptag = cpu_to_le16(io.apptag);
  829. c.rw.appmask = cpu_to_le16(io.appmask);
  830. return nvme_submit_user_cmd(ns->queue, &c,
  831. (void __user *)(uintptr_t)io.addr, length,
  832. metadata, meta_len, io.slba, NULL, 0);
  833. }
  834. static int nvme_user_cmd(struct nvme_ctrl *ctrl, struct nvme_ns *ns,
  835. struct nvme_passthru_cmd __user *ucmd)
  836. {
  837. struct nvme_passthru_cmd cmd;
  838. struct nvme_command c;
  839. unsigned timeout = 0;
  840. int status;
  841. if (!capable(CAP_SYS_ADMIN))
  842. return -EACCES;
  843. if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
  844. return -EFAULT;
  845. if (cmd.flags)
  846. return -EINVAL;
  847. memset(&c, 0, sizeof(c));
  848. c.common.opcode = cmd.opcode;
  849. c.common.flags = cmd.flags;
  850. c.common.nsid = cpu_to_le32(cmd.nsid);
  851. c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
  852. c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
  853. c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
  854. c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
  855. c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
  856. c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
  857. c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
  858. c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
  859. if (cmd.timeout_ms)
  860. timeout = msecs_to_jiffies(cmd.timeout_ms);
  861. status = nvme_submit_user_cmd(ns ? ns->queue : ctrl->admin_q, &c,
  862. (void __user *)(uintptr_t)cmd.addr, cmd.data_len,
  863. (void __user *)(uintptr_t)cmd.metadata, cmd.metadata,
  864. 0, &cmd.result, timeout);
  865. if (status >= 0) {
  866. if (put_user(cmd.result, &ucmd->result))
  867. return -EFAULT;
  868. }
  869. return status;
  870. }
  871. static int nvme_ioctl(struct block_device *bdev, fmode_t mode,
  872. unsigned int cmd, unsigned long arg)
  873. {
  874. struct nvme_ns *ns = bdev->bd_disk->private_data;
  875. switch (cmd) {
  876. case NVME_IOCTL_ID:
  877. force_successful_syscall_return();
  878. return ns->ns_id;
  879. case NVME_IOCTL_ADMIN_CMD:
  880. return nvme_user_cmd(ns->ctrl, NULL, (void __user *)arg);
  881. case NVME_IOCTL_IO_CMD:
  882. return nvme_user_cmd(ns->ctrl, ns, (void __user *)arg);
  883. case NVME_IOCTL_SUBMIT_IO:
  884. return nvme_submit_io(ns, (void __user *)arg);
  885. default:
  886. #ifdef CONFIG_NVM
  887. if (ns->ndev)
  888. return nvme_nvm_ioctl(ns, cmd, arg);
  889. #endif
  890. if (is_sed_ioctl(cmd))
  891. return sed_ioctl(ns->ctrl->opal_dev, cmd,
  892. (void __user *) arg);
  893. return -ENOTTY;
  894. }
  895. }
  896. #ifdef CONFIG_COMPAT
  897. static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
  898. unsigned int cmd, unsigned long arg)
  899. {
  900. return nvme_ioctl(bdev, mode, cmd, arg);
  901. }
  902. #else
  903. #define nvme_compat_ioctl NULL
  904. #endif
  905. static int nvme_open(struct block_device *bdev, fmode_t mode)
  906. {
  907. return nvme_get_ns_from_disk(bdev->bd_disk) ? 0 : -ENXIO;
  908. }
  909. static void nvme_release(struct gendisk *disk, fmode_t mode)
  910. {
  911. struct nvme_ns *ns = disk->private_data;
  912. module_put(ns->ctrl->ops->module);
  913. nvme_put_ns(ns);
  914. }
  915. static int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo)
  916. {
  917. /* some standard values */
  918. geo->heads = 1 << 6;
  919. geo->sectors = 1 << 5;
  920. geo->cylinders = get_capacity(bdev->bd_disk) >> 11;
  921. return 0;
  922. }
  923. #ifdef CONFIG_BLK_DEV_INTEGRITY
  924. static void nvme_prep_integrity(struct gendisk *disk, struct nvme_id_ns *id,
  925. u16 bs)
  926. {
  927. struct nvme_ns *ns = disk->private_data;
  928. u16 old_ms = ns->ms;
  929. u8 pi_type = 0;
  930. ns->ms = le16_to_cpu(id->lbaf[id->flbas & NVME_NS_FLBAS_LBA_MASK].ms);
  931. ns->ext = ns->ms && (id->flbas & NVME_NS_FLBAS_META_EXT);
  932. /* PI implementation requires metadata equal t10 pi tuple size */
  933. if (ns->ms == sizeof(struct t10_pi_tuple))
  934. pi_type = id->dps & NVME_NS_DPS_PI_MASK;
  935. if (blk_get_integrity(disk) &&
  936. (ns->pi_type != pi_type || ns->ms != old_ms ||
  937. bs != queue_logical_block_size(disk->queue) ||
  938. (ns->ms && ns->ext)))
  939. blk_integrity_unregister(disk);
  940. ns->pi_type = pi_type;
  941. }
  942. static void nvme_init_integrity(struct nvme_ns *ns)
  943. {
  944. struct blk_integrity integrity;
  945. memset(&integrity, 0, sizeof(integrity));
  946. switch (ns->pi_type) {
  947. case NVME_NS_DPS_PI_TYPE3:
  948. integrity.profile = &t10_pi_type3_crc;
  949. integrity.tag_size = sizeof(u16) + sizeof(u32);
  950. integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
  951. break;
  952. case NVME_NS_DPS_PI_TYPE1:
  953. case NVME_NS_DPS_PI_TYPE2:
  954. integrity.profile = &t10_pi_type1_crc;
  955. integrity.tag_size = sizeof(u16);
  956. integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
  957. break;
  958. default:
  959. integrity.profile = NULL;
  960. break;
  961. }
  962. integrity.tuple_size = ns->ms;
  963. blk_integrity_register(ns->disk, &integrity);
  964. blk_queue_max_integrity_segments(ns->queue, 1);
  965. }
  966. #else
  967. static void nvme_prep_integrity(struct gendisk *disk, struct nvme_id_ns *id,
  968. u16 bs)
  969. {
  970. }
  971. static void nvme_init_integrity(struct nvme_ns *ns)
  972. {
  973. }
  974. #endif /* CONFIG_BLK_DEV_INTEGRITY */
  975. static void nvme_set_chunk_size(struct nvme_ns *ns)
  976. {
  977. u32 chunk_size = (((u32)ns->noiob) << (ns->lba_shift - 9));
  978. blk_queue_chunk_sectors(ns->queue, rounddown_pow_of_two(chunk_size));
  979. }
  980. static void nvme_config_discard(struct nvme_ns *ns)
  981. {
  982. struct nvme_ctrl *ctrl = ns->ctrl;
  983. u32 logical_block_size = queue_logical_block_size(ns->queue);
  984. BUILD_BUG_ON(PAGE_SIZE / sizeof(struct nvme_dsm_range) <
  985. NVME_DSM_MAX_RANGES);
  986. if (ctrl->nr_streams && ns->sws && ns->sgs) {
  987. unsigned int sz = logical_block_size * ns->sws * ns->sgs;
  988. ns->queue->limits.discard_alignment = sz;
  989. ns->queue->limits.discard_granularity = sz;
  990. } else {
  991. ns->queue->limits.discard_alignment = logical_block_size;
  992. ns->queue->limits.discard_granularity = logical_block_size;
  993. }
  994. blk_queue_max_discard_sectors(ns->queue, UINT_MAX);
  995. blk_queue_max_discard_segments(ns->queue, NVME_DSM_MAX_RANGES);
  996. queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
  997. if (ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES)
  998. blk_queue_max_write_zeroes_sectors(ns->queue, UINT_MAX);
  999. }
  1000. static void nvme_report_ns_ids(struct nvme_ctrl *ctrl, unsigned int nsid,
  1001. struct nvme_id_ns *id, u8 *eui64, u8 *nguid, uuid_t *uuid)
  1002. {
  1003. if (ctrl->vs >= NVME_VS(1, 1, 0))
  1004. memcpy(eui64, id->eui64, sizeof(id->eui64));
  1005. if (ctrl->vs >= NVME_VS(1, 2, 0))
  1006. memcpy(nguid, id->nguid, sizeof(id->nguid));
  1007. if (ctrl->vs >= NVME_VS(1, 3, 0)) {
  1008. /* Don't treat error as fatal we potentially
  1009. * already have a NGUID or EUI-64
  1010. */
  1011. if (nvme_identify_ns_descs(ctrl, nsid, eui64, nguid, uuid))
  1012. dev_warn(ctrl->device,
  1013. "%s: Identify Descriptors failed\n", __func__);
  1014. }
  1015. }
  1016. static void __nvme_revalidate_disk(struct gendisk *disk, struct nvme_id_ns *id)
  1017. {
  1018. struct nvme_ns *ns = disk->private_data;
  1019. struct nvme_ctrl *ctrl = ns->ctrl;
  1020. u16 bs;
  1021. /*
  1022. * If identify namespace failed, use default 512 byte block size so
  1023. * block layer can use before failing read/write for 0 capacity.
  1024. */
  1025. ns->lba_shift = id->lbaf[id->flbas & NVME_NS_FLBAS_LBA_MASK].ds;
  1026. if (ns->lba_shift == 0)
  1027. ns->lba_shift = 9;
  1028. bs = 1 << ns->lba_shift;
  1029. ns->noiob = le16_to_cpu(id->noiob);
  1030. blk_mq_freeze_queue(disk->queue);
  1031. if (ctrl->ops->flags & NVME_F_METADATA_SUPPORTED)
  1032. nvme_prep_integrity(disk, id, bs);
  1033. blk_queue_logical_block_size(ns->queue, bs);
  1034. if (ns->noiob)
  1035. nvme_set_chunk_size(ns);
  1036. if (ns->ms && !blk_get_integrity(disk) && !ns->ext)
  1037. nvme_init_integrity(ns);
  1038. if (ns->ms && !(ns->ms == 8 && ns->pi_type) && !blk_get_integrity(disk))
  1039. set_capacity(disk, 0);
  1040. else
  1041. set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
  1042. if (ctrl->oncs & NVME_CTRL_ONCS_DSM)
  1043. nvme_config_discard(ns);
  1044. blk_mq_unfreeze_queue(disk->queue);
  1045. }
  1046. static int nvme_revalidate_disk(struct gendisk *disk)
  1047. {
  1048. struct nvme_ns *ns = disk->private_data;
  1049. struct nvme_ctrl *ctrl = ns->ctrl;
  1050. struct nvme_id_ns *id;
  1051. u8 eui64[8] = { 0 }, nguid[16] = { 0 };
  1052. uuid_t uuid = uuid_null;
  1053. int ret = 0;
  1054. if (test_bit(NVME_NS_DEAD, &ns->flags)) {
  1055. set_capacity(disk, 0);
  1056. return -ENODEV;
  1057. }
  1058. id = nvme_identify_ns(ctrl, ns->ns_id);
  1059. if (!id)
  1060. return -ENODEV;
  1061. if (id->ncap == 0) {
  1062. ret = -ENODEV;
  1063. goto out;
  1064. }
  1065. nvme_report_ns_ids(ctrl, ns->ns_id, id, eui64, nguid, &uuid);
  1066. if (!uuid_equal(&ns->uuid, &uuid) ||
  1067. memcmp(&ns->nguid, &nguid, sizeof(ns->nguid)) ||
  1068. memcmp(&ns->eui, &eui64, sizeof(ns->eui))) {
  1069. dev_err(ctrl->device,
  1070. "identifiers changed for nsid %d\n", ns->ns_id);
  1071. ret = -ENODEV;
  1072. }
  1073. out:
  1074. kfree(id);
  1075. return ret;
  1076. }
  1077. static char nvme_pr_type(enum pr_type type)
  1078. {
  1079. switch (type) {
  1080. case PR_WRITE_EXCLUSIVE:
  1081. return 1;
  1082. case PR_EXCLUSIVE_ACCESS:
  1083. return 2;
  1084. case PR_WRITE_EXCLUSIVE_REG_ONLY:
  1085. return 3;
  1086. case PR_EXCLUSIVE_ACCESS_REG_ONLY:
  1087. return 4;
  1088. case PR_WRITE_EXCLUSIVE_ALL_REGS:
  1089. return 5;
  1090. case PR_EXCLUSIVE_ACCESS_ALL_REGS:
  1091. return 6;
  1092. default:
  1093. return 0;
  1094. }
  1095. };
  1096. static int nvme_pr_command(struct block_device *bdev, u32 cdw10,
  1097. u64 key, u64 sa_key, u8 op)
  1098. {
  1099. struct nvme_ns *ns = bdev->bd_disk->private_data;
  1100. struct nvme_command c;
  1101. u8 data[16] = { 0, };
  1102. put_unaligned_le64(key, &data[0]);
  1103. put_unaligned_le64(sa_key, &data[8]);
  1104. memset(&c, 0, sizeof(c));
  1105. c.common.opcode = op;
  1106. c.common.nsid = cpu_to_le32(ns->ns_id);
  1107. c.common.cdw10[0] = cpu_to_le32(cdw10);
  1108. return nvme_submit_sync_cmd(ns->queue, &c, data, 16);
  1109. }
  1110. static int nvme_pr_register(struct block_device *bdev, u64 old,
  1111. u64 new, unsigned flags)
  1112. {
  1113. u32 cdw10;
  1114. if (flags & ~PR_FL_IGNORE_KEY)
  1115. return -EOPNOTSUPP;
  1116. cdw10 = old ? 2 : 0;
  1117. cdw10 |= (flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0;
  1118. cdw10 |= (1 << 30) | (1 << 31); /* PTPL=1 */
  1119. return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_register);
  1120. }
  1121. static int nvme_pr_reserve(struct block_device *bdev, u64 key,
  1122. enum pr_type type, unsigned flags)
  1123. {
  1124. u32 cdw10;
  1125. if (flags & ~PR_FL_IGNORE_KEY)
  1126. return -EOPNOTSUPP;
  1127. cdw10 = nvme_pr_type(type) << 8;
  1128. cdw10 |= ((flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0);
  1129. return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_acquire);
  1130. }
  1131. static int nvme_pr_preempt(struct block_device *bdev, u64 old, u64 new,
  1132. enum pr_type type, bool abort)
  1133. {
  1134. u32 cdw10 = nvme_pr_type(type) << 8 | abort ? 2 : 1;
  1135. return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_acquire);
  1136. }
  1137. static int nvme_pr_clear(struct block_device *bdev, u64 key)
  1138. {
  1139. u32 cdw10 = 1 | (key ? 1 << 3 : 0);
  1140. return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_register);
  1141. }
  1142. static int nvme_pr_release(struct block_device *bdev, u64 key, enum pr_type type)
  1143. {
  1144. u32 cdw10 = nvme_pr_type(type) << 8 | key ? 1 << 3 : 0;
  1145. return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_release);
  1146. }
  1147. static const struct pr_ops nvme_pr_ops = {
  1148. .pr_register = nvme_pr_register,
  1149. .pr_reserve = nvme_pr_reserve,
  1150. .pr_release = nvme_pr_release,
  1151. .pr_preempt = nvme_pr_preempt,
  1152. .pr_clear = nvme_pr_clear,
  1153. };
  1154. #ifdef CONFIG_BLK_SED_OPAL
  1155. int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
  1156. bool send)
  1157. {
  1158. struct nvme_ctrl *ctrl = data;
  1159. struct nvme_command cmd;
  1160. memset(&cmd, 0, sizeof(cmd));
  1161. if (send)
  1162. cmd.common.opcode = nvme_admin_security_send;
  1163. else
  1164. cmd.common.opcode = nvme_admin_security_recv;
  1165. cmd.common.nsid = 0;
  1166. cmd.common.cdw10[0] = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8);
  1167. cmd.common.cdw10[1] = cpu_to_le32(len);
  1168. return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len,
  1169. ADMIN_TIMEOUT, NVME_QID_ANY, 1, 0);
  1170. }
  1171. EXPORT_SYMBOL_GPL(nvme_sec_submit);
  1172. #endif /* CONFIG_BLK_SED_OPAL */
  1173. static const struct block_device_operations nvme_fops = {
  1174. .owner = THIS_MODULE,
  1175. .ioctl = nvme_ioctl,
  1176. .compat_ioctl = nvme_compat_ioctl,
  1177. .open = nvme_open,
  1178. .release = nvme_release,
  1179. .getgeo = nvme_getgeo,
  1180. .revalidate_disk= nvme_revalidate_disk,
  1181. .pr_ops = &nvme_pr_ops,
  1182. };
  1183. static int nvme_wait_ready(struct nvme_ctrl *ctrl, u64 cap, bool enabled)
  1184. {
  1185. unsigned long timeout =
  1186. ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
  1187. u32 csts, bit = enabled ? NVME_CSTS_RDY : 0;
  1188. int ret;
  1189. while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
  1190. if (csts == ~0)
  1191. return -ENODEV;
  1192. if ((csts & NVME_CSTS_RDY) == bit)
  1193. break;
  1194. msleep(100);
  1195. if (fatal_signal_pending(current))
  1196. return -EINTR;
  1197. if (time_after(jiffies, timeout)) {
  1198. dev_err(ctrl->device,
  1199. "Device not ready; aborting %s\n", enabled ?
  1200. "initialisation" : "reset");
  1201. return -ENODEV;
  1202. }
  1203. }
  1204. return ret;
  1205. }
  1206. /*
  1207. * If the device has been passed off to us in an enabled state, just clear
  1208. * the enabled bit. The spec says we should set the 'shutdown notification
  1209. * bits', but doing so may cause the device to complete commands to the
  1210. * admin queue ... and we don't know what memory that might be pointing at!
  1211. */
  1212. int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap)
  1213. {
  1214. int ret;
  1215. ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
  1216. ctrl->ctrl_config &= ~NVME_CC_ENABLE;
  1217. ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
  1218. if (ret)
  1219. return ret;
  1220. if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY)
  1221. msleep(NVME_QUIRK_DELAY_AMOUNT);
  1222. return nvme_wait_ready(ctrl, cap, false);
  1223. }
  1224. EXPORT_SYMBOL_GPL(nvme_disable_ctrl);
  1225. int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap)
  1226. {
  1227. /*
  1228. * Default to a 4K page size, with the intention to update this
  1229. * path in the future to accomodate architectures with differing
  1230. * kernel and IO page sizes.
  1231. */
  1232. unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12, page_shift = 12;
  1233. int ret;
  1234. if (page_shift < dev_page_min) {
  1235. dev_err(ctrl->device,
  1236. "Minimum device page size %u too large for host (%u)\n",
  1237. 1 << dev_page_min, 1 << page_shift);
  1238. return -ENODEV;
  1239. }
  1240. ctrl->page_size = 1 << page_shift;
  1241. ctrl->ctrl_config = NVME_CC_CSS_NVM;
  1242. ctrl->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
  1243. ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE;
  1244. ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
  1245. ctrl->ctrl_config |= NVME_CC_ENABLE;
  1246. ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
  1247. if (ret)
  1248. return ret;
  1249. return nvme_wait_ready(ctrl, cap, true);
  1250. }
  1251. EXPORT_SYMBOL_GPL(nvme_enable_ctrl);
  1252. int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl)
  1253. {
  1254. unsigned long timeout = jiffies + (ctrl->shutdown_timeout * HZ);
  1255. u32 csts;
  1256. int ret;
  1257. ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
  1258. ctrl->ctrl_config |= NVME_CC_SHN_NORMAL;
  1259. ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
  1260. if (ret)
  1261. return ret;
  1262. while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
  1263. if ((csts & NVME_CSTS_SHST_MASK) == NVME_CSTS_SHST_CMPLT)
  1264. break;
  1265. msleep(100);
  1266. if (fatal_signal_pending(current))
  1267. return -EINTR;
  1268. if (time_after(jiffies, timeout)) {
  1269. dev_err(ctrl->device,
  1270. "Device shutdown incomplete; abort shutdown\n");
  1271. return -ENODEV;
  1272. }
  1273. }
  1274. return ret;
  1275. }
  1276. EXPORT_SYMBOL_GPL(nvme_shutdown_ctrl);
  1277. static void nvme_set_queue_limits(struct nvme_ctrl *ctrl,
  1278. struct request_queue *q)
  1279. {
  1280. bool vwc = false;
  1281. if (ctrl->max_hw_sectors) {
  1282. u32 max_segments =
  1283. (ctrl->max_hw_sectors / (ctrl->page_size >> 9)) + 1;
  1284. blk_queue_max_hw_sectors(q, ctrl->max_hw_sectors);
  1285. blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX));
  1286. }
  1287. if (ctrl->quirks & NVME_QUIRK_STRIPE_SIZE)
  1288. blk_queue_chunk_sectors(q, ctrl->max_hw_sectors);
  1289. blk_queue_virt_boundary(q, ctrl->page_size - 1);
  1290. if (ctrl->vwc & NVME_CTRL_VWC_PRESENT)
  1291. vwc = true;
  1292. blk_queue_write_cache(q, vwc, vwc);
  1293. }
  1294. static int nvme_configure_timestamp(struct nvme_ctrl *ctrl)
  1295. {
  1296. __le64 ts;
  1297. int ret;
  1298. if (!(ctrl->oncs & NVME_CTRL_ONCS_TIMESTAMP))
  1299. return 0;
  1300. ts = cpu_to_le64(ktime_to_ms(ktime_get_real()));
  1301. ret = nvme_set_features(ctrl, NVME_FEAT_TIMESTAMP, 0, &ts, sizeof(ts),
  1302. NULL);
  1303. if (ret)
  1304. dev_warn_once(ctrl->device,
  1305. "could not set timestamp (%d)\n", ret);
  1306. return ret;
  1307. }
  1308. static int nvme_configure_apst(struct nvme_ctrl *ctrl)
  1309. {
  1310. /*
  1311. * APST (Autonomous Power State Transition) lets us program a
  1312. * table of power state transitions that the controller will
  1313. * perform automatically. We configure it with a simple
  1314. * heuristic: we are willing to spend at most 2% of the time
  1315. * transitioning between power states. Therefore, when running
  1316. * in any given state, we will enter the next lower-power
  1317. * non-operational state after waiting 50 * (enlat + exlat)
  1318. * microseconds, as long as that state's exit latency is under
  1319. * the requested maximum latency.
  1320. *
  1321. * We will not autonomously enter any non-operational state for
  1322. * which the total latency exceeds ps_max_latency_us. Users
  1323. * can set ps_max_latency_us to zero to turn off APST.
  1324. */
  1325. unsigned apste;
  1326. struct nvme_feat_auto_pst *table;
  1327. u64 max_lat_us = 0;
  1328. int max_ps = -1;
  1329. int ret;
  1330. /*
  1331. * If APST isn't supported or if we haven't been initialized yet,
  1332. * then don't do anything.
  1333. */
  1334. if (!ctrl->apsta)
  1335. return 0;
  1336. if (ctrl->npss > 31) {
  1337. dev_warn(ctrl->device, "NPSS is invalid; not using APST\n");
  1338. return 0;
  1339. }
  1340. table = kzalloc(sizeof(*table), GFP_KERNEL);
  1341. if (!table)
  1342. return 0;
  1343. if (!ctrl->apst_enabled || ctrl->ps_max_latency_us == 0) {
  1344. /* Turn off APST. */
  1345. apste = 0;
  1346. dev_dbg(ctrl->device, "APST disabled\n");
  1347. } else {
  1348. __le64 target = cpu_to_le64(0);
  1349. int state;
  1350. /*
  1351. * Walk through all states from lowest- to highest-power.
  1352. * According to the spec, lower-numbered states use more
  1353. * power. NPSS, despite the name, is the index of the
  1354. * lowest-power state, not the number of states.
  1355. */
  1356. for (state = (int)ctrl->npss; state >= 0; state--) {
  1357. u64 total_latency_us, exit_latency_us, transition_ms;
  1358. if (target)
  1359. table->entries[state] = target;
  1360. /*
  1361. * Don't allow transitions to the deepest state
  1362. * if it's quirked off.
  1363. */
  1364. if (state == ctrl->npss &&
  1365. (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS))
  1366. continue;
  1367. /*
  1368. * Is this state a useful non-operational state for
  1369. * higher-power states to autonomously transition to?
  1370. */
  1371. if (!(ctrl->psd[state].flags &
  1372. NVME_PS_FLAGS_NON_OP_STATE))
  1373. continue;
  1374. exit_latency_us =
  1375. (u64)le32_to_cpu(ctrl->psd[state].exit_lat);
  1376. if (exit_latency_us > ctrl->ps_max_latency_us)
  1377. continue;
  1378. total_latency_us =
  1379. exit_latency_us +
  1380. le32_to_cpu(ctrl->psd[state].entry_lat);
  1381. /*
  1382. * This state is good. Use it as the APST idle
  1383. * target for higher power states.
  1384. */
  1385. transition_ms = total_latency_us + 19;
  1386. do_div(transition_ms, 20);
  1387. if (transition_ms > (1 << 24) - 1)
  1388. transition_ms = (1 << 24) - 1;
  1389. target = cpu_to_le64((state << 3) |
  1390. (transition_ms << 8));
  1391. if (max_ps == -1)
  1392. max_ps = state;
  1393. if (total_latency_us > max_lat_us)
  1394. max_lat_us = total_latency_us;
  1395. }
  1396. apste = 1;
  1397. if (max_ps == -1) {
  1398. dev_dbg(ctrl->device, "APST enabled but no non-operational states are available\n");
  1399. } else {
  1400. dev_dbg(ctrl->device, "APST enabled: max PS = %d, max round-trip latency = %lluus, table = %*phN\n",
  1401. max_ps, max_lat_us, (int)sizeof(*table), table);
  1402. }
  1403. }
  1404. ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste,
  1405. table, sizeof(*table), NULL);
  1406. if (ret)
  1407. dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret);
  1408. kfree(table);
  1409. return ret;
  1410. }
  1411. static void nvme_set_latency_tolerance(struct device *dev, s32 val)
  1412. {
  1413. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1414. u64 latency;
  1415. switch (val) {
  1416. case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT:
  1417. case PM_QOS_LATENCY_ANY:
  1418. latency = U64_MAX;
  1419. break;
  1420. default:
  1421. latency = val;
  1422. }
  1423. if (ctrl->ps_max_latency_us != latency) {
  1424. ctrl->ps_max_latency_us = latency;
  1425. nvme_configure_apst(ctrl);
  1426. }
  1427. }
  1428. struct nvme_core_quirk_entry {
  1429. /*
  1430. * NVMe model and firmware strings are padded with spaces. For
  1431. * simplicity, strings in the quirk table are padded with NULLs
  1432. * instead.
  1433. */
  1434. u16 vid;
  1435. const char *mn;
  1436. const char *fr;
  1437. unsigned long quirks;
  1438. };
  1439. static const struct nvme_core_quirk_entry core_quirks[] = {
  1440. {
  1441. /*
  1442. * This Toshiba device seems to die using any APST states. See:
  1443. * https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1678184/comments/11
  1444. */
  1445. .vid = 0x1179,
  1446. .mn = "THNSF5256GPUK TOSHIBA",
  1447. .quirks = NVME_QUIRK_NO_APST,
  1448. }
  1449. };
  1450. /* match is null-terminated but idstr is space-padded. */
  1451. static bool string_matches(const char *idstr, const char *match, size_t len)
  1452. {
  1453. size_t matchlen;
  1454. if (!match)
  1455. return true;
  1456. matchlen = strlen(match);
  1457. WARN_ON_ONCE(matchlen > len);
  1458. if (memcmp(idstr, match, matchlen))
  1459. return false;
  1460. for (; matchlen < len; matchlen++)
  1461. if (idstr[matchlen] != ' ')
  1462. return false;
  1463. return true;
  1464. }
  1465. static bool quirk_matches(const struct nvme_id_ctrl *id,
  1466. const struct nvme_core_quirk_entry *q)
  1467. {
  1468. return q->vid == le16_to_cpu(id->vid) &&
  1469. string_matches(id->mn, q->mn, sizeof(id->mn)) &&
  1470. string_matches(id->fr, q->fr, sizeof(id->fr));
  1471. }
  1472. static void nvme_init_subnqn(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
  1473. {
  1474. size_t nqnlen;
  1475. int off;
  1476. nqnlen = strnlen(id->subnqn, NVMF_NQN_SIZE);
  1477. if (nqnlen > 0 && nqnlen < NVMF_NQN_SIZE) {
  1478. strcpy(ctrl->subnqn, id->subnqn);
  1479. return;
  1480. }
  1481. if (ctrl->vs >= NVME_VS(1, 2, 1))
  1482. dev_warn(ctrl->device, "missing or invalid SUBNQN field.\n");
  1483. /* Generate a "fake" NQN per Figure 254 in NVMe 1.3 + ECN 001 */
  1484. off = snprintf(ctrl->subnqn, NVMF_NQN_SIZE,
  1485. "nqn.2014.08.org.nvmexpress:%4x%4x",
  1486. le16_to_cpu(id->vid), le16_to_cpu(id->ssvid));
  1487. memcpy(ctrl->subnqn + off, id->sn, sizeof(id->sn));
  1488. off += sizeof(id->sn);
  1489. memcpy(ctrl->subnqn + off, id->mn, sizeof(id->mn));
  1490. off += sizeof(id->mn);
  1491. memset(ctrl->subnqn + off, 0, sizeof(ctrl->subnqn) - off);
  1492. }
  1493. /*
  1494. * Initialize the cached copies of the Identify data and various controller
  1495. * register in our nvme_ctrl structure. This should be called as soon as
  1496. * the admin queue is fully up and running.
  1497. */
  1498. int nvme_init_identify(struct nvme_ctrl *ctrl)
  1499. {
  1500. struct nvme_id_ctrl *id;
  1501. u64 cap;
  1502. int ret, page_shift;
  1503. u32 max_hw_sectors;
  1504. bool prev_apst_enabled;
  1505. ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs);
  1506. if (ret) {
  1507. dev_err(ctrl->device, "Reading VS failed (%d)\n", ret);
  1508. return ret;
  1509. }
  1510. ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &cap);
  1511. if (ret) {
  1512. dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret);
  1513. return ret;
  1514. }
  1515. page_shift = NVME_CAP_MPSMIN(cap) + 12;
  1516. if (ctrl->vs >= NVME_VS(1, 1, 0))
  1517. ctrl->subsystem = NVME_CAP_NSSRC(cap);
  1518. ret = nvme_identify_ctrl(ctrl, &id);
  1519. if (ret) {
  1520. dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret);
  1521. return -EIO;
  1522. }
  1523. nvme_init_subnqn(ctrl, id);
  1524. if (!ctrl->identified) {
  1525. /*
  1526. * Check for quirks. Quirk can depend on firmware version,
  1527. * so, in principle, the set of quirks present can change
  1528. * across a reset. As a possible future enhancement, we
  1529. * could re-scan for quirks every time we reinitialize
  1530. * the device, but we'd have to make sure that the driver
  1531. * behaves intelligently if the quirks change.
  1532. */
  1533. int i;
  1534. for (i = 0; i < ARRAY_SIZE(core_quirks); i++) {
  1535. if (quirk_matches(id, &core_quirks[i]))
  1536. ctrl->quirks |= core_quirks[i].quirks;
  1537. }
  1538. }
  1539. if (force_apst && (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) {
  1540. dev_warn(ctrl->device, "forcibly allowing all power states due to nvme_core.force_apst -- use at your own risk\n");
  1541. ctrl->quirks &= ~NVME_QUIRK_NO_DEEPEST_PS;
  1542. }
  1543. ctrl->oacs = le16_to_cpu(id->oacs);
  1544. ctrl->vid = le16_to_cpu(id->vid);
  1545. ctrl->oncs = le16_to_cpup(&id->oncs);
  1546. atomic_set(&ctrl->abort_limit, id->acl + 1);
  1547. ctrl->vwc = id->vwc;
  1548. ctrl->cntlid = le16_to_cpup(&id->cntlid);
  1549. memcpy(ctrl->serial, id->sn, sizeof(id->sn));
  1550. memcpy(ctrl->model, id->mn, sizeof(id->mn));
  1551. memcpy(ctrl->firmware_rev, id->fr, sizeof(id->fr));
  1552. if (id->mdts)
  1553. max_hw_sectors = 1 << (id->mdts + page_shift - 9);
  1554. else
  1555. max_hw_sectors = UINT_MAX;
  1556. ctrl->max_hw_sectors =
  1557. min_not_zero(ctrl->max_hw_sectors, max_hw_sectors);
  1558. nvme_set_queue_limits(ctrl, ctrl->admin_q);
  1559. ctrl->sgls = le32_to_cpu(id->sgls);
  1560. ctrl->kas = le16_to_cpu(id->kas);
  1561. if (id->rtd3e) {
  1562. /* us -> s */
  1563. u32 transition_time = le32_to_cpu(id->rtd3e) / 1000000;
  1564. ctrl->shutdown_timeout = clamp_t(unsigned int, transition_time,
  1565. shutdown_timeout, 60);
  1566. if (ctrl->shutdown_timeout != shutdown_timeout)
  1567. dev_warn(ctrl->device,
  1568. "Shutdown timeout set to %u seconds\n",
  1569. ctrl->shutdown_timeout);
  1570. } else
  1571. ctrl->shutdown_timeout = shutdown_timeout;
  1572. ctrl->npss = id->npss;
  1573. ctrl->apsta = id->apsta;
  1574. prev_apst_enabled = ctrl->apst_enabled;
  1575. if (ctrl->quirks & NVME_QUIRK_NO_APST) {
  1576. if (force_apst && id->apsta) {
  1577. dev_warn(ctrl->device, "forcibly allowing APST due to nvme_core.force_apst -- use at your own risk\n");
  1578. ctrl->apst_enabled = true;
  1579. } else {
  1580. ctrl->apst_enabled = false;
  1581. }
  1582. } else {
  1583. ctrl->apst_enabled = id->apsta;
  1584. }
  1585. memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd));
  1586. if (ctrl->ops->flags & NVME_F_FABRICS) {
  1587. ctrl->icdoff = le16_to_cpu(id->icdoff);
  1588. ctrl->ioccsz = le32_to_cpu(id->ioccsz);
  1589. ctrl->iorcsz = le32_to_cpu(id->iorcsz);
  1590. ctrl->maxcmd = le16_to_cpu(id->maxcmd);
  1591. /*
  1592. * In fabrics we need to verify the cntlid matches the
  1593. * admin connect
  1594. */
  1595. if (ctrl->cntlid != le16_to_cpu(id->cntlid)) {
  1596. ret = -EINVAL;
  1597. goto out_free;
  1598. }
  1599. if (!ctrl->opts->discovery_nqn && !ctrl->kas) {
  1600. dev_err(ctrl->device,
  1601. "keep-alive support is mandatory for fabrics\n");
  1602. ret = -EINVAL;
  1603. goto out_free;
  1604. }
  1605. } else {
  1606. ctrl->cntlid = le16_to_cpu(id->cntlid);
  1607. ctrl->hmpre = le32_to_cpu(id->hmpre);
  1608. ctrl->hmmin = le32_to_cpu(id->hmmin);
  1609. }
  1610. kfree(id);
  1611. if (ctrl->apst_enabled && !prev_apst_enabled)
  1612. dev_pm_qos_expose_latency_tolerance(ctrl->device);
  1613. else if (!ctrl->apst_enabled && prev_apst_enabled)
  1614. dev_pm_qos_hide_latency_tolerance(ctrl->device);
  1615. ret = nvme_configure_apst(ctrl);
  1616. if (ret < 0)
  1617. return ret;
  1618. ret = nvme_configure_timestamp(ctrl);
  1619. if (ret < 0)
  1620. return ret;
  1621. ret = nvme_configure_directives(ctrl);
  1622. if (ret < 0)
  1623. return ret;
  1624. ctrl->identified = true;
  1625. return 0;
  1626. out_free:
  1627. kfree(id);
  1628. return ret;
  1629. }
  1630. EXPORT_SYMBOL_GPL(nvme_init_identify);
  1631. static int nvme_dev_open(struct inode *inode, struct file *file)
  1632. {
  1633. struct nvme_ctrl *ctrl;
  1634. int instance = iminor(inode);
  1635. int ret = -ENODEV;
  1636. spin_lock(&dev_list_lock);
  1637. list_for_each_entry(ctrl, &nvme_ctrl_list, node) {
  1638. if (ctrl->instance != instance)
  1639. continue;
  1640. if (!ctrl->admin_q) {
  1641. ret = -EWOULDBLOCK;
  1642. break;
  1643. }
  1644. if (!kref_get_unless_zero(&ctrl->kref))
  1645. break;
  1646. file->private_data = ctrl;
  1647. ret = 0;
  1648. break;
  1649. }
  1650. spin_unlock(&dev_list_lock);
  1651. return ret;
  1652. }
  1653. static int nvme_dev_release(struct inode *inode, struct file *file)
  1654. {
  1655. nvme_put_ctrl(file->private_data);
  1656. return 0;
  1657. }
  1658. static int nvme_dev_user_cmd(struct nvme_ctrl *ctrl, void __user *argp)
  1659. {
  1660. struct nvme_ns *ns;
  1661. int ret;
  1662. mutex_lock(&ctrl->namespaces_mutex);
  1663. if (list_empty(&ctrl->namespaces)) {
  1664. ret = -ENOTTY;
  1665. goto out_unlock;
  1666. }
  1667. ns = list_first_entry(&ctrl->namespaces, struct nvme_ns, list);
  1668. if (ns != list_last_entry(&ctrl->namespaces, struct nvme_ns, list)) {
  1669. dev_warn(ctrl->device,
  1670. "NVME_IOCTL_IO_CMD not supported when multiple namespaces present!\n");
  1671. ret = -EINVAL;
  1672. goto out_unlock;
  1673. }
  1674. dev_warn(ctrl->device,
  1675. "using deprecated NVME_IOCTL_IO_CMD ioctl on the char device!\n");
  1676. kref_get(&ns->kref);
  1677. mutex_unlock(&ctrl->namespaces_mutex);
  1678. ret = nvme_user_cmd(ctrl, ns, argp);
  1679. nvme_put_ns(ns);
  1680. return ret;
  1681. out_unlock:
  1682. mutex_unlock(&ctrl->namespaces_mutex);
  1683. return ret;
  1684. }
  1685. static long nvme_dev_ioctl(struct file *file, unsigned int cmd,
  1686. unsigned long arg)
  1687. {
  1688. struct nvme_ctrl *ctrl = file->private_data;
  1689. void __user *argp = (void __user *)arg;
  1690. switch (cmd) {
  1691. case NVME_IOCTL_ADMIN_CMD:
  1692. return nvme_user_cmd(ctrl, NULL, argp);
  1693. case NVME_IOCTL_IO_CMD:
  1694. return nvme_dev_user_cmd(ctrl, argp);
  1695. case NVME_IOCTL_RESET:
  1696. dev_warn(ctrl->device, "resetting controller\n");
  1697. return nvme_reset_ctrl_sync(ctrl);
  1698. case NVME_IOCTL_SUBSYS_RESET:
  1699. return nvme_reset_subsystem(ctrl);
  1700. case NVME_IOCTL_RESCAN:
  1701. nvme_queue_scan(ctrl);
  1702. return 0;
  1703. default:
  1704. return -ENOTTY;
  1705. }
  1706. }
  1707. static const struct file_operations nvme_dev_fops = {
  1708. .owner = THIS_MODULE,
  1709. .open = nvme_dev_open,
  1710. .release = nvme_dev_release,
  1711. .unlocked_ioctl = nvme_dev_ioctl,
  1712. .compat_ioctl = nvme_dev_ioctl,
  1713. };
  1714. static ssize_t nvme_sysfs_reset(struct device *dev,
  1715. struct device_attribute *attr, const char *buf,
  1716. size_t count)
  1717. {
  1718. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1719. int ret;
  1720. ret = nvme_reset_ctrl_sync(ctrl);
  1721. if (ret < 0)
  1722. return ret;
  1723. return count;
  1724. }
  1725. static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset);
  1726. static ssize_t nvme_sysfs_rescan(struct device *dev,
  1727. struct device_attribute *attr, const char *buf,
  1728. size_t count)
  1729. {
  1730. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1731. nvme_queue_scan(ctrl);
  1732. return count;
  1733. }
  1734. static DEVICE_ATTR(rescan_controller, S_IWUSR, NULL, nvme_sysfs_rescan);
  1735. static ssize_t wwid_show(struct device *dev, struct device_attribute *attr,
  1736. char *buf)
  1737. {
  1738. struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
  1739. struct nvme_ctrl *ctrl = ns->ctrl;
  1740. int serial_len = sizeof(ctrl->serial);
  1741. int model_len = sizeof(ctrl->model);
  1742. if (!uuid_is_null(&ns->uuid))
  1743. return sprintf(buf, "uuid.%pU\n", &ns->uuid);
  1744. if (memchr_inv(ns->nguid, 0, sizeof(ns->nguid)))
  1745. return sprintf(buf, "eui.%16phN\n", ns->nguid);
  1746. if (memchr_inv(ns->eui, 0, sizeof(ns->eui)))
  1747. return sprintf(buf, "eui.%8phN\n", ns->eui);
  1748. while (serial_len > 0 && (ctrl->serial[serial_len - 1] == ' ' ||
  1749. ctrl->serial[serial_len - 1] == '\0'))
  1750. serial_len--;
  1751. while (model_len > 0 && (ctrl->model[model_len - 1] == ' ' ||
  1752. ctrl->model[model_len - 1] == '\0'))
  1753. model_len--;
  1754. return sprintf(buf, "nvme.%04x-%*phN-%*phN-%08x\n", ctrl->vid,
  1755. serial_len, ctrl->serial, model_len, ctrl->model, ns->ns_id);
  1756. }
  1757. static DEVICE_ATTR(wwid, S_IRUGO, wwid_show, NULL);
  1758. static ssize_t nguid_show(struct device *dev, struct device_attribute *attr,
  1759. char *buf)
  1760. {
  1761. struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
  1762. return sprintf(buf, "%pU\n", ns->nguid);
  1763. }
  1764. static DEVICE_ATTR(nguid, S_IRUGO, nguid_show, NULL);
  1765. static ssize_t uuid_show(struct device *dev, struct device_attribute *attr,
  1766. char *buf)
  1767. {
  1768. struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
  1769. /* For backward compatibility expose the NGUID to userspace if
  1770. * we have no UUID set
  1771. */
  1772. if (uuid_is_null(&ns->uuid)) {
  1773. printk_ratelimited(KERN_WARNING
  1774. "No UUID available providing old NGUID\n");
  1775. return sprintf(buf, "%pU\n", ns->nguid);
  1776. }
  1777. return sprintf(buf, "%pU\n", &ns->uuid);
  1778. }
  1779. static DEVICE_ATTR(uuid, S_IRUGO, uuid_show, NULL);
  1780. static ssize_t eui_show(struct device *dev, struct device_attribute *attr,
  1781. char *buf)
  1782. {
  1783. struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
  1784. return sprintf(buf, "%8phd\n", ns->eui);
  1785. }
  1786. static DEVICE_ATTR(eui, S_IRUGO, eui_show, NULL);
  1787. static ssize_t nsid_show(struct device *dev, struct device_attribute *attr,
  1788. char *buf)
  1789. {
  1790. struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
  1791. return sprintf(buf, "%d\n", ns->ns_id);
  1792. }
  1793. static DEVICE_ATTR(nsid, S_IRUGO, nsid_show, NULL);
  1794. static struct attribute *nvme_ns_attrs[] = {
  1795. &dev_attr_wwid.attr,
  1796. &dev_attr_uuid.attr,
  1797. &dev_attr_nguid.attr,
  1798. &dev_attr_eui.attr,
  1799. &dev_attr_nsid.attr,
  1800. NULL,
  1801. };
  1802. static umode_t nvme_ns_attrs_are_visible(struct kobject *kobj,
  1803. struct attribute *a, int n)
  1804. {
  1805. struct device *dev = container_of(kobj, struct device, kobj);
  1806. struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
  1807. if (a == &dev_attr_uuid.attr) {
  1808. if (uuid_is_null(&ns->uuid) ||
  1809. !memchr_inv(ns->nguid, 0, sizeof(ns->nguid)))
  1810. return 0;
  1811. }
  1812. if (a == &dev_attr_nguid.attr) {
  1813. if (!memchr_inv(ns->nguid, 0, sizeof(ns->nguid)))
  1814. return 0;
  1815. }
  1816. if (a == &dev_attr_eui.attr) {
  1817. if (!memchr_inv(ns->eui, 0, sizeof(ns->eui)))
  1818. return 0;
  1819. }
  1820. return a->mode;
  1821. }
  1822. static const struct attribute_group nvme_ns_attr_group = {
  1823. .attrs = nvme_ns_attrs,
  1824. .is_visible = nvme_ns_attrs_are_visible,
  1825. };
  1826. #define nvme_show_str_function(field) \
  1827. static ssize_t field##_show(struct device *dev, \
  1828. struct device_attribute *attr, char *buf) \
  1829. { \
  1830. struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \
  1831. return sprintf(buf, "%.*s\n", (int)sizeof(ctrl->field), ctrl->field); \
  1832. } \
  1833. static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL);
  1834. #define nvme_show_int_function(field) \
  1835. static ssize_t field##_show(struct device *dev, \
  1836. struct device_attribute *attr, char *buf) \
  1837. { \
  1838. struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \
  1839. return sprintf(buf, "%d\n", ctrl->field); \
  1840. } \
  1841. static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL);
  1842. nvme_show_str_function(model);
  1843. nvme_show_str_function(serial);
  1844. nvme_show_str_function(firmware_rev);
  1845. nvme_show_int_function(cntlid);
  1846. static ssize_t nvme_sysfs_delete(struct device *dev,
  1847. struct device_attribute *attr, const char *buf,
  1848. size_t count)
  1849. {
  1850. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1851. if (device_remove_file_self(dev, attr))
  1852. ctrl->ops->delete_ctrl(ctrl);
  1853. return count;
  1854. }
  1855. static DEVICE_ATTR(delete_controller, S_IWUSR, NULL, nvme_sysfs_delete);
  1856. static ssize_t nvme_sysfs_show_transport(struct device *dev,
  1857. struct device_attribute *attr,
  1858. char *buf)
  1859. {
  1860. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1861. return snprintf(buf, PAGE_SIZE, "%s\n", ctrl->ops->name);
  1862. }
  1863. static DEVICE_ATTR(transport, S_IRUGO, nvme_sysfs_show_transport, NULL);
  1864. static ssize_t nvme_sysfs_show_state(struct device *dev,
  1865. struct device_attribute *attr,
  1866. char *buf)
  1867. {
  1868. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1869. static const char *const state_name[] = {
  1870. [NVME_CTRL_NEW] = "new",
  1871. [NVME_CTRL_LIVE] = "live",
  1872. [NVME_CTRL_RESETTING] = "resetting",
  1873. [NVME_CTRL_RECONNECTING]= "reconnecting",
  1874. [NVME_CTRL_DELETING] = "deleting",
  1875. [NVME_CTRL_DEAD] = "dead",
  1876. };
  1877. if ((unsigned)ctrl->state < ARRAY_SIZE(state_name) &&
  1878. state_name[ctrl->state])
  1879. return sprintf(buf, "%s\n", state_name[ctrl->state]);
  1880. return sprintf(buf, "unknown state\n");
  1881. }
  1882. static DEVICE_ATTR(state, S_IRUGO, nvme_sysfs_show_state, NULL);
  1883. static ssize_t nvme_sysfs_show_subsysnqn(struct device *dev,
  1884. struct device_attribute *attr,
  1885. char *buf)
  1886. {
  1887. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1888. return snprintf(buf, PAGE_SIZE, "%s\n", ctrl->subnqn);
  1889. }
  1890. static DEVICE_ATTR(subsysnqn, S_IRUGO, nvme_sysfs_show_subsysnqn, NULL);
  1891. static ssize_t nvme_sysfs_show_address(struct device *dev,
  1892. struct device_attribute *attr,
  1893. char *buf)
  1894. {
  1895. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1896. return ctrl->ops->get_address(ctrl, buf, PAGE_SIZE);
  1897. }
  1898. static DEVICE_ATTR(address, S_IRUGO, nvme_sysfs_show_address, NULL);
  1899. static struct attribute *nvme_dev_attrs[] = {
  1900. &dev_attr_reset_controller.attr,
  1901. &dev_attr_rescan_controller.attr,
  1902. &dev_attr_model.attr,
  1903. &dev_attr_serial.attr,
  1904. &dev_attr_firmware_rev.attr,
  1905. &dev_attr_cntlid.attr,
  1906. &dev_attr_delete_controller.attr,
  1907. &dev_attr_transport.attr,
  1908. &dev_attr_subsysnqn.attr,
  1909. &dev_attr_address.attr,
  1910. &dev_attr_state.attr,
  1911. NULL
  1912. };
  1913. static umode_t nvme_dev_attrs_are_visible(struct kobject *kobj,
  1914. struct attribute *a, int n)
  1915. {
  1916. struct device *dev = container_of(kobj, struct device, kobj);
  1917. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1918. if (a == &dev_attr_delete_controller.attr && !ctrl->ops->delete_ctrl)
  1919. return 0;
  1920. if (a == &dev_attr_address.attr && !ctrl->ops->get_address)
  1921. return 0;
  1922. return a->mode;
  1923. }
  1924. static struct attribute_group nvme_dev_attrs_group = {
  1925. .attrs = nvme_dev_attrs,
  1926. .is_visible = nvme_dev_attrs_are_visible,
  1927. };
  1928. static const struct attribute_group *nvme_dev_attr_groups[] = {
  1929. &nvme_dev_attrs_group,
  1930. NULL,
  1931. };
  1932. static int ns_cmp(void *priv, struct list_head *a, struct list_head *b)
  1933. {
  1934. struct nvme_ns *nsa = container_of(a, struct nvme_ns, list);
  1935. struct nvme_ns *nsb = container_of(b, struct nvme_ns, list);
  1936. return nsa->ns_id - nsb->ns_id;
  1937. }
  1938. static struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid)
  1939. {
  1940. struct nvme_ns *ns, *ret = NULL;
  1941. mutex_lock(&ctrl->namespaces_mutex);
  1942. list_for_each_entry(ns, &ctrl->namespaces, list) {
  1943. if (ns->ns_id == nsid) {
  1944. kref_get(&ns->kref);
  1945. ret = ns;
  1946. break;
  1947. }
  1948. if (ns->ns_id > nsid)
  1949. break;
  1950. }
  1951. mutex_unlock(&ctrl->namespaces_mutex);
  1952. return ret;
  1953. }
  1954. static int nvme_setup_streams_ns(struct nvme_ctrl *ctrl, struct nvme_ns *ns)
  1955. {
  1956. struct streams_directive_params s;
  1957. int ret;
  1958. if (!ctrl->nr_streams)
  1959. return 0;
  1960. ret = nvme_get_stream_params(ctrl, &s, ns->ns_id);
  1961. if (ret)
  1962. return ret;
  1963. ns->sws = le32_to_cpu(s.sws);
  1964. ns->sgs = le16_to_cpu(s.sgs);
  1965. if (ns->sws) {
  1966. unsigned int bs = 1 << ns->lba_shift;
  1967. blk_queue_io_min(ns->queue, bs * ns->sws);
  1968. if (ns->sgs)
  1969. blk_queue_io_opt(ns->queue, bs * ns->sws * ns->sgs);
  1970. }
  1971. return 0;
  1972. }
  1973. static void nvme_alloc_ns(struct nvme_ctrl *ctrl, unsigned nsid)
  1974. {
  1975. struct nvme_ns *ns;
  1976. struct gendisk *disk;
  1977. struct nvme_id_ns *id;
  1978. char disk_name[DISK_NAME_LEN];
  1979. int node = dev_to_node(ctrl->dev);
  1980. ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
  1981. if (!ns)
  1982. return;
  1983. ns->instance = ida_simple_get(&ctrl->ns_ida, 1, 0, GFP_KERNEL);
  1984. if (ns->instance < 0)
  1985. goto out_free_ns;
  1986. ns->queue = blk_mq_init_queue(ctrl->tagset);
  1987. if (IS_ERR(ns->queue))
  1988. goto out_release_instance;
  1989. queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
  1990. ns->queue->queuedata = ns;
  1991. ns->ctrl = ctrl;
  1992. kref_init(&ns->kref);
  1993. ns->ns_id = nsid;
  1994. ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */
  1995. blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
  1996. nvme_set_queue_limits(ctrl, ns->queue);
  1997. nvme_setup_streams_ns(ctrl, ns);
  1998. sprintf(disk_name, "nvme%dn%d", ctrl->instance, ns->instance);
  1999. id = nvme_identify_ns(ctrl, nsid);
  2000. if (!id)
  2001. goto out_free_queue;
  2002. if (id->ncap == 0)
  2003. goto out_free_id;
  2004. nvme_report_ns_ids(ctrl, ns->ns_id, id, ns->eui, ns->nguid, &ns->uuid);
  2005. if (nvme_nvm_ns_supported(ns, id) &&
  2006. nvme_nvm_register(ns, disk_name, node)) {
  2007. dev_warn(ctrl->device, "%s: LightNVM init failure\n", __func__);
  2008. goto out_free_id;
  2009. }
  2010. disk = alloc_disk_node(0, node);
  2011. if (!disk)
  2012. goto out_free_id;
  2013. disk->fops = &nvme_fops;
  2014. disk->private_data = ns;
  2015. disk->queue = ns->queue;
  2016. disk->flags = GENHD_FL_EXT_DEVT;
  2017. memcpy(disk->disk_name, disk_name, DISK_NAME_LEN);
  2018. ns->disk = disk;
  2019. __nvme_revalidate_disk(disk, id);
  2020. mutex_lock(&ctrl->namespaces_mutex);
  2021. list_add_tail(&ns->list, &ctrl->namespaces);
  2022. mutex_unlock(&ctrl->namespaces_mutex);
  2023. kref_get(&ctrl->kref);
  2024. kfree(id);
  2025. device_add_disk(ctrl->device, ns->disk);
  2026. if (sysfs_create_group(&disk_to_dev(ns->disk)->kobj,
  2027. &nvme_ns_attr_group))
  2028. pr_warn("%s: failed to create sysfs group for identification\n",
  2029. ns->disk->disk_name);
  2030. if (ns->ndev && nvme_nvm_register_sysfs(ns))
  2031. pr_warn("%s: failed to register lightnvm sysfs group for identification\n",
  2032. ns->disk->disk_name);
  2033. return;
  2034. out_free_id:
  2035. kfree(id);
  2036. out_free_queue:
  2037. blk_cleanup_queue(ns->queue);
  2038. out_release_instance:
  2039. ida_simple_remove(&ctrl->ns_ida, ns->instance);
  2040. out_free_ns:
  2041. kfree(ns);
  2042. }
  2043. static void nvme_ns_remove(struct nvme_ns *ns)
  2044. {
  2045. if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags))
  2046. return;
  2047. if (ns->disk && ns->disk->flags & GENHD_FL_UP) {
  2048. if (blk_get_integrity(ns->disk))
  2049. blk_integrity_unregister(ns->disk);
  2050. sysfs_remove_group(&disk_to_dev(ns->disk)->kobj,
  2051. &nvme_ns_attr_group);
  2052. if (ns->ndev)
  2053. nvme_nvm_unregister_sysfs(ns);
  2054. del_gendisk(ns->disk);
  2055. blk_cleanup_queue(ns->queue);
  2056. }
  2057. mutex_lock(&ns->ctrl->namespaces_mutex);
  2058. list_del_init(&ns->list);
  2059. mutex_unlock(&ns->ctrl->namespaces_mutex);
  2060. nvme_put_ns(ns);
  2061. }
  2062. static void nvme_validate_ns(struct nvme_ctrl *ctrl, unsigned nsid)
  2063. {
  2064. struct nvme_ns *ns;
  2065. ns = nvme_find_get_ns(ctrl, nsid);
  2066. if (ns) {
  2067. if (ns->disk && revalidate_disk(ns->disk))
  2068. nvme_ns_remove(ns);
  2069. nvme_put_ns(ns);
  2070. } else
  2071. nvme_alloc_ns(ctrl, nsid);
  2072. }
  2073. static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
  2074. unsigned nsid)
  2075. {
  2076. struct nvme_ns *ns, *next;
  2077. list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) {
  2078. if (ns->ns_id > nsid)
  2079. nvme_ns_remove(ns);
  2080. }
  2081. }
  2082. static int nvme_scan_ns_list(struct nvme_ctrl *ctrl, unsigned nn)
  2083. {
  2084. struct nvme_ns *ns;
  2085. __le32 *ns_list;
  2086. unsigned i, j, nsid, prev = 0, num_lists = DIV_ROUND_UP(nn, 1024);
  2087. int ret = 0;
  2088. ns_list = kzalloc(0x1000, GFP_KERNEL);
  2089. if (!ns_list)
  2090. return -ENOMEM;
  2091. for (i = 0; i < num_lists; i++) {
  2092. ret = nvme_identify_ns_list(ctrl, prev, ns_list);
  2093. if (ret)
  2094. goto free;
  2095. for (j = 0; j < min(nn, 1024U); j++) {
  2096. nsid = le32_to_cpu(ns_list[j]);
  2097. if (!nsid)
  2098. goto out;
  2099. nvme_validate_ns(ctrl, nsid);
  2100. while (++prev < nsid) {
  2101. ns = nvme_find_get_ns(ctrl, prev);
  2102. if (ns) {
  2103. nvme_ns_remove(ns);
  2104. nvme_put_ns(ns);
  2105. }
  2106. }
  2107. }
  2108. nn -= j;
  2109. }
  2110. out:
  2111. nvme_remove_invalid_namespaces(ctrl, prev);
  2112. free:
  2113. kfree(ns_list);
  2114. return ret;
  2115. }
  2116. static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl, unsigned nn)
  2117. {
  2118. unsigned i;
  2119. for (i = 1; i <= nn; i++)
  2120. nvme_validate_ns(ctrl, i);
  2121. nvme_remove_invalid_namespaces(ctrl, nn);
  2122. }
  2123. static void nvme_scan_work(struct work_struct *work)
  2124. {
  2125. struct nvme_ctrl *ctrl =
  2126. container_of(work, struct nvme_ctrl, scan_work);
  2127. struct nvme_id_ctrl *id;
  2128. unsigned nn;
  2129. if (ctrl->state != NVME_CTRL_LIVE)
  2130. return;
  2131. if (nvme_identify_ctrl(ctrl, &id))
  2132. return;
  2133. nn = le32_to_cpu(id->nn);
  2134. if (ctrl->vs >= NVME_VS(1, 1, 0) &&
  2135. !(ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS)) {
  2136. if (!nvme_scan_ns_list(ctrl, nn))
  2137. goto done;
  2138. }
  2139. nvme_scan_ns_sequential(ctrl, nn);
  2140. done:
  2141. mutex_lock(&ctrl->namespaces_mutex);
  2142. list_sort(NULL, &ctrl->namespaces, ns_cmp);
  2143. mutex_unlock(&ctrl->namespaces_mutex);
  2144. kfree(id);
  2145. }
  2146. void nvme_queue_scan(struct nvme_ctrl *ctrl)
  2147. {
  2148. /*
  2149. * Do not queue new scan work when a controller is reset during
  2150. * removal.
  2151. */
  2152. if (ctrl->state == NVME_CTRL_LIVE)
  2153. queue_work(nvme_wq, &ctrl->scan_work);
  2154. }
  2155. EXPORT_SYMBOL_GPL(nvme_queue_scan);
  2156. /*
  2157. * This function iterates the namespace list unlocked to allow recovery from
  2158. * controller failure. It is up to the caller to ensure the namespace list is
  2159. * not modified by scan work while this function is executing.
  2160. */
  2161. void nvme_remove_namespaces(struct nvme_ctrl *ctrl)
  2162. {
  2163. struct nvme_ns *ns, *next;
  2164. /*
  2165. * The dead states indicates the controller was not gracefully
  2166. * disconnected. In that case, we won't be able to flush any data while
  2167. * removing the namespaces' disks; fail all the queues now to avoid
  2168. * potentially having to clean up the failed sync later.
  2169. */
  2170. if (ctrl->state == NVME_CTRL_DEAD)
  2171. nvme_kill_queues(ctrl);
  2172. list_for_each_entry_safe(ns, next, &ctrl->namespaces, list)
  2173. nvme_ns_remove(ns);
  2174. }
  2175. EXPORT_SYMBOL_GPL(nvme_remove_namespaces);
  2176. static void nvme_async_event_work(struct work_struct *work)
  2177. {
  2178. struct nvme_ctrl *ctrl =
  2179. container_of(work, struct nvme_ctrl, async_event_work);
  2180. spin_lock_irq(&ctrl->lock);
  2181. while (ctrl->event_limit > 0) {
  2182. int aer_idx = --ctrl->event_limit;
  2183. spin_unlock_irq(&ctrl->lock);
  2184. ctrl->ops->submit_async_event(ctrl, aer_idx);
  2185. spin_lock_irq(&ctrl->lock);
  2186. }
  2187. spin_unlock_irq(&ctrl->lock);
  2188. }
  2189. static bool nvme_ctrl_pp_status(struct nvme_ctrl *ctrl)
  2190. {
  2191. u32 csts;
  2192. if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts))
  2193. return false;
  2194. if (csts == ~0)
  2195. return false;
  2196. return ((ctrl->ctrl_config & NVME_CC_ENABLE) && (csts & NVME_CSTS_PP));
  2197. }
  2198. static void nvme_get_fw_slot_info(struct nvme_ctrl *ctrl)
  2199. {
  2200. struct nvme_command c = { };
  2201. struct nvme_fw_slot_info_log *log;
  2202. log = kmalloc(sizeof(*log), GFP_KERNEL);
  2203. if (!log)
  2204. return;
  2205. c.common.opcode = nvme_admin_get_log_page;
  2206. c.common.nsid = cpu_to_le32(NVME_NSID_ALL);
  2207. c.common.cdw10[0] = nvme_get_log_dw10(NVME_LOG_FW_SLOT, sizeof(*log));
  2208. if (!nvme_submit_sync_cmd(ctrl->admin_q, &c, log, sizeof(*log)))
  2209. dev_warn(ctrl->device,
  2210. "Get FW SLOT INFO log error\n");
  2211. kfree(log);
  2212. }
  2213. static void nvme_fw_act_work(struct work_struct *work)
  2214. {
  2215. struct nvme_ctrl *ctrl = container_of(work,
  2216. struct nvme_ctrl, fw_act_work);
  2217. unsigned long fw_act_timeout;
  2218. if (ctrl->mtfa)
  2219. fw_act_timeout = jiffies +
  2220. msecs_to_jiffies(ctrl->mtfa * 100);
  2221. else
  2222. fw_act_timeout = jiffies +
  2223. msecs_to_jiffies(admin_timeout * 1000);
  2224. nvme_stop_queues(ctrl);
  2225. while (nvme_ctrl_pp_status(ctrl)) {
  2226. if (time_after(jiffies, fw_act_timeout)) {
  2227. dev_warn(ctrl->device,
  2228. "Fw activation timeout, reset controller\n");
  2229. nvme_reset_ctrl(ctrl);
  2230. break;
  2231. }
  2232. msleep(100);
  2233. }
  2234. if (ctrl->state != NVME_CTRL_LIVE)
  2235. return;
  2236. nvme_start_queues(ctrl);
  2237. /* read FW slot informationi to clear the AER*/
  2238. nvme_get_fw_slot_info(ctrl);
  2239. }
  2240. void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
  2241. union nvme_result *res)
  2242. {
  2243. u32 result = le32_to_cpu(res->u32);
  2244. bool done = true;
  2245. switch (le16_to_cpu(status) >> 1) {
  2246. case NVME_SC_SUCCESS:
  2247. done = false;
  2248. /*FALLTHRU*/
  2249. case NVME_SC_ABORT_REQ:
  2250. ++ctrl->event_limit;
  2251. queue_work(nvme_wq, &ctrl->async_event_work);
  2252. break;
  2253. default:
  2254. break;
  2255. }
  2256. if (done)
  2257. return;
  2258. switch (result & 0xff07) {
  2259. case NVME_AER_NOTICE_NS_CHANGED:
  2260. dev_info(ctrl->device, "rescanning\n");
  2261. nvme_queue_scan(ctrl);
  2262. break;
  2263. case NVME_AER_NOTICE_FW_ACT_STARTING:
  2264. schedule_work(&ctrl->fw_act_work);
  2265. break;
  2266. default:
  2267. dev_warn(ctrl->device, "async event result %08x\n", result);
  2268. }
  2269. }
  2270. EXPORT_SYMBOL_GPL(nvme_complete_async_event);
  2271. void nvme_queue_async_events(struct nvme_ctrl *ctrl)
  2272. {
  2273. ctrl->event_limit = NVME_NR_AERS;
  2274. queue_work(nvme_wq, &ctrl->async_event_work);
  2275. }
  2276. EXPORT_SYMBOL_GPL(nvme_queue_async_events);
  2277. static DEFINE_IDA(nvme_instance_ida);
  2278. static int nvme_set_instance(struct nvme_ctrl *ctrl)
  2279. {
  2280. int instance, error;
  2281. do {
  2282. if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
  2283. return -ENODEV;
  2284. spin_lock(&dev_list_lock);
  2285. error = ida_get_new(&nvme_instance_ida, &instance);
  2286. spin_unlock(&dev_list_lock);
  2287. } while (error == -EAGAIN);
  2288. if (error)
  2289. return -ENODEV;
  2290. ctrl->instance = instance;
  2291. return 0;
  2292. }
  2293. static void nvme_release_instance(struct nvme_ctrl *ctrl)
  2294. {
  2295. spin_lock(&dev_list_lock);
  2296. ida_remove(&nvme_instance_ida, ctrl->instance);
  2297. spin_unlock(&dev_list_lock);
  2298. }
  2299. void nvme_stop_ctrl(struct nvme_ctrl *ctrl)
  2300. {
  2301. nvme_stop_keep_alive(ctrl);
  2302. flush_work(&ctrl->async_event_work);
  2303. flush_work(&ctrl->scan_work);
  2304. cancel_work_sync(&ctrl->fw_act_work);
  2305. }
  2306. EXPORT_SYMBOL_GPL(nvme_stop_ctrl);
  2307. void nvme_start_ctrl(struct nvme_ctrl *ctrl)
  2308. {
  2309. if (ctrl->kato)
  2310. nvme_start_keep_alive(ctrl);
  2311. if (ctrl->queue_count > 1) {
  2312. nvme_queue_scan(ctrl);
  2313. nvme_queue_async_events(ctrl);
  2314. nvme_start_queues(ctrl);
  2315. }
  2316. }
  2317. EXPORT_SYMBOL_GPL(nvme_start_ctrl);
  2318. void nvme_uninit_ctrl(struct nvme_ctrl *ctrl)
  2319. {
  2320. device_destroy(nvme_class, MKDEV(nvme_char_major, ctrl->instance));
  2321. spin_lock(&dev_list_lock);
  2322. list_del(&ctrl->node);
  2323. spin_unlock(&dev_list_lock);
  2324. }
  2325. EXPORT_SYMBOL_GPL(nvme_uninit_ctrl);
  2326. static void nvme_free_ctrl(struct kref *kref)
  2327. {
  2328. struct nvme_ctrl *ctrl = container_of(kref, struct nvme_ctrl, kref);
  2329. put_device(ctrl->device);
  2330. nvme_release_instance(ctrl);
  2331. ida_destroy(&ctrl->ns_ida);
  2332. ctrl->ops->free_ctrl(ctrl);
  2333. }
  2334. void nvme_put_ctrl(struct nvme_ctrl *ctrl)
  2335. {
  2336. kref_put(&ctrl->kref, nvme_free_ctrl);
  2337. }
  2338. EXPORT_SYMBOL_GPL(nvme_put_ctrl);
  2339. /*
  2340. * Initialize a NVMe controller structures. This needs to be called during
  2341. * earliest initialization so that we have the initialized structured around
  2342. * during probing.
  2343. */
  2344. int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
  2345. const struct nvme_ctrl_ops *ops, unsigned long quirks)
  2346. {
  2347. int ret;
  2348. ctrl->state = NVME_CTRL_NEW;
  2349. spin_lock_init(&ctrl->lock);
  2350. INIT_LIST_HEAD(&ctrl->namespaces);
  2351. mutex_init(&ctrl->namespaces_mutex);
  2352. kref_init(&ctrl->kref);
  2353. ctrl->dev = dev;
  2354. ctrl->ops = ops;
  2355. ctrl->quirks = quirks;
  2356. INIT_WORK(&ctrl->scan_work, nvme_scan_work);
  2357. INIT_WORK(&ctrl->async_event_work, nvme_async_event_work);
  2358. INIT_WORK(&ctrl->fw_act_work, nvme_fw_act_work);
  2359. ret = nvme_set_instance(ctrl);
  2360. if (ret)
  2361. goto out;
  2362. ctrl->device = device_create_with_groups(nvme_class, ctrl->dev,
  2363. MKDEV(nvme_char_major, ctrl->instance),
  2364. ctrl, nvme_dev_attr_groups,
  2365. "nvme%d", ctrl->instance);
  2366. if (IS_ERR(ctrl->device)) {
  2367. ret = PTR_ERR(ctrl->device);
  2368. goto out_release_instance;
  2369. }
  2370. get_device(ctrl->device);
  2371. ida_init(&ctrl->ns_ida);
  2372. spin_lock(&dev_list_lock);
  2373. list_add_tail(&ctrl->node, &nvme_ctrl_list);
  2374. spin_unlock(&dev_list_lock);
  2375. /*
  2376. * Initialize latency tolerance controls. The sysfs files won't
  2377. * be visible to userspace unless the device actually supports APST.
  2378. */
  2379. ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance;
  2380. dev_pm_qos_update_user_latency_tolerance(ctrl->device,
  2381. min(default_ps_max_latency_us, (unsigned long)S32_MAX));
  2382. return 0;
  2383. out_release_instance:
  2384. nvme_release_instance(ctrl);
  2385. out:
  2386. return ret;
  2387. }
  2388. EXPORT_SYMBOL_GPL(nvme_init_ctrl);
  2389. /**
  2390. * nvme_kill_queues(): Ends all namespace queues
  2391. * @ctrl: the dead controller that needs to end
  2392. *
  2393. * Call this function when the driver determines it is unable to get the
  2394. * controller in a state capable of servicing IO.
  2395. */
  2396. void nvme_kill_queues(struct nvme_ctrl *ctrl)
  2397. {
  2398. struct nvme_ns *ns;
  2399. mutex_lock(&ctrl->namespaces_mutex);
  2400. /* Forcibly unquiesce queues to avoid blocking dispatch */
  2401. if (ctrl->admin_q)
  2402. blk_mq_unquiesce_queue(ctrl->admin_q);
  2403. list_for_each_entry(ns, &ctrl->namespaces, list) {
  2404. /*
  2405. * Revalidating a dead namespace sets capacity to 0. This will
  2406. * end buffered writers dirtying pages that can't be synced.
  2407. */
  2408. if (!ns->disk || test_and_set_bit(NVME_NS_DEAD, &ns->flags))
  2409. continue;
  2410. revalidate_disk(ns->disk);
  2411. blk_set_queue_dying(ns->queue);
  2412. /* Forcibly unquiesce queues to avoid blocking dispatch */
  2413. blk_mq_unquiesce_queue(ns->queue);
  2414. }
  2415. mutex_unlock(&ctrl->namespaces_mutex);
  2416. }
  2417. EXPORT_SYMBOL_GPL(nvme_kill_queues);
  2418. void nvme_unfreeze(struct nvme_ctrl *ctrl)
  2419. {
  2420. struct nvme_ns *ns;
  2421. mutex_lock(&ctrl->namespaces_mutex);
  2422. list_for_each_entry(ns, &ctrl->namespaces, list)
  2423. blk_mq_unfreeze_queue(ns->queue);
  2424. mutex_unlock(&ctrl->namespaces_mutex);
  2425. }
  2426. EXPORT_SYMBOL_GPL(nvme_unfreeze);
  2427. void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout)
  2428. {
  2429. struct nvme_ns *ns;
  2430. mutex_lock(&ctrl->namespaces_mutex);
  2431. list_for_each_entry(ns, &ctrl->namespaces, list) {
  2432. timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout);
  2433. if (timeout <= 0)
  2434. break;
  2435. }
  2436. mutex_unlock(&ctrl->namespaces_mutex);
  2437. }
  2438. EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout);
  2439. void nvme_wait_freeze(struct nvme_ctrl *ctrl)
  2440. {
  2441. struct nvme_ns *ns;
  2442. mutex_lock(&ctrl->namespaces_mutex);
  2443. list_for_each_entry(ns, &ctrl->namespaces, list)
  2444. blk_mq_freeze_queue_wait(ns->queue);
  2445. mutex_unlock(&ctrl->namespaces_mutex);
  2446. }
  2447. EXPORT_SYMBOL_GPL(nvme_wait_freeze);
  2448. void nvme_start_freeze(struct nvme_ctrl *ctrl)
  2449. {
  2450. struct nvme_ns *ns;
  2451. mutex_lock(&ctrl->namespaces_mutex);
  2452. list_for_each_entry(ns, &ctrl->namespaces, list)
  2453. blk_freeze_queue_start(ns->queue);
  2454. mutex_unlock(&ctrl->namespaces_mutex);
  2455. }
  2456. EXPORT_SYMBOL_GPL(nvme_start_freeze);
  2457. void nvme_stop_queues(struct nvme_ctrl *ctrl)
  2458. {
  2459. struct nvme_ns *ns;
  2460. mutex_lock(&ctrl->namespaces_mutex);
  2461. list_for_each_entry(ns, &ctrl->namespaces, list)
  2462. blk_mq_quiesce_queue(ns->queue);
  2463. mutex_unlock(&ctrl->namespaces_mutex);
  2464. }
  2465. EXPORT_SYMBOL_GPL(nvme_stop_queues);
  2466. void nvme_start_queues(struct nvme_ctrl *ctrl)
  2467. {
  2468. struct nvme_ns *ns;
  2469. mutex_lock(&ctrl->namespaces_mutex);
  2470. list_for_each_entry(ns, &ctrl->namespaces, list)
  2471. blk_mq_unquiesce_queue(ns->queue);
  2472. mutex_unlock(&ctrl->namespaces_mutex);
  2473. }
  2474. EXPORT_SYMBOL_GPL(nvme_start_queues);
  2475. int __init nvme_core_init(void)
  2476. {
  2477. int result;
  2478. nvme_wq = alloc_workqueue("nvme-wq",
  2479. WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
  2480. if (!nvme_wq)
  2481. return -ENOMEM;
  2482. result = __register_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme",
  2483. &nvme_dev_fops);
  2484. if (result < 0)
  2485. goto destroy_wq;
  2486. else if (result > 0)
  2487. nvme_char_major = result;
  2488. nvme_class = class_create(THIS_MODULE, "nvme");
  2489. if (IS_ERR(nvme_class)) {
  2490. result = PTR_ERR(nvme_class);
  2491. goto unregister_chrdev;
  2492. }
  2493. return 0;
  2494. unregister_chrdev:
  2495. __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
  2496. destroy_wq:
  2497. destroy_workqueue(nvme_wq);
  2498. return result;
  2499. }
  2500. void nvme_core_exit(void)
  2501. {
  2502. class_destroy(nvme_class);
  2503. __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
  2504. destroy_workqueue(nvme_wq);
  2505. }
  2506. MODULE_LICENSE("GPL");
  2507. MODULE_VERSION("1.0");
  2508. module_init(nvme_core_init);
  2509. module_exit(nvme_core_exit);