pmac32-cpufreq.c 18 KB

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  1. /*
  2. * Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org>
  3. * Copyright (C) 2004 John Steele Scott <toojays@toojays.net>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. * TODO: Need a big cleanup here. Basically, we need to have different
  10. * cpufreq_driver structures for the different type of HW instead of the
  11. * current mess. We also need to better deal with the detection of the
  12. * type of machine.
  13. *
  14. */
  15. #include <linux/module.h>
  16. #include <linux/types.h>
  17. #include <linux/errno.h>
  18. #include <linux/kernel.h>
  19. #include <linux/delay.h>
  20. #include <linux/sched.h>
  21. #include <linux/adb.h>
  22. #include <linux/pmu.h>
  23. #include <linux/cpufreq.h>
  24. #include <linux/init.h>
  25. #include <linux/device.h>
  26. #include <linux/hardirq.h>
  27. #include <linux/of_device.h>
  28. #include <asm/prom.h>
  29. #include <asm/machdep.h>
  30. #include <asm/irq.h>
  31. #include <asm/pmac_feature.h>
  32. #include <asm/mmu_context.h>
  33. #include <asm/sections.h>
  34. #include <asm/cputable.h>
  35. #include <asm/time.h>
  36. #include <asm/mpic.h>
  37. #include <asm/keylargo.h>
  38. #include <asm/switch_to.h>
  39. /* WARNING !!! This will cause calibrate_delay() to be called,
  40. * but this is an __init function ! So you MUST go edit
  41. * init/main.c to make it non-init before enabling DEBUG_FREQ
  42. */
  43. #undef DEBUG_FREQ
  44. extern void low_choose_7447a_dfs(int dfs);
  45. extern void low_choose_750fx_pll(int pll);
  46. extern void low_sleep_handler(void);
  47. /*
  48. * Currently, PowerMac cpufreq supports only high & low frequencies
  49. * that are set by the firmware
  50. */
  51. static unsigned int low_freq;
  52. static unsigned int hi_freq;
  53. static unsigned int cur_freq;
  54. static unsigned int sleep_freq;
  55. static unsigned long transition_latency;
  56. /*
  57. * Different models uses different mechanisms to switch the frequency
  58. */
  59. static int (*set_speed_proc)(int low_speed);
  60. static unsigned int (*get_speed_proc)(void);
  61. /*
  62. * Some definitions used by the various speedprocs
  63. */
  64. static u32 voltage_gpio;
  65. static u32 frequency_gpio;
  66. static u32 slew_done_gpio;
  67. static int no_schedule;
  68. static int has_cpu_l2lve;
  69. static int is_pmu_based;
  70. /* There are only two frequency states for each processor. Values
  71. * are in kHz for the time being.
  72. */
  73. #define CPUFREQ_HIGH 0
  74. #define CPUFREQ_LOW 1
  75. static struct cpufreq_frequency_table pmac_cpu_freqs[] = {
  76. {CPUFREQ_HIGH, 0},
  77. {CPUFREQ_LOW, 0},
  78. {0, CPUFREQ_TABLE_END},
  79. };
  80. static struct freq_attr* pmac_cpu_freqs_attr[] = {
  81. &cpufreq_freq_attr_scaling_available_freqs,
  82. NULL,
  83. };
  84. static inline void local_delay(unsigned long ms)
  85. {
  86. if (no_schedule)
  87. mdelay(ms);
  88. else
  89. msleep(ms);
  90. }
  91. #ifdef DEBUG_FREQ
  92. static inline void debug_calc_bogomips(void)
  93. {
  94. /* This will cause a recalc of bogomips and display the
  95. * result. We backup/restore the value to avoid affecting the
  96. * core cpufreq framework's own calculation.
  97. */
  98. unsigned long save_lpj = loops_per_jiffy;
  99. calibrate_delay();
  100. loops_per_jiffy = save_lpj;
  101. }
  102. #endif /* DEBUG_FREQ */
  103. /* Switch CPU speed under 750FX CPU control
  104. */
  105. static int cpu_750fx_cpu_speed(int low_speed)
  106. {
  107. u32 hid2;
  108. if (low_speed == 0) {
  109. /* ramping up, set voltage first */
  110. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
  111. /* Make sure we sleep for at least 1ms */
  112. local_delay(10);
  113. /* tweak L2 for high voltage */
  114. if (has_cpu_l2lve) {
  115. hid2 = mfspr(SPRN_HID2);
  116. hid2 &= ~0x2000;
  117. mtspr(SPRN_HID2, hid2);
  118. }
  119. }
  120. #ifdef CONFIG_6xx
  121. low_choose_750fx_pll(low_speed);
  122. #endif
  123. if (low_speed == 1) {
  124. /* tweak L2 for low voltage */
  125. if (has_cpu_l2lve) {
  126. hid2 = mfspr(SPRN_HID2);
  127. hid2 |= 0x2000;
  128. mtspr(SPRN_HID2, hid2);
  129. }
  130. /* ramping down, set voltage last */
  131. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
  132. local_delay(10);
  133. }
  134. return 0;
  135. }
  136. static unsigned int cpu_750fx_get_cpu_speed(void)
  137. {
  138. if (mfspr(SPRN_HID1) & HID1_PS)
  139. return low_freq;
  140. else
  141. return hi_freq;
  142. }
  143. /* Switch CPU speed using DFS */
  144. static int dfs_set_cpu_speed(int low_speed)
  145. {
  146. if (low_speed == 0) {
  147. /* ramping up, set voltage first */
  148. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
  149. /* Make sure we sleep for at least 1ms */
  150. local_delay(1);
  151. }
  152. /* set frequency */
  153. #ifdef CONFIG_6xx
  154. low_choose_7447a_dfs(low_speed);
  155. #endif
  156. udelay(100);
  157. if (low_speed == 1) {
  158. /* ramping down, set voltage last */
  159. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
  160. local_delay(1);
  161. }
  162. return 0;
  163. }
  164. static unsigned int dfs_get_cpu_speed(void)
  165. {
  166. if (mfspr(SPRN_HID1) & HID1_DFS)
  167. return low_freq;
  168. else
  169. return hi_freq;
  170. }
  171. /* Switch CPU speed using slewing GPIOs
  172. */
  173. static int gpios_set_cpu_speed(int low_speed)
  174. {
  175. int gpio, timeout = 0;
  176. /* If ramping up, set voltage first */
  177. if (low_speed == 0) {
  178. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
  179. /* Delay is way too big but it's ok, we schedule */
  180. local_delay(10);
  181. }
  182. /* Set frequency */
  183. gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
  184. if (low_speed == ((gpio & 0x01) == 0))
  185. goto skip;
  186. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, frequency_gpio,
  187. low_speed ? 0x04 : 0x05);
  188. udelay(200);
  189. do {
  190. if (++timeout > 100)
  191. break;
  192. local_delay(1);
  193. gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, slew_done_gpio, 0);
  194. } while((gpio & 0x02) == 0);
  195. skip:
  196. /* If ramping down, set voltage last */
  197. if (low_speed == 1) {
  198. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
  199. /* Delay is way too big but it's ok, we schedule */
  200. local_delay(10);
  201. }
  202. #ifdef DEBUG_FREQ
  203. debug_calc_bogomips();
  204. #endif
  205. return 0;
  206. }
  207. /* Switch CPU speed under PMU control
  208. */
  209. static int pmu_set_cpu_speed(int low_speed)
  210. {
  211. struct adb_request req;
  212. unsigned long save_l2cr;
  213. unsigned long save_l3cr;
  214. unsigned int pic_prio;
  215. unsigned long flags;
  216. preempt_disable();
  217. #ifdef DEBUG_FREQ
  218. printk(KERN_DEBUG "HID1, before: %x\n", mfspr(SPRN_HID1));
  219. #endif
  220. pmu_suspend();
  221. /* Disable all interrupt sources on openpic */
  222. pic_prio = mpic_cpu_get_priority();
  223. mpic_cpu_set_priority(0xf);
  224. /* Make sure the decrementer won't interrupt us */
  225. asm volatile("mtdec %0" : : "r" (0x7fffffff));
  226. /* Make sure any pending DEC interrupt occurring while we did
  227. * the above didn't re-enable the DEC */
  228. mb();
  229. asm volatile("mtdec %0" : : "r" (0x7fffffff));
  230. /* We can now disable MSR_EE */
  231. local_irq_save(flags);
  232. /* Giveup the FPU & vec */
  233. enable_kernel_fp();
  234. #ifdef CONFIG_ALTIVEC
  235. if (cpu_has_feature(CPU_FTR_ALTIVEC))
  236. enable_kernel_altivec();
  237. #endif /* CONFIG_ALTIVEC */
  238. /* Save & disable L2 and L3 caches */
  239. save_l3cr = _get_L3CR(); /* (returns -1 if not available) */
  240. save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
  241. /* Send the new speed command. My assumption is that this command
  242. * will cause PLL_CFG[0..3] to be changed next time CPU goes to sleep
  243. */
  244. pmu_request(&req, NULL, 6, PMU_CPU_SPEED, 'W', 'O', 'O', 'F', low_speed);
  245. while (!req.complete)
  246. pmu_poll();
  247. /* Prepare the northbridge for the speed transition */
  248. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,1);
  249. /* Call low level code to backup CPU state and recover from
  250. * hardware reset
  251. */
  252. low_sleep_handler();
  253. /* Restore the northbridge */
  254. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,0);
  255. /* Restore L2 cache */
  256. if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
  257. _set_L2CR(save_l2cr);
  258. /* Restore L3 cache */
  259. if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
  260. _set_L3CR(save_l3cr);
  261. /* Restore userland MMU context */
  262. switch_mmu_context(NULL, current->active_mm);
  263. #ifdef DEBUG_FREQ
  264. printk(KERN_DEBUG "HID1, after: %x\n", mfspr(SPRN_HID1));
  265. #endif
  266. /* Restore low level PMU operations */
  267. pmu_unlock();
  268. /*
  269. * Restore decrementer; we'll take a decrementer interrupt
  270. * as soon as interrupts are re-enabled and the generic
  271. * clockevents code will reprogram it with the right value.
  272. */
  273. set_dec(1);
  274. /* Restore interrupts */
  275. mpic_cpu_set_priority(pic_prio);
  276. /* Let interrupts flow again ... */
  277. local_irq_restore(flags);
  278. #ifdef DEBUG_FREQ
  279. debug_calc_bogomips();
  280. #endif
  281. pmu_resume();
  282. preempt_enable();
  283. return 0;
  284. }
  285. static int do_set_cpu_speed(struct cpufreq_policy *policy, int speed_mode,
  286. int notify)
  287. {
  288. struct cpufreq_freqs freqs;
  289. unsigned long l3cr;
  290. static unsigned long prev_l3cr;
  291. freqs.old = cur_freq;
  292. freqs.new = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
  293. if (freqs.old == freqs.new)
  294. return 0;
  295. if (notify)
  296. cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE);
  297. if (speed_mode == CPUFREQ_LOW &&
  298. cpu_has_feature(CPU_FTR_L3CR)) {
  299. l3cr = _get_L3CR();
  300. if (l3cr & L3CR_L3E) {
  301. prev_l3cr = l3cr;
  302. _set_L3CR(0);
  303. }
  304. }
  305. set_speed_proc(speed_mode == CPUFREQ_LOW);
  306. if (speed_mode == CPUFREQ_HIGH &&
  307. cpu_has_feature(CPU_FTR_L3CR)) {
  308. l3cr = _get_L3CR();
  309. if ((prev_l3cr & L3CR_L3E) && l3cr != prev_l3cr)
  310. _set_L3CR(prev_l3cr);
  311. }
  312. if (notify)
  313. cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);
  314. cur_freq = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
  315. return 0;
  316. }
  317. static unsigned int pmac_cpufreq_get_speed(unsigned int cpu)
  318. {
  319. return cur_freq;
  320. }
  321. static int pmac_cpufreq_verify(struct cpufreq_policy *policy)
  322. {
  323. return cpufreq_frequency_table_verify(policy, pmac_cpu_freqs);
  324. }
  325. static int pmac_cpufreq_target( struct cpufreq_policy *policy,
  326. unsigned int target_freq,
  327. unsigned int relation)
  328. {
  329. unsigned int newstate = 0;
  330. int rc;
  331. if (cpufreq_frequency_table_target(policy, pmac_cpu_freqs,
  332. target_freq, relation, &newstate))
  333. return -EINVAL;
  334. rc = do_set_cpu_speed(policy, newstate, 1);
  335. ppc_proc_freq = cur_freq * 1000ul;
  336. return rc;
  337. }
  338. static int pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)
  339. {
  340. if (policy->cpu != 0)
  341. return -ENODEV;
  342. policy->cpuinfo.transition_latency = transition_latency;
  343. policy->cur = cur_freq;
  344. return cpufreq_table_validate_and_show(policy, pmac_cpu_freqs);
  345. }
  346. static u32 read_gpio(struct device_node *np)
  347. {
  348. const u32 *reg = of_get_property(np, "reg", NULL);
  349. u32 offset;
  350. if (reg == NULL)
  351. return 0;
  352. /* That works for all keylargos but shall be fixed properly
  353. * some day... The problem is that it seems we can't rely
  354. * on the "reg" property of the GPIO nodes, they are either
  355. * relative to the base of KeyLargo or to the base of the
  356. * GPIO space, and the device-tree doesn't help.
  357. */
  358. offset = *reg;
  359. if (offset < KEYLARGO_GPIO_LEVELS0)
  360. offset += KEYLARGO_GPIO_LEVELS0;
  361. return offset;
  362. }
  363. static int pmac_cpufreq_suspend(struct cpufreq_policy *policy)
  364. {
  365. /* Ok, this could be made a bit smarter, but let's be robust for now. We
  366. * always force a speed change to high speed before sleep, to make sure
  367. * we have appropriate voltage and/or bus speed for the wakeup process,
  368. * and to make sure our loops_per_jiffies are "good enough", that is will
  369. * not cause too short delays if we sleep in low speed and wake in high
  370. * speed..
  371. */
  372. no_schedule = 1;
  373. sleep_freq = cur_freq;
  374. if (cur_freq == low_freq && !is_pmu_based)
  375. do_set_cpu_speed(policy, CPUFREQ_HIGH, 0);
  376. return 0;
  377. }
  378. static int pmac_cpufreq_resume(struct cpufreq_policy *policy)
  379. {
  380. /* If we resume, first check if we have a get() function */
  381. if (get_speed_proc)
  382. cur_freq = get_speed_proc();
  383. else
  384. cur_freq = 0;
  385. /* We don't, hrm... we don't really know our speed here, best
  386. * is that we force a switch to whatever it was, which is
  387. * probably high speed due to our suspend() routine
  388. */
  389. do_set_cpu_speed(policy, sleep_freq == low_freq ?
  390. CPUFREQ_LOW : CPUFREQ_HIGH, 0);
  391. ppc_proc_freq = cur_freq * 1000ul;
  392. no_schedule = 0;
  393. return 0;
  394. }
  395. static struct cpufreq_driver pmac_cpufreq_driver = {
  396. .verify = pmac_cpufreq_verify,
  397. .target = pmac_cpufreq_target,
  398. .get = pmac_cpufreq_get_speed,
  399. .init = pmac_cpufreq_cpu_init,
  400. .suspend = pmac_cpufreq_suspend,
  401. .resume = pmac_cpufreq_resume,
  402. .flags = CPUFREQ_PM_NO_WARN,
  403. .attr = pmac_cpu_freqs_attr,
  404. .name = "powermac",
  405. };
  406. static int pmac_cpufreq_init_MacRISC3(struct device_node *cpunode)
  407. {
  408. struct device_node *volt_gpio_np = of_find_node_by_name(NULL,
  409. "voltage-gpio");
  410. struct device_node *freq_gpio_np = of_find_node_by_name(NULL,
  411. "frequency-gpio");
  412. struct device_node *slew_done_gpio_np = of_find_node_by_name(NULL,
  413. "slewing-done");
  414. const u32 *value;
  415. /*
  416. * Check to see if it's GPIO driven or PMU only
  417. *
  418. * The way we extract the GPIO address is slightly hackish, but it
  419. * works well enough for now. We need to abstract the whole GPIO
  420. * stuff sooner or later anyway
  421. */
  422. if (volt_gpio_np)
  423. voltage_gpio = read_gpio(volt_gpio_np);
  424. if (freq_gpio_np)
  425. frequency_gpio = read_gpio(freq_gpio_np);
  426. if (slew_done_gpio_np)
  427. slew_done_gpio = read_gpio(slew_done_gpio_np);
  428. /* If we use the frequency GPIOs, calculate the min/max speeds based
  429. * on the bus frequencies
  430. */
  431. if (frequency_gpio && slew_done_gpio) {
  432. int lenp, rc;
  433. const u32 *freqs, *ratio;
  434. freqs = of_get_property(cpunode, "bus-frequencies", &lenp);
  435. lenp /= sizeof(u32);
  436. if (freqs == NULL || lenp != 2) {
  437. printk(KERN_ERR "cpufreq: bus-frequencies incorrect or missing\n");
  438. return 1;
  439. }
  440. ratio = of_get_property(cpunode, "processor-to-bus-ratio*2",
  441. NULL);
  442. if (ratio == NULL) {
  443. printk(KERN_ERR "cpufreq: processor-to-bus-ratio*2 missing\n");
  444. return 1;
  445. }
  446. /* Get the min/max bus frequencies */
  447. low_freq = min(freqs[0], freqs[1]);
  448. hi_freq = max(freqs[0], freqs[1]);
  449. /* Grrrr.. It _seems_ that the device-tree is lying on the low bus
  450. * frequency, it claims it to be around 84Mhz on some models while
  451. * it appears to be approx. 101Mhz on all. Let's hack around here...
  452. * fortunately, we don't need to be too precise
  453. */
  454. if (low_freq < 98000000)
  455. low_freq = 101000000;
  456. /* Convert those to CPU core clocks */
  457. low_freq = (low_freq * (*ratio)) / 2000;
  458. hi_freq = (hi_freq * (*ratio)) / 2000;
  459. /* Now we get the frequencies, we read the GPIO to see what is out current
  460. * speed
  461. */
  462. rc = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
  463. cur_freq = (rc & 0x01) ? hi_freq : low_freq;
  464. set_speed_proc = gpios_set_cpu_speed;
  465. return 1;
  466. }
  467. /* If we use the PMU, look for the min & max frequencies in the
  468. * device-tree
  469. */
  470. value = of_get_property(cpunode, "min-clock-frequency", NULL);
  471. if (!value)
  472. return 1;
  473. low_freq = (*value) / 1000;
  474. /* The PowerBook G4 12" (PowerBook6,1) has an error in the device-tree
  475. * here */
  476. if (low_freq < 100000)
  477. low_freq *= 10;
  478. value = of_get_property(cpunode, "max-clock-frequency", NULL);
  479. if (!value)
  480. return 1;
  481. hi_freq = (*value) / 1000;
  482. set_speed_proc = pmu_set_cpu_speed;
  483. is_pmu_based = 1;
  484. return 0;
  485. }
  486. static int pmac_cpufreq_init_7447A(struct device_node *cpunode)
  487. {
  488. struct device_node *volt_gpio_np;
  489. if (of_get_property(cpunode, "dynamic-power-step", NULL) == NULL)
  490. return 1;
  491. volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
  492. if (volt_gpio_np)
  493. voltage_gpio = read_gpio(volt_gpio_np);
  494. if (!voltage_gpio){
  495. printk(KERN_ERR "cpufreq: missing cpu-vcore-select gpio\n");
  496. return 1;
  497. }
  498. /* OF only reports the high frequency */
  499. hi_freq = cur_freq;
  500. low_freq = cur_freq/2;
  501. /* Read actual frequency from CPU */
  502. cur_freq = dfs_get_cpu_speed();
  503. set_speed_proc = dfs_set_cpu_speed;
  504. get_speed_proc = dfs_get_cpu_speed;
  505. return 0;
  506. }
  507. static int pmac_cpufreq_init_750FX(struct device_node *cpunode)
  508. {
  509. struct device_node *volt_gpio_np;
  510. u32 pvr;
  511. const u32 *value;
  512. if (of_get_property(cpunode, "dynamic-power-step", NULL) == NULL)
  513. return 1;
  514. hi_freq = cur_freq;
  515. value = of_get_property(cpunode, "reduced-clock-frequency", NULL);
  516. if (!value)
  517. return 1;
  518. low_freq = (*value) / 1000;
  519. volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
  520. if (volt_gpio_np)
  521. voltage_gpio = read_gpio(volt_gpio_np);
  522. pvr = mfspr(SPRN_PVR);
  523. has_cpu_l2lve = !((pvr & 0xf00) == 0x100);
  524. set_speed_proc = cpu_750fx_cpu_speed;
  525. get_speed_proc = cpu_750fx_get_cpu_speed;
  526. cur_freq = cpu_750fx_get_cpu_speed();
  527. return 0;
  528. }
  529. /* Currently, we support the following machines:
  530. *
  531. * - Titanium PowerBook 1Ghz (PMU based, 667Mhz & 1Ghz)
  532. * - Titanium PowerBook 800 (PMU based, 667Mhz & 800Mhz)
  533. * - Titanium PowerBook 400 (PMU based, 300Mhz & 400Mhz)
  534. * - Titanium PowerBook 500 (PMU based, 300Mhz & 500Mhz)
  535. * - iBook2 500/600 (PMU based, 400Mhz & 500/600Mhz)
  536. * - iBook2 700 (CPU based, 400Mhz & 700Mhz, support low voltage)
  537. * - Recent MacRISC3 laptops
  538. * - All new machines with 7447A CPUs
  539. */
  540. static int __init pmac_cpufreq_setup(void)
  541. {
  542. struct device_node *cpunode;
  543. const u32 *value;
  544. if (strstr(cmd_line, "nocpufreq"))
  545. return 0;
  546. /* Get first CPU node */
  547. cpunode = of_cpu_device_node_get(0);
  548. if (!cpunode)
  549. goto out;
  550. /* Get current cpu clock freq */
  551. value = of_get_property(cpunode, "clock-frequency", NULL);
  552. if (!value)
  553. goto out;
  554. cur_freq = (*value) / 1000;
  555. transition_latency = CPUFREQ_ETERNAL;
  556. /* Check for 7447A based MacRISC3 */
  557. if (of_machine_is_compatible("MacRISC3") &&
  558. of_get_property(cpunode, "dynamic-power-step", NULL) &&
  559. PVR_VER(mfspr(SPRN_PVR)) == 0x8003) {
  560. pmac_cpufreq_init_7447A(cpunode);
  561. transition_latency = 8000000;
  562. /* Check for other MacRISC3 machines */
  563. } else if (of_machine_is_compatible("PowerBook3,4") ||
  564. of_machine_is_compatible("PowerBook3,5") ||
  565. of_machine_is_compatible("MacRISC3")) {
  566. pmac_cpufreq_init_MacRISC3(cpunode);
  567. /* Else check for iBook2 500/600 */
  568. } else if (of_machine_is_compatible("PowerBook4,1")) {
  569. hi_freq = cur_freq;
  570. low_freq = 400000;
  571. set_speed_proc = pmu_set_cpu_speed;
  572. is_pmu_based = 1;
  573. }
  574. /* Else check for TiPb 550 */
  575. else if (of_machine_is_compatible("PowerBook3,3") && cur_freq == 550000) {
  576. hi_freq = cur_freq;
  577. low_freq = 500000;
  578. set_speed_proc = pmu_set_cpu_speed;
  579. is_pmu_based = 1;
  580. }
  581. /* Else check for TiPb 400 & 500 */
  582. else if (of_machine_is_compatible("PowerBook3,2")) {
  583. /* We only know about the 400 MHz and the 500Mhz model
  584. * they both have 300 MHz as low frequency
  585. */
  586. if (cur_freq < 350000 || cur_freq > 550000)
  587. goto out;
  588. hi_freq = cur_freq;
  589. low_freq = 300000;
  590. set_speed_proc = pmu_set_cpu_speed;
  591. is_pmu_based = 1;
  592. }
  593. /* Else check for 750FX */
  594. else if (PVR_VER(mfspr(SPRN_PVR)) == 0x7000)
  595. pmac_cpufreq_init_750FX(cpunode);
  596. out:
  597. of_node_put(cpunode);
  598. if (set_speed_proc == NULL)
  599. return -ENODEV;
  600. pmac_cpu_freqs[CPUFREQ_LOW].frequency = low_freq;
  601. pmac_cpu_freqs[CPUFREQ_HIGH].frequency = hi_freq;
  602. ppc_proc_freq = cur_freq * 1000ul;
  603. printk(KERN_INFO "Registering PowerMac CPU frequency driver\n");
  604. printk(KERN_INFO "Low: %d Mhz, High: %d Mhz, Boot: %d Mhz\n",
  605. low_freq/1000, hi_freq/1000, cur_freq/1000);
  606. return cpufreq_register_driver(&pmac_cpufreq_driver);
  607. }
  608. module_init(pmac_cpufreq_setup);