cros_ec_spi.c 10 KB

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  1. /*
  2. * ChromeOS EC multi-function device (SPI)
  3. *
  4. * Copyright (C) 2012 Google, Inc
  5. *
  6. * This software is licensed under the terms of the GNU General Public
  7. * License version 2, as published by the Free Software Foundation, and
  8. * may be copied, distributed, and modified under those terms.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. */
  15. #include <linux/delay.h>
  16. #include <linux/kernel.h>
  17. #include <linux/module.h>
  18. #include <linux/mfd/cros_ec.h>
  19. #include <linux/mfd/cros_ec_commands.h>
  20. #include <linux/of.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/slab.h>
  23. #include <linux/spi/spi.h>
  24. /* The header byte, which follows the preamble */
  25. #define EC_MSG_HEADER 0xec
  26. /*
  27. * Number of EC preamble bytes we read at a time. Since it takes
  28. * about 400-500us for the EC to respond there is not a lot of
  29. * point in tuning this. If the EC could respond faster then
  30. * we could increase this so that might expect the preamble and
  31. * message to occur in a single transaction. However, the maximum
  32. * SPI transfer size is 256 bytes, so at 5MHz we need a response
  33. * time of perhaps <320us (200 bytes / 1600 bits).
  34. */
  35. #define EC_MSG_PREAMBLE_COUNT 32
  36. /*
  37. * We must get a response from the EC in 5ms. This is a very long
  38. * time, but the flash write command can take 2-3ms. The EC command
  39. * processing is currently not very fast (about 500us). We could
  40. * look at speeding this up and making the flash write command a
  41. * 'slow' command, requiring a GET_STATUS wait loop, like flash
  42. * erase.
  43. */
  44. #define EC_MSG_DEADLINE_MS 5
  45. /*
  46. * Time between raising the SPI chip select (for the end of a
  47. * transaction) and dropping it again (for the next transaction).
  48. * If we go too fast, the EC will miss the transaction. We know that we
  49. * need at least 70 us with the 16 MHz STM32 EC, so go with 200 us to be
  50. * safe.
  51. */
  52. #define EC_SPI_RECOVERY_TIME_NS (200 * 1000)
  53. /**
  54. * struct cros_ec_spi - information about a SPI-connected EC
  55. *
  56. * @spi: SPI device we are connected to
  57. * @last_transfer_ns: time that we last finished a transfer, or 0 if there
  58. * if no record
  59. * @end_of_msg_delay: used to set the delay_usecs on the spi_transfer that
  60. * is sent when we want to turn off CS at the end of a transaction.
  61. */
  62. struct cros_ec_spi {
  63. struct spi_device *spi;
  64. s64 last_transfer_ns;
  65. unsigned int end_of_msg_delay;
  66. };
  67. static void debug_packet(struct device *dev, const char *name, u8 *ptr,
  68. int len)
  69. {
  70. #ifdef DEBUG
  71. int i;
  72. dev_dbg(dev, "%s: ", name);
  73. for (i = 0; i < len; i++)
  74. pr_cont(" %02x", ptr[i]);
  75. pr_cont("\n");
  76. #endif
  77. }
  78. /**
  79. * cros_ec_spi_receive_response - Receive a response from the EC.
  80. *
  81. * This function has two phases: reading the preamble bytes (since if we read
  82. * data from the EC before it is ready to send, we just get preamble) and
  83. * reading the actual message.
  84. *
  85. * The received data is placed into ec_dev->din.
  86. *
  87. * @ec_dev: ChromeOS EC device
  88. * @need_len: Number of message bytes we need to read
  89. */
  90. static int cros_ec_spi_receive_response(struct cros_ec_device *ec_dev,
  91. int need_len)
  92. {
  93. struct cros_ec_spi *ec_spi = ec_dev->priv;
  94. struct spi_transfer trans;
  95. struct spi_message msg;
  96. u8 *ptr, *end;
  97. int ret;
  98. unsigned long deadline;
  99. int todo;
  100. /* Receive data until we see the header byte */
  101. deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS);
  102. do {
  103. memset(&trans, 0, sizeof(trans));
  104. trans.cs_change = 1;
  105. trans.rx_buf = ptr = ec_dev->din;
  106. trans.len = EC_MSG_PREAMBLE_COUNT;
  107. spi_message_init(&msg);
  108. spi_message_add_tail(&trans, &msg);
  109. ret = spi_sync(ec_spi->spi, &msg);
  110. if (ret < 0) {
  111. dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
  112. return ret;
  113. }
  114. for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) {
  115. if (*ptr == EC_MSG_HEADER) {
  116. dev_dbg(ec_dev->dev, "msg found at %zd\n",
  117. ptr - ec_dev->din);
  118. break;
  119. }
  120. }
  121. if (time_after(jiffies, deadline)) {
  122. dev_warn(ec_dev->dev, "EC failed to respond in time\n");
  123. return -ETIMEDOUT;
  124. }
  125. } while (ptr == end);
  126. /*
  127. * ptr now points to the header byte. Copy any valid data to the
  128. * start of our buffer
  129. */
  130. todo = end - ++ptr;
  131. BUG_ON(todo < 0 || todo > ec_dev->din_size);
  132. todo = min(todo, need_len);
  133. memmove(ec_dev->din, ptr, todo);
  134. ptr = ec_dev->din + todo;
  135. dev_dbg(ec_dev->dev, "need %d, got %d bytes from preamble\n",
  136. need_len, todo);
  137. need_len -= todo;
  138. /* Receive data until we have it all */
  139. while (need_len > 0) {
  140. /*
  141. * We can't support transfers larger than the SPI FIFO size
  142. * unless we have DMA. We don't have DMA on the ISP SPI ports
  143. * for Exynos. We need a way of asking SPI driver for
  144. * maximum-supported transfer size.
  145. */
  146. todo = min(need_len, 256);
  147. dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%zd\n",
  148. todo, need_len, ptr - ec_dev->din);
  149. memset(&trans, 0, sizeof(trans));
  150. trans.cs_change = 1;
  151. trans.rx_buf = ptr;
  152. trans.len = todo;
  153. spi_message_init(&msg);
  154. spi_message_add_tail(&trans, &msg);
  155. /* send command to EC and read answer */
  156. BUG_ON((u8 *)trans.rx_buf - ec_dev->din + todo >
  157. ec_dev->din_size);
  158. ret = spi_sync(ec_spi->spi, &msg);
  159. if (ret < 0) {
  160. dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
  161. return ret;
  162. }
  163. debug_packet(ec_dev->dev, "interim", ptr, todo);
  164. ptr += todo;
  165. need_len -= todo;
  166. }
  167. dev_dbg(ec_dev->dev, "loop done, ptr=%zd\n", ptr - ec_dev->din);
  168. return 0;
  169. }
  170. /**
  171. * cros_ec_command_spi_xfer - Transfer a message over SPI and receive the reply
  172. *
  173. * @ec_dev: ChromeOS EC device
  174. * @ec_msg: Message to transfer
  175. */
  176. static int cros_ec_command_spi_xfer(struct cros_ec_device *ec_dev,
  177. struct cros_ec_msg *ec_msg)
  178. {
  179. struct cros_ec_spi *ec_spi = ec_dev->priv;
  180. struct spi_transfer trans;
  181. struct spi_message msg;
  182. int i, len;
  183. u8 *ptr;
  184. int sum;
  185. int ret = 0, final_ret;
  186. struct timespec ts;
  187. len = cros_ec_prepare_tx(ec_dev, ec_msg);
  188. dev_dbg(ec_dev->dev, "prepared, len=%d\n", len);
  189. /* If it's too soon to do another transaction, wait */
  190. if (ec_spi->last_transfer_ns) {
  191. struct timespec ts;
  192. unsigned long delay; /* The delay completed so far */
  193. ktime_get_ts(&ts);
  194. delay = timespec_to_ns(&ts) - ec_spi->last_transfer_ns;
  195. if (delay < EC_SPI_RECOVERY_TIME_NS)
  196. ndelay(delay);
  197. }
  198. /* Transmit phase - send our message */
  199. debug_packet(ec_dev->dev, "out", ec_dev->dout, len);
  200. memset(&trans, 0, sizeof(trans));
  201. trans.tx_buf = ec_dev->dout;
  202. trans.len = len;
  203. trans.cs_change = 1;
  204. spi_message_init(&msg);
  205. spi_message_add_tail(&trans, &msg);
  206. ret = spi_sync(ec_spi->spi, &msg);
  207. /* Get the response */
  208. if (!ret) {
  209. ret = cros_ec_spi_receive_response(ec_dev,
  210. ec_msg->in_len + EC_MSG_TX_PROTO_BYTES);
  211. } else {
  212. dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
  213. }
  214. /* turn off CS */
  215. spi_message_init(&msg);
  216. if (ec_spi->end_of_msg_delay) {
  217. /*
  218. * Add delay for last transaction, to ensure the rising edge
  219. * doesn't come too soon after the end of the data.
  220. */
  221. memset(&trans, 0, sizeof(trans));
  222. trans.delay_usecs = ec_spi->end_of_msg_delay;
  223. spi_message_add_tail(&trans, &msg);
  224. }
  225. final_ret = spi_sync(ec_spi->spi, &msg);
  226. ktime_get_ts(&ts);
  227. ec_spi->last_transfer_ns = timespec_to_ns(&ts);
  228. if (!ret)
  229. ret = final_ret;
  230. if (ret < 0) {
  231. dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
  232. return ret;
  233. }
  234. /* check response error code */
  235. ptr = ec_dev->din;
  236. if (ptr[0]) {
  237. dev_warn(ec_dev->dev, "command 0x%02x returned an error %d\n",
  238. ec_msg->cmd, ptr[0]);
  239. debug_packet(ec_dev->dev, "in_err", ptr, len);
  240. return -EINVAL;
  241. }
  242. len = ptr[1];
  243. sum = ptr[0] + ptr[1];
  244. if (len > ec_msg->in_len) {
  245. dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)",
  246. len, ec_msg->in_len);
  247. return -ENOSPC;
  248. }
  249. /* copy response packet payload and compute checksum */
  250. for (i = 0; i < len; i++) {
  251. sum += ptr[i + 2];
  252. if (ec_msg->in_len)
  253. ec_msg->in_buf[i] = ptr[i + 2];
  254. }
  255. sum &= 0xff;
  256. debug_packet(ec_dev->dev, "in", ptr, len + 3);
  257. if (sum != ptr[len + 2]) {
  258. dev_err(ec_dev->dev,
  259. "bad packet checksum, expected %02x, got %02x\n",
  260. sum, ptr[len + 2]);
  261. return -EBADMSG;
  262. }
  263. return 0;
  264. }
  265. static void cros_ec_spi_dt_probe(struct cros_ec_spi *ec_spi, struct device *dev)
  266. {
  267. struct device_node *np = dev->of_node;
  268. u32 val;
  269. int ret;
  270. ret = of_property_read_u32(np, "google,cros-ec-spi-msg-delay", &val);
  271. if (!ret)
  272. ec_spi->end_of_msg_delay = val;
  273. }
  274. static int cros_ec_spi_probe(struct spi_device *spi)
  275. {
  276. struct device *dev = &spi->dev;
  277. struct cros_ec_device *ec_dev;
  278. struct cros_ec_spi *ec_spi;
  279. int err;
  280. spi->bits_per_word = 8;
  281. spi->mode = SPI_MODE_0;
  282. err = spi_setup(spi);
  283. if (err < 0)
  284. return err;
  285. ec_spi = devm_kzalloc(dev, sizeof(*ec_spi), GFP_KERNEL);
  286. if (ec_spi == NULL)
  287. return -ENOMEM;
  288. ec_spi->spi = spi;
  289. ec_dev = devm_kzalloc(dev, sizeof(*ec_dev), GFP_KERNEL);
  290. if (!ec_dev)
  291. return -ENOMEM;
  292. /* Check for any DT properties */
  293. cros_ec_spi_dt_probe(ec_spi, dev);
  294. spi_set_drvdata(spi, ec_dev);
  295. ec_dev->name = "SPI";
  296. ec_dev->dev = dev;
  297. ec_dev->priv = ec_spi;
  298. ec_dev->irq = spi->irq;
  299. ec_dev->command_xfer = cros_ec_command_spi_xfer;
  300. ec_dev->ec_name = ec_spi->spi->modalias;
  301. ec_dev->phys_name = dev_name(&ec_spi->spi->dev);
  302. ec_dev->parent = &ec_spi->spi->dev;
  303. ec_dev->din_size = EC_MSG_BYTES + EC_MSG_PREAMBLE_COUNT;
  304. ec_dev->dout_size = EC_MSG_BYTES;
  305. err = cros_ec_register(ec_dev);
  306. if (err) {
  307. dev_err(dev, "cannot register EC\n");
  308. return err;
  309. }
  310. return 0;
  311. }
  312. static int cros_ec_spi_remove(struct spi_device *spi)
  313. {
  314. struct cros_ec_device *ec_dev;
  315. ec_dev = spi_get_drvdata(spi);
  316. cros_ec_remove(ec_dev);
  317. return 0;
  318. }
  319. #ifdef CONFIG_PM_SLEEP
  320. static int cros_ec_spi_suspend(struct device *dev)
  321. {
  322. struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
  323. return cros_ec_suspend(ec_dev);
  324. }
  325. static int cros_ec_spi_resume(struct device *dev)
  326. {
  327. struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
  328. return cros_ec_resume(ec_dev);
  329. }
  330. #endif
  331. static SIMPLE_DEV_PM_OPS(cros_ec_spi_pm_ops, cros_ec_spi_suspend,
  332. cros_ec_spi_resume);
  333. static const struct spi_device_id cros_ec_spi_id[] = {
  334. { "cros-ec-spi", 0 },
  335. { }
  336. };
  337. MODULE_DEVICE_TABLE(spi, cros_ec_spi_id);
  338. static struct spi_driver cros_ec_driver_spi = {
  339. .driver = {
  340. .name = "cros-ec-spi",
  341. .owner = THIS_MODULE,
  342. .pm = &cros_ec_spi_pm_ops,
  343. },
  344. .probe = cros_ec_spi_probe,
  345. .remove = cros_ec_spi_remove,
  346. .id_table = cros_ec_spi_id,
  347. };
  348. module_spi_driver(cros_ec_driver_spi);
  349. MODULE_LICENSE("GPL v2");
  350. MODULE_DESCRIPTION("ChromeOS EC multi function device (SPI)");