fpga-region.c 16 KB

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  1. /*
  2. * FPGA Region - Device Tree support for FPGA programming under Linux
  3. *
  4. * Copyright (C) 2013-2016 Altera Corporation
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms and conditions of the GNU General Public License,
  8. * version 2, as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope it will be useful, but WITHOUT
  11. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  13. * more details.
  14. *
  15. * You should have received a copy of the GNU General Public License along with
  16. * this program. If not, see <http://www.gnu.org/licenses/>.
  17. */
  18. #include <linux/fpga/fpga-bridge.h>
  19. #include <linux/fpga/fpga-mgr.h>
  20. #include <linux/idr.h>
  21. #include <linux/kernel.h>
  22. #include <linux/list.h>
  23. #include <linux/module.h>
  24. #include <linux/of_platform.h>
  25. #include <linux/slab.h>
  26. #include <linux/spinlock.h>
  27. /**
  28. * struct fpga_region - FPGA Region structure
  29. * @dev: FPGA Region device
  30. * @mutex: enforces exclusive reference to region
  31. * @bridge_list: list of FPGA bridges specified in region
  32. * @info: fpga image specific information
  33. */
  34. struct fpga_region {
  35. struct device dev;
  36. struct mutex mutex; /* for exclusive reference to region */
  37. struct list_head bridge_list;
  38. struct fpga_image_info *info;
  39. };
  40. #define to_fpga_region(d) container_of(d, struct fpga_region, dev)
  41. static DEFINE_IDA(fpga_region_ida);
  42. static struct class *fpga_region_class;
  43. static const struct of_device_id fpga_region_of_match[] = {
  44. { .compatible = "fpga-region", },
  45. {},
  46. };
  47. MODULE_DEVICE_TABLE(of, fpga_region_of_match);
  48. static int fpga_region_of_node_match(struct device *dev, const void *data)
  49. {
  50. return dev->of_node == data;
  51. }
  52. /**
  53. * fpga_region_find - find FPGA region
  54. * @np: device node of FPGA Region
  55. * Caller will need to put_device(&region->dev) when done.
  56. * Returns FPGA Region struct or NULL
  57. */
  58. static struct fpga_region *fpga_region_find(struct device_node *np)
  59. {
  60. struct device *dev;
  61. dev = class_find_device(fpga_region_class, NULL, np,
  62. fpga_region_of_node_match);
  63. if (!dev)
  64. return NULL;
  65. return to_fpga_region(dev);
  66. }
  67. /**
  68. * fpga_region_get - get an exclusive reference to a fpga region
  69. * @region: FPGA Region struct
  70. *
  71. * Caller should call fpga_region_put() when done with region.
  72. *
  73. * Return fpga_region struct if successful.
  74. * Return -EBUSY if someone already has a reference to the region.
  75. * Return -ENODEV if @np is not a FPGA Region.
  76. */
  77. static struct fpga_region *fpga_region_get(struct fpga_region *region)
  78. {
  79. struct device *dev = &region->dev;
  80. if (!mutex_trylock(&region->mutex)) {
  81. dev_dbg(dev, "%s: FPGA Region already in use\n", __func__);
  82. return ERR_PTR(-EBUSY);
  83. }
  84. get_device(dev);
  85. if (!try_module_get(dev->parent->driver->owner)) {
  86. put_device(dev);
  87. mutex_unlock(&region->mutex);
  88. return ERR_PTR(-ENODEV);
  89. }
  90. dev_dbg(dev, "get\n");
  91. return region;
  92. }
  93. /**
  94. * fpga_region_put - release a reference to a region
  95. *
  96. * @region: FPGA region
  97. */
  98. static void fpga_region_put(struct fpga_region *region)
  99. {
  100. struct device *dev = &region->dev;
  101. dev_dbg(dev, "put\n");
  102. module_put(dev->parent->driver->owner);
  103. put_device(dev);
  104. mutex_unlock(&region->mutex);
  105. }
  106. /**
  107. * fpga_region_get_manager - get reference for FPGA manager
  108. * @region: FPGA region
  109. *
  110. * Get FPGA Manager from "fpga-mgr" property or from ancestor region.
  111. *
  112. * Caller should call fpga_mgr_put() when done with manager.
  113. *
  114. * Return: fpga manager struct or IS_ERR() condition containing error code.
  115. */
  116. static struct fpga_manager *fpga_region_get_manager(struct fpga_region *region)
  117. {
  118. struct device *dev = &region->dev;
  119. struct device_node *np = dev->of_node;
  120. struct device_node *mgr_node;
  121. struct fpga_manager *mgr;
  122. of_node_get(np);
  123. while (np) {
  124. if (of_device_is_compatible(np, "fpga-region")) {
  125. mgr_node = of_parse_phandle(np, "fpga-mgr", 0);
  126. if (mgr_node) {
  127. mgr = of_fpga_mgr_get(mgr_node);
  128. of_node_put(np);
  129. return mgr;
  130. }
  131. }
  132. np = of_get_next_parent(np);
  133. }
  134. of_node_put(np);
  135. return ERR_PTR(-EINVAL);
  136. }
  137. /**
  138. * fpga_region_get_bridges - create a list of bridges
  139. * @region: FPGA region
  140. * @overlay: device node of the overlay
  141. *
  142. * Create a list of bridges including the parent bridge and the bridges
  143. * specified by "fpga-bridges" property. Note that the
  144. * fpga_bridges_enable/disable/put functions are all fine with an empty list
  145. * if that happens.
  146. *
  147. * Caller should call fpga_bridges_put(&region->bridge_list) when
  148. * done with the bridges.
  149. *
  150. * Return 0 for success (even if there are no bridges specified)
  151. * or -EBUSY if any of the bridges are in use.
  152. */
  153. static int fpga_region_get_bridges(struct fpga_region *region,
  154. struct device_node *overlay)
  155. {
  156. struct device *dev = &region->dev;
  157. struct device_node *region_np = dev->of_node;
  158. struct device_node *br, *np, *parent_br = NULL;
  159. int i, ret;
  160. /* If parent is a bridge, add to list */
  161. ret = of_fpga_bridge_get_to_list(region_np->parent, region->info,
  162. &region->bridge_list);
  163. /* -EBUSY means parent is a bridge that is under use. Give up. */
  164. if (ret == -EBUSY)
  165. return ret;
  166. /* Zero return code means parent was a bridge and was added to list. */
  167. if (!ret)
  168. parent_br = region_np->parent;
  169. /* If overlay has a list of bridges, use it. */
  170. if (of_parse_phandle(overlay, "fpga-bridges", 0))
  171. np = overlay;
  172. else
  173. np = region_np;
  174. for (i = 0; ; i++) {
  175. br = of_parse_phandle(np, "fpga-bridges", i);
  176. if (!br)
  177. break;
  178. /* If parent bridge is in list, skip it. */
  179. if (br == parent_br)
  180. continue;
  181. /* If node is a bridge, get it and add to list */
  182. ret = of_fpga_bridge_get_to_list(br, region->info,
  183. &region->bridge_list);
  184. /* If any of the bridges are in use, give up */
  185. if (ret == -EBUSY) {
  186. fpga_bridges_put(&region->bridge_list);
  187. return -EBUSY;
  188. }
  189. }
  190. return 0;
  191. }
  192. /**
  193. * fpga_region_program_fpga - program FPGA
  194. * @region: FPGA region
  195. * @overlay: device node of the overlay
  196. * Program an FPGA using information in the region's fpga image info.
  197. * Return 0 for success or negative error code.
  198. */
  199. static int fpga_region_program_fpga(struct fpga_region *region,
  200. struct device_node *overlay)
  201. {
  202. struct device *dev = &region->dev;
  203. struct fpga_manager *mgr;
  204. int ret;
  205. region = fpga_region_get(region);
  206. if (IS_ERR(region)) {
  207. dev_err(dev, "failed to get FPGA region\n");
  208. return PTR_ERR(region);
  209. }
  210. mgr = fpga_region_get_manager(region);
  211. if (IS_ERR(mgr)) {
  212. dev_err(dev, "failed to get FPGA manager\n");
  213. ret = PTR_ERR(mgr);
  214. goto err_put_region;
  215. }
  216. ret = fpga_mgr_lock(mgr);
  217. if (ret) {
  218. dev_err(dev, "FPGA manager is busy\n");
  219. goto err_put_mgr;
  220. }
  221. ret = fpga_region_get_bridges(region, overlay);
  222. if (ret) {
  223. dev_err(dev, "failed to get FPGA bridges\n");
  224. goto err_unlock_mgr;
  225. }
  226. ret = fpga_bridges_disable(&region->bridge_list);
  227. if (ret) {
  228. dev_err(dev, "failed to disable bridges\n");
  229. goto err_put_br;
  230. }
  231. ret = fpga_mgr_load(mgr, region->info);
  232. if (ret) {
  233. dev_err(dev, "failed to load FPGA image\n");
  234. goto err_put_br;
  235. }
  236. ret = fpga_bridges_enable(&region->bridge_list);
  237. if (ret) {
  238. dev_err(dev, "failed to enable region bridges\n");
  239. goto err_put_br;
  240. }
  241. fpga_mgr_unlock(mgr);
  242. fpga_mgr_put(mgr);
  243. fpga_region_put(region);
  244. return 0;
  245. err_put_br:
  246. fpga_bridges_put(&region->bridge_list);
  247. err_unlock_mgr:
  248. fpga_mgr_unlock(mgr);
  249. err_put_mgr:
  250. fpga_mgr_put(mgr);
  251. err_put_region:
  252. fpga_region_put(region);
  253. return ret;
  254. }
  255. /**
  256. * child_regions_with_firmware
  257. * @overlay: device node of the overlay
  258. *
  259. * If the overlay adds child FPGA regions, they are not allowed to have
  260. * firmware-name property.
  261. *
  262. * Return 0 for OK or -EINVAL if child FPGA region adds firmware-name.
  263. */
  264. static int child_regions_with_firmware(struct device_node *overlay)
  265. {
  266. struct device_node *child_region;
  267. const char *child_firmware_name;
  268. int ret = 0;
  269. of_node_get(overlay);
  270. child_region = of_find_matching_node(overlay, fpga_region_of_match);
  271. while (child_region) {
  272. if (!of_property_read_string(child_region, "firmware-name",
  273. &child_firmware_name)) {
  274. ret = -EINVAL;
  275. break;
  276. }
  277. child_region = of_find_matching_node(child_region,
  278. fpga_region_of_match);
  279. }
  280. of_node_put(child_region);
  281. if (ret)
  282. pr_err("firmware-name not allowed in child FPGA region: %pOF",
  283. child_region);
  284. return ret;
  285. }
  286. /**
  287. * fpga_region_notify_pre_apply - pre-apply overlay notification
  288. *
  289. * @region: FPGA region that the overlay was applied to
  290. * @nd: overlay notification data
  291. *
  292. * Called after when an overlay targeted to a FPGA Region is about to be
  293. * applied. Function will check the properties that will be added to the FPGA
  294. * region. If the checks pass, it will program the FPGA.
  295. *
  296. * The checks are:
  297. * The overlay must add either firmware-name or external-fpga-config property
  298. * to the FPGA Region.
  299. *
  300. * firmware-name : program the FPGA
  301. * external-fpga-config : FPGA is already programmed
  302. * encrypted-fpga-config : FPGA bitstream is encrypted
  303. *
  304. * The overlay can add other FPGA regions, but child FPGA regions cannot have a
  305. * firmware-name property since those regions don't exist yet.
  306. *
  307. * If the overlay that breaks the rules, notifier returns an error and the
  308. * overlay is rejected before it goes into the main tree.
  309. *
  310. * Returns 0 for success or negative error code for failure.
  311. */
  312. static int fpga_region_notify_pre_apply(struct fpga_region *region,
  313. struct of_overlay_notify_data *nd)
  314. {
  315. struct device *dev = &region->dev;
  316. struct fpga_image_info *info;
  317. const char *firmware_name;
  318. int ret;
  319. info = fpga_image_info_alloc(dev);
  320. if (!info)
  321. return -ENOMEM;
  322. /* Reject overlay if child FPGA Regions have firmware-name property */
  323. ret = child_regions_with_firmware(nd->overlay);
  324. if (ret)
  325. return ret;
  326. /* Read FPGA region properties from the overlay */
  327. if (of_property_read_bool(nd->overlay, "partial-fpga-config"))
  328. info->flags |= FPGA_MGR_PARTIAL_RECONFIG;
  329. if (of_property_read_bool(nd->overlay, "external-fpga-config"))
  330. info->flags |= FPGA_MGR_EXTERNAL_CONFIG;
  331. if (of_property_read_bool(nd->overlay, "encrypted-fpga-config"))
  332. info->flags |= FPGA_MGR_ENCRYPTED_BITSTREAM;
  333. if (!of_property_read_string(nd->overlay, "firmware-name",
  334. &firmware_name)) {
  335. info->firmware_name = devm_kstrdup(dev, firmware_name,
  336. GFP_KERNEL);
  337. if (!info->firmware_name)
  338. return -ENOMEM;
  339. }
  340. of_property_read_u32(nd->overlay, "region-unfreeze-timeout-us",
  341. &info->enable_timeout_us);
  342. of_property_read_u32(nd->overlay, "region-freeze-timeout-us",
  343. &info->disable_timeout_us);
  344. of_property_read_u32(nd->overlay, "config-complete-timeout-us",
  345. &info->config_complete_timeout_us);
  346. /* If FPGA was externally programmed, don't specify firmware */
  347. if ((info->flags & FPGA_MGR_EXTERNAL_CONFIG) && info->firmware_name) {
  348. dev_err(dev, "error: specified firmware and external-fpga-config");
  349. fpga_image_info_free(info);
  350. return -EINVAL;
  351. }
  352. /* FPGA is already configured externally. We're done. */
  353. if (info->flags & FPGA_MGR_EXTERNAL_CONFIG) {
  354. fpga_image_info_free(info);
  355. return 0;
  356. }
  357. /* If we got this far, we should be programming the FPGA */
  358. if (!info->firmware_name) {
  359. dev_err(dev, "should specify firmware-name or external-fpga-config\n");
  360. fpga_image_info_free(info);
  361. return -EINVAL;
  362. }
  363. region->info = info;
  364. ret = fpga_region_program_fpga(region, nd->overlay);
  365. if (ret) {
  366. fpga_image_info_free(info);
  367. region->info = NULL;
  368. }
  369. return ret;
  370. }
  371. /**
  372. * fpga_region_notify_post_remove - post-remove overlay notification
  373. *
  374. * @region: FPGA region that was targeted by the overlay that was removed
  375. * @nd: overlay notification data
  376. *
  377. * Called after an overlay has been removed if the overlay's target was a
  378. * FPGA region.
  379. */
  380. static void fpga_region_notify_post_remove(struct fpga_region *region,
  381. struct of_overlay_notify_data *nd)
  382. {
  383. fpga_bridges_disable(&region->bridge_list);
  384. fpga_bridges_put(&region->bridge_list);
  385. fpga_image_info_free(region->info);
  386. region->info = NULL;
  387. }
  388. /**
  389. * of_fpga_region_notify - reconfig notifier for dynamic DT changes
  390. * @nb: notifier block
  391. * @action: notifier action
  392. * @arg: reconfig data
  393. *
  394. * This notifier handles programming a FPGA when a "firmware-name" property is
  395. * added to a fpga-region.
  396. *
  397. * Returns NOTIFY_OK or error if FPGA programming fails.
  398. */
  399. static int of_fpga_region_notify(struct notifier_block *nb,
  400. unsigned long action, void *arg)
  401. {
  402. struct of_overlay_notify_data *nd = arg;
  403. struct fpga_region *region;
  404. int ret;
  405. switch (action) {
  406. case OF_OVERLAY_PRE_APPLY:
  407. pr_debug("%s OF_OVERLAY_PRE_APPLY\n", __func__);
  408. break;
  409. case OF_OVERLAY_POST_APPLY:
  410. pr_debug("%s OF_OVERLAY_POST_APPLY\n", __func__);
  411. return NOTIFY_OK; /* not for us */
  412. case OF_OVERLAY_PRE_REMOVE:
  413. pr_debug("%s OF_OVERLAY_PRE_REMOVE\n", __func__);
  414. return NOTIFY_OK; /* not for us */
  415. case OF_OVERLAY_POST_REMOVE:
  416. pr_debug("%s OF_OVERLAY_POST_REMOVE\n", __func__);
  417. break;
  418. default: /* should not happen */
  419. return NOTIFY_OK;
  420. }
  421. region = fpga_region_find(nd->target);
  422. if (!region)
  423. return NOTIFY_OK;
  424. ret = 0;
  425. switch (action) {
  426. case OF_OVERLAY_PRE_APPLY:
  427. ret = fpga_region_notify_pre_apply(region, nd);
  428. break;
  429. case OF_OVERLAY_POST_REMOVE:
  430. fpga_region_notify_post_remove(region, nd);
  431. break;
  432. }
  433. put_device(&region->dev);
  434. if (ret)
  435. return notifier_from_errno(ret);
  436. return NOTIFY_OK;
  437. }
  438. static struct notifier_block fpga_region_of_nb = {
  439. .notifier_call = of_fpga_region_notify,
  440. };
  441. static int fpga_region_probe(struct platform_device *pdev)
  442. {
  443. struct device *dev = &pdev->dev;
  444. struct device_node *np = dev->of_node;
  445. struct fpga_region *region;
  446. int id, ret = 0;
  447. region = kzalloc(sizeof(*region), GFP_KERNEL);
  448. if (!region)
  449. return -ENOMEM;
  450. id = ida_simple_get(&fpga_region_ida, 0, 0, GFP_KERNEL);
  451. if (id < 0) {
  452. ret = id;
  453. goto err_kfree;
  454. }
  455. mutex_init(&region->mutex);
  456. INIT_LIST_HEAD(&region->bridge_list);
  457. device_initialize(&region->dev);
  458. region->dev.class = fpga_region_class;
  459. region->dev.parent = dev;
  460. region->dev.of_node = np;
  461. region->dev.id = id;
  462. dev_set_drvdata(dev, region);
  463. ret = dev_set_name(&region->dev, "region%d", id);
  464. if (ret)
  465. goto err_remove;
  466. ret = device_add(&region->dev);
  467. if (ret)
  468. goto err_remove;
  469. of_platform_populate(np, fpga_region_of_match, NULL, &region->dev);
  470. dev_info(dev, "FPGA Region probed\n");
  471. return 0;
  472. err_remove:
  473. ida_simple_remove(&fpga_region_ida, id);
  474. err_kfree:
  475. kfree(region);
  476. return ret;
  477. }
  478. static int fpga_region_remove(struct platform_device *pdev)
  479. {
  480. struct fpga_region *region = platform_get_drvdata(pdev);
  481. device_unregister(&region->dev);
  482. return 0;
  483. }
  484. static struct platform_driver fpga_region_driver = {
  485. .probe = fpga_region_probe,
  486. .remove = fpga_region_remove,
  487. .driver = {
  488. .name = "fpga-region",
  489. .of_match_table = of_match_ptr(fpga_region_of_match),
  490. },
  491. };
  492. static void fpga_region_dev_release(struct device *dev)
  493. {
  494. struct fpga_region *region = to_fpga_region(dev);
  495. ida_simple_remove(&fpga_region_ida, region->dev.id);
  496. kfree(region);
  497. }
  498. /**
  499. * fpga_region_init - init function for fpga_region class
  500. * Creates the fpga_region class and registers a reconfig notifier.
  501. */
  502. static int __init fpga_region_init(void)
  503. {
  504. int ret;
  505. fpga_region_class = class_create(THIS_MODULE, "fpga_region");
  506. if (IS_ERR(fpga_region_class))
  507. return PTR_ERR(fpga_region_class);
  508. fpga_region_class->dev_release = fpga_region_dev_release;
  509. ret = of_overlay_notifier_register(&fpga_region_of_nb);
  510. if (ret)
  511. goto err_class;
  512. ret = platform_driver_register(&fpga_region_driver);
  513. if (ret)
  514. goto err_plat;
  515. return 0;
  516. err_plat:
  517. of_overlay_notifier_unregister(&fpga_region_of_nb);
  518. err_class:
  519. class_destroy(fpga_region_class);
  520. ida_destroy(&fpga_region_ida);
  521. return ret;
  522. }
  523. static void __exit fpga_region_exit(void)
  524. {
  525. platform_driver_unregister(&fpga_region_driver);
  526. of_overlay_notifier_unregister(&fpga_region_of_nb);
  527. class_destroy(fpga_region_class);
  528. ida_destroy(&fpga_region_ida);
  529. }
  530. subsys_initcall(fpga_region_init);
  531. module_exit(fpga_region_exit);
  532. MODULE_DESCRIPTION("FPGA Region");
  533. MODULE_AUTHOR("Alan Tull <atull@opensource.altera.com>");
  534. MODULE_LICENSE("GPL v2");