meson-axg-s400.dts 3.2 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /*
  3. * Copyright (c) 2017 Amlogic, Inc. All rights reserved.
  4. */
  5. /dts-v1/;
  6. #include "meson-axg.dtsi"
  7. / {
  8. compatible = "amlogic,s400", "amlogic,a113d", "amlogic,meson-axg";
  9. model = "Amlogic Meson AXG S400 Development Board";
  10. aliases {
  11. serial0 = &uart_AO;
  12. serial1 = &uart_A;
  13. };
  14. vddio_boot: regulator-vddio_boot {
  15. compatible = "regulator-fixed";
  16. regulator-name = "VDDIO_BOOT";
  17. regulator-min-microvolt = <1800000>;
  18. regulator-max-microvolt = <1800000>;
  19. };
  20. vddao_3v3: regulator-vddao_3v3 {
  21. compatible = "regulator-fixed";
  22. regulator-name = "VDDAO_3V3";
  23. regulator-min-microvolt = <3300000>;
  24. regulator-max-microvolt = <3300000>;
  25. };
  26. vddio_ao18: regulator-vddio_ao18 {
  27. compatible = "regulator-fixed";
  28. regulator-name = "VDDIO_AO18";
  29. regulator-min-microvolt = <1800000>;
  30. regulator-max-microvolt = <1800000>;
  31. };
  32. vcc_3v3: regulator-vcc_3v3 {
  33. compatible = "regulator-fixed";
  34. regulator-name = "VCC_3V3";
  35. regulator-min-microvolt = <3300000>;
  36. regulator-max-microvolt = <3300000>;
  37. };
  38. emmc_pwrseq: emmc-pwrseq {
  39. compatible = "mmc-pwrseq-emmc";
  40. reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
  41. };
  42. sdio_pwrseq: sdio-pwrseq {
  43. compatible = "mmc-pwrseq-simple";
  44. reset-gpios = <&gpio GPIOX_7 GPIO_ACTIVE_LOW>;
  45. clocks = <&wifi32k>;
  46. clock-names = "ext_clock";
  47. };
  48. wifi32k: wifi32k {
  49. compatible = "pwm-clock";
  50. #clock-cells = <0>;
  51. clock-frequency = <32768>;
  52. pwms = <&pwm_ab 0 30518 0>; /* PWM_A at 32.768KHz */
  53. };
  54. };
  55. &ethmac {
  56. status = "okay";
  57. pinctrl-0 = <&eth_rgmii_y_pins>;
  58. pinctrl-names = "default";
  59. phy-handle = <&eth_phy0>;
  60. phy-mode = "rgmii";
  61. mdio {
  62. compatible = "snps,dwmac-mdio";
  63. #address-cells = <1>;
  64. #size-cells = <0>;
  65. eth_phy0: ethernet-phy@0 {
  66. /* Realtek RTL8211F (0x001cc916) */
  67. reg = <0>;
  68. eee-broken-1000t;
  69. };
  70. };
  71. };
  72. &uart_A {
  73. status = "okay";
  74. pinctrl-0 = <&uart_a_pins>;
  75. pinctrl-names = "default";
  76. };
  77. &uart_AO {
  78. status = "okay";
  79. pinctrl-0 = <&uart_ao_a_pins>;
  80. pinctrl-names = "default";
  81. };
  82. &ir {
  83. status = "okay";
  84. pinctrl-0 = <&remote_input_ao_pins>;
  85. pinctrl-names = "default";
  86. };
  87. &i2c1 {
  88. status = "okay";
  89. pinctrl-0 = <&i2c1_z_pins>;
  90. pinctrl-names = "default";
  91. };
  92. &i2c_AO {
  93. status = "okay";
  94. pinctrl-0 = <&i2c_ao_sck_10_pins>, <&i2c_ao_sda_11_pins>;
  95. pinctrl-names = "default";
  96. };
  97. &pwm_ab {
  98. status = "okay";
  99. pinctrl-0 = <&pwm_a_x20_pins>;
  100. pinctrl-names = "default";
  101. };
  102. /* emmc storage */
  103. &sd_emmc_c {
  104. status = "okay";
  105. pinctrl-0 = <&emmc_pins>;
  106. pinctrl-1 = <&emmc_clk_gate_pins>;
  107. pinctrl-names = "default", "clk-gate";
  108. bus-width = <8>;
  109. cap-sd-highspeed;
  110. cap-mmc-highspeed;
  111. max-frequency = <180000000>;
  112. non-removable;
  113. disable-wp;
  114. mmc-ddr-1_8v;
  115. mmc-hs200-1_8v;
  116. vmmc-supply = <&vcc_3v3>;
  117. vqmmc-supply = <&vddio_boot>;
  118. };
  119. /* wifi module */
  120. &sd_emmc_b {
  121. status = "okay";
  122. #address-cells = <1>;
  123. #size-cells = <0>;
  124. pinctrl-0 = <&sdio_pins>;
  125. pinctrl-1 = <&sdio_clk_gate_pins>;
  126. pinctrl-names = "default", "clk-gate";
  127. bus-width = <4>;
  128. cap-sd-highspeed;
  129. max-frequency = <100000000>;
  130. non-removable;
  131. disable-wp;
  132. mmc-pwrseq = <&sdio_pwrseq>;
  133. vmmc-supply = <&vddao_3v3>;
  134. vqmmc-supply = <&vddio_boot>;
  135. brcmf: wifi@1 {
  136. reg = <1>;
  137. compatible = "brcm,bcm4329-fmac";
  138. };
  139. };