lan743x_main.c 83 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627262826292630263126322633263426352636263726382639264026412642264326442645264626472648264926502651265226532654265526562657265826592660266126622663266426652666266726682669267026712672267326742675267626772678267926802681268226832684268526862687268826892690269126922693269426952696269726982699270027012702270327042705270627072708270927102711271227132714271527162717271827192720272127222723272427252726272727282729273027312732273327342735273627372738273927402741274227432744274527462747274827492750275127522753275427552756275727582759276027612762276327642765276627672768276927702771277227732774277527762777277827792780278127822783278427852786278727882789279027912792279327942795279627972798279928002801280228032804280528062807280828092810281128122813281428152816281728182819282028212822282328242825282628272828282928302831283228332834283528362837283828392840284128422843284428452846284728482849285028512852285328542855285628572858285928602861286228632864286528662867286828692870287128722873287428752876287728782879288028812882288328842885288628872888288928902891289228932894289528962897289828992900290129022903290429052906290729082909291029112912291329142915291629172918291929202921292229232924292529262927292829292930293129322933293429352936293729382939294029412942294329442945294629472948294929502951295229532954295529562957295829592960296129622963296429652966296729682969297029712972297329742975297629772978297929802981298229832984298529862987298829892990299129922993299429952996299729982999300030013002300330043005300630073008300930103011301230133014301530163017301830193020302130223023302430253026302730283029303030313032303330343035303630373038303930403041
  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /* Copyright (C) 2018 Microchip Technology Inc. */
  3. #include <linux/module.h>
  4. #include <linux/pci.h>
  5. #include <linux/netdevice.h>
  6. #include <linux/etherdevice.h>
  7. #include <linux/crc32.h>
  8. #include <linux/microchipphy.h>
  9. #include <linux/net_tstamp.h>
  10. #include <linux/phy.h>
  11. #include <linux/rtnetlink.h>
  12. #include <linux/iopoll.h>
  13. #include <linux/crc16.h>
  14. #include "lan743x_main.h"
  15. #include "lan743x_ethtool.h"
  16. static void lan743x_pci_cleanup(struct lan743x_adapter *adapter)
  17. {
  18. pci_release_selected_regions(adapter->pdev,
  19. pci_select_bars(adapter->pdev,
  20. IORESOURCE_MEM));
  21. pci_disable_device(adapter->pdev);
  22. }
  23. static int lan743x_pci_init(struct lan743x_adapter *adapter,
  24. struct pci_dev *pdev)
  25. {
  26. unsigned long bars = 0;
  27. int ret;
  28. adapter->pdev = pdev;
  29. ret = pci_enable_device_mem(pdev);
  30. if (ret)
  31. goto return_error;
  32. netif_info(adapter, probe, adapter->netdev,
  33. "PCI: Vendor ID = 0x%04X, Device ID = 0x%04X\n",
  34. pdev->vendor, pdev->device);
  35. bars = pci_select_bars(pdev, IORESOURCE_MEM);
  36. if (!test_bit(0, &bars))
  37. goto disable_device;
  38. ret = pci_request_selected_regions(pdev, bars, DRIVER_NAME);
  39. if (ret)
  40. goto disable_device;
  41. pci_set_master(pdev);
  42. return 0;
  43. disable_device:
  44. pci_disable_device(adapter->pdev);
  45. return_error:
  46. return ret;
  47. }
  48. u32 lan743x_csr_read(struct lan743x_adapter *adapter, int offset)
  49. {
  50. return ioread32(&adapter->csr.csr_address[offset]);
  51. }
  52. void lan743x_csr_write(struct lan743x_adapter *adapter, int offset,
  53. u32 data)
  54. {
  55. iowrite32(data, &adapter->csr.csr_address[offset]);
  56. }
  57. #define LAN743X_CSR_READ_OP(offset) lan743x_csr_read(adapter, offset)
  58. static int lan743x_csr_light_reset(struct lan743x_adapter *adapter)
  59. {
  60. u32 data;
  61. data = lan743x_csr_read(adapter, HW_CFG);
  62. data |= HW_CFG_LRST_;
  63. lan743x_csr_write(adapter, HW_CFG, data);
  64. return readx_poll_timeout(LAN743X_CSR_READ_OP, HW_CFG, data,
  65. !(data & HW_CFG_LRST_), 100000, 10000000);
  66. }
  67. static int lan743x_csr_wait_for_bit(struct lan743x_adapter *adapter,
  68. int offset, u32 bit_mask,
  69. int target_value, int usleep_min,
  70. int usleep_max, int count)
  71. {
  72. u32 data;
  73. return readx_poll_timeout(LAN743X_CSR_READ_OP, offset, data,
  74. target_value == ((data & bit_mask) ? 1 : 0),
  75. usleep_max, usleep_min * count);
  76. }
  77. static int lan743x_csr_init(struct lan743x_adapter *adapter)
  78. {
  79. struct lan743x_csr *csr = &adapter->csr;
  80. resource_size_t bar_start, bar_length;
  81. int result;
  82. bar_start = pci_resource_start(adapter->pdev, 0);
  83. bar_length = pci_resource_len(adapter->pdev, 0);
  84. csr->csr_address = devm_ioremap(&adapter->pdev->dev,
  85. bar_start, bar_length);
  86. if (!csr->csr_address) {
  87. result = -ENOMEM;
  88. goto clean_up;
  89. }
  90. csr->id_rev = lan743x_csr_read(adapter, ID_REV);
  91. csr->fpga_rev = lan743x_csr_read(adapter, FPGA_REV);
  92. netif_info(adapter, probe, adapter->netdev,
  93. "ID_REV = 0x%08X, FPGA_REV = %d.%d\n",
  94. csr->id_rev, FPGA_REV_GET_MAJOR_(csr->fpga_rev),
  95. FPGA_REV_GET_MINOR_(csr->fpga_rev));
  96. if (!ID_REV_IS_VALID_CHIP_ID_(csr->id_rev)) {
  97. result = -ENODEV;
  98. goto clean_up;
  99. }
  100. csr->flags = LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR;
  101. switch (csr->id_rev & ID_REV_CHIP_REV_MASK_) {
  102. case ID_REV_CHIP_REV_A0_:
  103. csr->flags |= LAN743X_CSR_FLAG_IS_A0;
  104. csr->flags &= ~LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR;
  105. break;
  106. case ID_REV_CHIP_REV_B0_:
  107. csr->flags |= LAN743X_CSR_FLAG_IS_B0;
  108. break;
  109. }
  110. result = lan743x_csr_light_reset(adapter);
  111. if (result)
  112. goto clean_up;
  113. return 0;
  114. clean_up:
  115. return result;
  116. }
  117. static void lan743x_intr_software_isr(void *context)
  118. {
  119. struct lan743x_adapter *adapter = context;
  120. struct lan743x_intr *intr = &adapter->intr;
  121. u32 int_sts;
  122. int_sts = lan743x_csr_read(adapter, INT_STS);
  123. if (int_sts & INT_BIT_SW_GP_) {
  124. lan743x_csr_write(adapter, INT_STS, INT_BIT_SW_GP_);
  125. intr->software_isr_flag = 1;
  126. }
  127. }
  128. static void lan743x_tx_isr(void *context, u32 int_sts, u32 flags)
  129. {
  130. struct lan743x_tx *tx = context;
  131. struct lan743x_adapter *adapter = tx->adapter;
  132. bool enable_flag = true;
  133. u32 int_en = 0;
  134. int_en = lan743x_csr_read(adapter, INT_EN_SET);
  135. if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR) {
  136. lan743x_csr_write(adapter, INT_EN_CLR,
  137. INT_BIT_DMA_TX_(tx->channel_number));
  138. }
  139. if (int_sts & INT_BIT_DMA_TX_(tx->channel_number)) {
  140. u32 ioc_bit = DMAC_INT_BIT_TX_IOC_(tx->channel_number);
  141. u32 dmac_int_sts;
  142. u32 dmac_int_en;
  143. if (flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ)
  144. dmac_int_sts = lan743x_csr_read(adapter, DMAC_INT_STS);
  145. else
  146. dmac_int_sts = ioc_bit;
  147. if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK)
  148. dmac_int_en = lan743x_csr_read(adapter,
  149. DMAC_INT_EN_SET);
  150. else
  151. dmac_int_en = ioc_bit;
  152. dmac_int_en &= ioc_bit;
  153. dmac_int_sts &= dmac_int_en;
  154. if (dmac_int_sts & ioc_bit) {
  155. napi_schedule(&tx->napi);
  156. enable_flag = false;/* poll func will enable later */
  157. }
  158. }
  159. if (enable_flag)
  160. /* enable isr */
  161. lan743x_csr_write(adapter, INT_EN_SET,
  162. INT_BIT_DMA_TX_(tx->channel_number));
  163. }
  164. static void lan743x_rx_isr(void *context, u32 int_sts, u32 flags)
  165. {
  166. struct lan743x_rx *rx = context;
  167. struct lan743x_adapter *adapter = rx->adapter;
  168. bool enable_flag = true;
  169. if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR) {
  170. lan743x_csr_write(adapter, INT_EN_CLR,
  171. INT_BIT_DMA_RX_(rx->channel_number));
  172. }
  173. if (int_sts & INT_BIT_DMA_RX_(rx->channel_number)) {
  174. u32 rx_frame_bit = DMAC_INT_BIT_RXFRM_(rx->channel_number);
  175. u32 dmac_int_sts;
  176. u32 dmac_int_en;
  177. if (flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ)
  178. dmac_int_sts = lan743x_csr_read(adapter, DMAC_INT_STS);
  179. else
  180. dmac_int_sts = rx_frame_bit;
  181. if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK)
  182. dmac_int_en = lan743x_csr_read(adapter,
  183. DMAC_INT_EN_SET);
  184. else
  185. dmac_int_en = rx_frame_bit;
  186. dmac_int_en &= rx_frame_bit;
  187. dmac_int_sts &= dmac_int_en;
  188. if (dmac_int_sts & rx_frame_bit) {
  189. napi_schedule(&rx->napi);
  190. enable_flag = false;/* poll funct will enable later */
  191. }
  192. }
  193. if (enable_flag) {
  194. /* enable isr */
  195. lan743x_csr_write(adapter, INT_EN_SET,
  196. INT_BIT_DMA_RX_(rx->channel_number));
  197. }
  198. }
  199. static void lan743x_intr_shared_isr(void *context, u32 int_sts, u32 flags)
  200. {
  201. struct lan743x_adapter *adapter = context;
  202. unsigned int channel;
  203. if (int_sts & INT_BIT_ALL_RX_) {
  204. for (channel = 0; channel < LAN743X_USED_RX_CHANNELS;
  205. channel++) {
  206. u32 int_bit = INT_BIT_DMA_RX_(channel);
  207. if (int_sts & int_bit) {
  208. lan743x_rx_isr(&adapter->rx[channel],
  209. int_bit, flags);
  210. int_sts &= ~int_bit;
  211. }
  212. }
  213. }
  214. if (int_sts & INT_BIT_ALL_TX_) {
  215. for (channel = 0; channel < LAN743X_USED_TX_CHANNELS;
  216. channel++) {
  217. u32 int_bit = INT_BIT_DMA_TX_(channel);
  218. if (int_sts & int_bit) {
  219. lan743x_tx_isr(&adapter->tx[channel],
  220. int_bit, flags);
  221. int_sts &= ~int_bit;
  222. }
  223. }
  224. }
  225. if (int_sts & INT_BIT_ALL_OTHER_) {
  226. if (int_sts & INT_BIT_SW_GP_) {
  227. lan743x_intr_software_isr(adapter);
  228. int_sts &= ~INT_BIT_SW_GP_;
  229. }
  230. if (int_sts & INT_BIT_1588_) {
  231. lan743x_ptp_isr(adapter);
  232. int_sts &= ~INT_BIT_1588_;
  233. }
  234. }
  235. if (int_sts)
  236. lan743x_csr_write(adapter, INT_EN_CLR, int_sts);
  237. }
  238. static irqreturn_t lan743x_intr_entry_isr(int irq, void *ptr)
  239. {
  240. struct lan743x_vector *vector = ptr;
  241. struct lan743x_adapter *adapter = vector->adapter;
  242. irqreturn_t result = IRQ_NONE;
  243. u32 int_enables;
  244. u32 int_sts;
  245. if (vector->flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ) {
  246. int_sts = lan743x_csr_read(adapter, INT_STS);
  247. } else if (vector->flags &
  248. (LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C |
  249. LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C)) {
  250. int_sts = lan743x_csr_read(adapter, INT_STS_R2C);
  251. } else {
  252. /* use mask as implied status */
  253. int_sts = vector->int_mask | INT_BIT_MAS_;
  254. }
  255. if (!(int_sts & INT_BIT_MAS_))
  256. goto irq_done;
  257. if (vector->flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR)
  258. /* disable vector interrupt */
  259. lan743x_csr_write(adapter,
  260. INT_VEC_EN_CLR,
  261. INT_VEC_EN_(vector->vector_index));
  262. if (vector->flags & LAN743X_VECTOR_FLAG_MASTER_ENABLE_CLEAR)
  263. /* disable master interrupt */
  264. lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_MAS_);
  265. if (vector->flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK) {
  266. int_enables = lan743x_csr_read(adapter, INT_EN_SET);
  267. } else {
  268. /* use vector mask as implied enable mask */
  269. int_enables = vector->int_mask;
  270. }
  271. int_sts &= int_enables;
  272. int_sts &= vector->int_mask;
  273. if (int_sts) {
  274. if (vector->handler) {
  275. vector->handler(vector->context,
  276. int_sts, vector->flags);
  277. } else {
  278. /* disable interrupts on this vector */
  279. lan743x_csr_write(adapter, INT_EN_CLR,
  280. vector->int_mask);
  281. }
  282. result = IRQ_HANDLED;
  283. }
  284. if (vector->flags & LAN743X_VECTOR_FLAG_MASTER_ENABLE_SET)
  285. /* enable master interrupt */
  286. lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_MAS_);
  287. if (vector->flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET)
  288. /* enable vector interrupt */
  289. lan743x_csr_write(adapter,
  290. INT_VEC_EN_SET,
  291. INT_VEC_EN_(vector->vector_index));
  292. irq_done:
  293. return result;
  294. }
  295. static int lan743x_intr_test_isr(struct lan743x_adapter *adapter)
  296. {
  297. struct lan743x_intr *intr = &adapter->intr;
  298. int result = -ENODEV;
  299. int timeout = 10;
  300. intr->software_isr_flag = 0;
  301. /* enable interrupt */
  302. lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_SW_GP_);
  303. /* activate interrupt here */
  304. lan743x_csr_write(adapter, INT_SET, INT_BIT_SW_GP_);
  305. while ((timeout > 0) && (!(intr->software_isr_flag))) {
  306. usleep_range(1000, 20000);
  307. timeout--;
  308. }
  309. if (intr->software_isr_flag)
  310. result = 0;
  311. /* disable interrupts */
  312. lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_SW_GP_);
  313. return result;
  314. }
  315. static int lan743x_intr_register_isr(struct lan743x_adapter *adapter,
  316. int vector_index, u32 flags,
  317. u32 int_mask,
  318. lan743x_vector_handler handler,
  319. void *context)
  320. {
  321. struct lan743x_vector *vector = &adapter->intr.vector_list
  322. [vector_index];
  323. int ret;
  324. vector->adapter = adapter;
  325. vector->flags = flags;
  326. vector->vector_index = vector_index;
  327. vector->int_mask = int_mask;
  328. vector->handler = handler;
  329. vector->context = context;
  330. ret = request_irq(vector->irq,
  331. lan743x_intr_entry_isr,
  332. (flags & LAN743X_VECTOR_FLAG_IRQ_SHARED) ?
  333. IRQF_SHARED : 0, DRIVER_NAME, vector);
  334. if (ret) {
  335. vector->handler = NULL;
  336. vector->context = NULL;
  337. vector->int_mask = 0;
  338. vector->flags = 0;
  339. }
  340. return ret;
  341. }
  342. static void lan743x_intr_unregister_isr(struct lan743x_adapter *adapter,
  343. int vector_index)
  344. {
  345. struct lan743x_vector *vector = &adapter->intr.vector_list
  346. [vector_index];
  347. free_irq(vector->irq, vector);
  348. vector->handler = NULL;
  349. vector->context = NULL;
  350. vector->int_mask = 0;
  351. vector->flags = 0;
  352. }
  353. static u32 lan743x_intr_get_vector_flags(struct lan743x_adapter *adapter,
  354. u32 int_mask)
  355. {
  356. int index;
  357. for (index = 0; index < LAN743X_MAX_VECTOR_COUNT; index++) {
  358. if (adapter->intr.vector_list[index].int_mask & int_mask)
  359. return adapter->intr.vector_list[index].flags;
  360. }
  361. return 0;
  362. }
  363. static void lan743x_intr_close(struct lan743x_adapter *adapter)
  364. {
  365. struct lan743x_intr *intr = &adapter->intr;
  366. int index = 0;
  367. lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_MAS_);
  368. lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0x000000FF);
  369. for (index = 0; index < LAN743X_MAX_VECTOR_COUNT; index++) {
  370. if (intr->flags & INTR_FLAG_IRQ_REQUESTED(index)) {
  371. lan743x_intr_unregister_isr(adapter, index);
  372. intr->flags &= ~INTR_FLAG_IRQ_REQUESTED(index);
  373. }
  374. }
  375. if (intr->flags & INTR_FLAG_MSI_ENABLED) {
  376. pci_disable_msi(adapter->pdev);
  377. intr->flags &= ~INTR_FLAG_MSI_ENABLED;
  378. }
  379. if (intr->flags & INTR_FLAG_MSIX_ENABLED) {
  380. pci_disable_msix(adapter->pdev);
  381. intr->flags &= ~INTR_FLAG_MSIX_ENABLED;
  382. }
  383. }
  384. static int lan743x_intr_open(struct lan743x_adapter *adapter)
  385. {
  386. struct msix_entry msix_entries[LAN743X_MAX_VECTOR_COUNT];
  387. struct lan743x_intr *intr = &adapter->intr;
  388. u32 int_vec_en_auto_clr = 0;
  389. u32 int_vec_map0 = 0;
  390. u32 int_vec_map1 = 0;
  391. int ret = -ENODEV;
  392. int index = 0;
  393. u32 flags = 0;
  394. intr->number_of_vectors = 0;
  395. /* Try to set up MSIX interrupts */
  396. memset(&msix_entries[0], 0,
  397. sizeof(struct msix_entry) * LAN743X_MAX_VECTOR_COUNT);
  398. for (index = 0; index < LAN743X_MAX_VECTOR_COUNT; index++)
  399. msix_entries[index].entry = index;
  400. ret = pci_enable_msix_range(adapter->pdev,
  401. msix_entries, 1,
  402. 1 + LAN743X_USED_TX_CHANNELS +
  403. LAN743X_USED_RX_CHANNELS);
  404. if (ret > 0) {
  405. intr->flags |= INTR_FLAG_MSIX_ENABLED;
  406. intr->number_of_vectors = ret;
  407. intr->using_vectors = true;
  408. for (index = 0; index < intr->number_of_vectors; index++)
  409. intr->vector_list[index].irq = msix_entries
  410. [index].vector;
  411. netif_info(adapter, ifup, adapter->netdev,
  412. "using MSIX interrupts, number of vectors = %d\n",
  413. intr->number_of_vectors);
  414. }
  415. /* If MSIX failed try to setup using MSI interrupts */
  416. if (!intr->number_of_vectors) {
  417. if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) {
  418. if (!pci_enable_msi(adapter->pdev)) {
  419. intr->flags |= INTR_FLAG_MSI_ENABLED;
  420. intr->number_of_vectors = 1;
  421. intr->using_vectors = true;
  422. intr->vector_list[0].irq =
  423. adapter->pdev->irq;
  424. netif_info(adapter, ifup, adapter->netdev,
  425. "using MSI interrupts, number of vectors = %d\n",
  426. intr->number_of_vectors);
  427. }
  428. }
  429. }
  430. /* If MSIX, and MSI failed, setup using legacy interrupt */
  431. if (!intr->number_of_vectors) {
  432. intr->number_of_vectors = 1;
  433. intr->using_vectors = false;
  434. intr->vector_list[0].irq = intr->irq;
  435. netif_info(adapter, ifup, adapter->netdev,
  436. "using legacy interrupts\n");
  437. }
  438. /* At this point we must have at least one irq */
  439. lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0xFFFFFFFF);
  440. /* map all interrupts to vector 0 */
  441. lan743x_csr_write(adapter, INT_VEC_MAP0, 0x00000000);
  442. lan743x_csr_write(adapter, INT_VEC_MAP1, 0x00000000);
  443. lan743x_csr_write(adapter, INT_VEC_MAP2, 0x00000000);
  444. flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ |
  445. LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C |
  446. LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK |
  447. LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR;
  448. if (intr->using_vectors) {
  449. flags |= LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR |
  450. LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET;
  451. } else {
  452. flags |= LAN743X_VECTOR_FLAG_MASTER_ENABLE_CLEAR |
  453. LAN743X_VECTOR_FLAG_MASTER_ENABLE_SET |
  454. LAN743X_VECTOR_FLAG_IRQ_SHARED;
  455. }
  456. if (adapter->csr.flags & LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) {
  457. flags &= ~LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ;
  458. flags &= ~LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C;
  459. flags &= ~LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR;
  460. flags &= ~LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK;
  461. flags |= LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C;
  462. flags |= LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C;
  463. }
  464. ret = lan743x_intr_register_isr(adapter, 0, flags,
  465. INT_BIT_ALL_RX_ | INT_BIT_ALL_TX_ |
  466. INT_BIT_ALL_OTHER_,
  467. lan743x_intr_shared_isr, adapter);
  468. if (ret)
  469. goto clean_up;
  470. intr->flags |= INTR_FLAG_IRQ_REQUESTED(0);
  471. if (intr->using_vectors)
  472. lan743x_csr_write(adapter, INT_VEC_EN_SET,
  473. INT_VEC_EN_(0));
  474. if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) {
  475. lan743x_csr_write(adapter, INT_MOD_CFG0, LAN743X_INT_MOD);
  476. lan743x_csr_write(adapter, INT_MOD_CFG1, LAN743X_INT_MOD);
  477. lan743x_csr_write(adapter, INT_MOD_CFG2, LAN743X_INT_MOD);
  478. lan743x_csr_write(adapter, INT_MOD_CFG3, LAN743X_INT_MOD);
  479. lan743x_csr_write(adapter, INT_MOD_CFG4, LAN743X_INT_MOD);
  480. lan743x_csr_write(adapter, INT_MOD_CFG5, LAN743X_INT_MOD);
  481. lan743x_csr_write(adapter, INT_MOD_CFG6, LAN743X_INT_MOD);
  482. lan743x_csr_write(adapter, INT_MOD_CFG7, LAN743X_INT_MOD);
  483. lan743x_csr_write(adapter, INT_MOD_MAP0, 0x00005432);
  484. lan743x_csr_write(adapter, INT_MOD_MAP1, 0x00000001);
  485. lan743x_csr_write(adapter, INT_MOD_MAP2, 0x00FFFFFF);
  486. }
  487. /* enable interrupts */
  488. lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_MAS_);
  489. ret = lan743x_intr_test_isr(adapter);
  490. if (ret)
  491. goto clean_up;
  492. if (intr->number_of_vectors > 1) {
  493. int number_of_tx_vectors = intr->number_of_vectors - 1;
  494. if (number_of_tx_vectors > LAN743X_USED_TX_CHANNELS)
  495. number_of_tx_vectors = LAN743X_USED_TX_CHANNELS;
  496. flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ |
  497. LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C |
  498. LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK |
  499. LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR |
  500. LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR |
  501. LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET;
  502. if (adapter->csr.flags &
  503. LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) {
  504. flags = LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR |
  505. LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET |
  506. LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET |
  507. LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR |
  508. LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR;
  509. }
  510. for (index = 0; index < number_of_tx_vectors; index++) {
  511. u32 int_bit = INT_BIT_DMA_TX_(index);
  512. int vector = index + 1;
  513. /* map TX interrupt to vector */
  514. int_vec_map1 |= INT_VEC_MAP1_TX_VEC_(index, vector);
  515. lan743x_csr_write(adapter, INT_VEC_MAP1, int_vec_map1);
  516. if (flags &
  517. LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR) {
  518. int_vec_en_auto_clr |= INT_VEC_EN_(vector);
  519. lan743x_csr_write(adapter, INT_VEC_EN_AUTO_CLR,
  520. int_vec_en_auto_clr);
  521. }
  522. /* Remove TX interrupt from shared mask */
  523. intr->vector_list[0].int_mask &= ~int_bit;
  524. ret = lan743x_intr_register_isr(adapter, vector, flags,
  525. int_bit, lan743x_tx_isr,
  526. &adapter->tx[index]);
  527. if (ret)
  528. goto clean_up;
  529. intr->flags |= INTR_FLAG_IRQ_REQUESTED(vector);
  530. if (!(flags &
  531. LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET))
  532. lan743x_csr_write(adapter, INT_VEC_EN_SET,
  533. INT_VEC_EN_(vector));
  534. }
  535. }
  536. if ((intr->number_of_vectors - LAN743X_USED_TX_CHANNELS) > 1) {
  537. int number_of_rx_vectors = intr->number_of_vectors -
  538. LAN743X_USED_TX_CHANNELS - 1;
  539. if (number_of_rx_vectors > LAN743X_USED_RX_CHANNELS)
  540. number_of_rx_vectors = LAN743X_USED_RX_CHANNELS;
  541. flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ |
  542. LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C |
  543. LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK |
  544. LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR |
  545. LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR |
  546. LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET;
  547. if (adapter->csr.flags &
  548. LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) {
  549. flags = LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR |
  550. LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET |
  551. LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET |
  552. LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR |
  553. LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR;
  554. }
  555. for (index = 0; index < number_of_rx_vectors; index++) {
  556. int vector = index + 1 + LAN743X_USED_TX_CHANNELS;
  557. u32 int_bit = INT_BIT_DMA_RX_(index);
  558. /* map RX interrupt to vector */
  559. int_vec_map0 |= INT_VEC_MAP0_RX_VEC_(index, vector);
  560. lan743x_csr_write(adapter, INT_VEC_MAP0, int_vec_map0);
  561. if (flags &
  562. LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR) {
  563. int_vec_en_auto_clr |= INT_VEC_EN_(vector);
  564. lan743x_csr_write(adapter, INT_VEC_EN_AUTO_CLR,
  565. int_vec_en_auto_clr);
  566. }
  567. /* Remove RX interrupt from shared mask */
  568. intr->vector_list[0].int_mask &= ~int_bit;
  569. ret = lan743x_intr_register_isr(adapter, vector, flags,
  570. int_bit, lan743x_rx_isr,
  571. &adapter->rx[index]);
  572. if (ret)
  573. goto clean_up;
  574. intr->flags |= INTR_FLAG_IRQ_REQUESTED(vector);
  575. lan743x_csr_write(adapter, INT_VEC_EN_SET,
  576. INT_VEC_EN_(vector));
  577. }
  578. }
  579. return 0;
  580. clean_up:
  581. lan743x_intr_close(adapter);
  582. return ret;
  583. }
  584. static int lan743x_dp_write(struct lan743x_adapter *adapter,
  585. u32 select, u32 addr, u32 length, u32 *buf)
  586. {
  587. int ret = -EIO;
  588. u32 dp_sel;
  589. int i;
  590. mutex_lock(&adapter->dp_lock);
  591. if (lan743x_csr_wait_for_bit(adapter, DP_SEL, DP_SEL_DPRDY_,
  592. 1, 40, 100, 100))
  593. goto unlock;
  594. dp_sel = lan743x_csr_read(adapter, DP_SEL);
  595. dp_sel &= ~DP_SEL_MASK_;
  596. dp_sel |= select;
  597. lan743x_csr_write(adapter, DP_SEL, dp_sel);
  598. for (i = 0; i < length; i++) {
  599. lan743x_csr_write(adapter, DP_ADDR, addr + i);
  600. lan743x_csr_write(adapter, DP_DATA_0, buf[i]);
  601. lan743x_csr_write(adapter, DP_CMD, DP_CMD_WRITE_);
  602. if (lan743x_csr_wait_for_bit(adapter, DP_SEL, DP_SEL_DPRDY_,
  603. 1, 40, 100, 100))
  604. goto unlock;
  605. }
  606. ret = 0;
  607. unlock:
  608. mutex_unlock(&adapter->dp_lock);
  609. return ret;
  610. }
  611. static u32 lan743x_mac_mii_access(u16 id, u16 index, int read)
  612. {
  613. u32 ret;
  614. ret = (id << MAC_MII_ACC_PHY_ADDR_SHIFT_) &
  615. MAC_MII_ACC_PHY_ADDR_MASK_;
  616. ret |= (index << MAC_MII_ACC_MIIRINDA_SHIFT_) &
  617. MAC_MII_ACC_MIIRINDA_MASK_;
  618. if (read)
  619. ret |= MAC_MII_ACC_MII_READ_;
  620. else
  621. ret |= MAC_MII_ACC_MII_WRITE_;
  622. ret |= MAC_MII_ACC_MII_BUSY_;
  623. return ret;
  624. }
  625. static int lan743x_mac_mii_wait_till_not_busy(struct lan743x_adapter *adapter)
  626. {
  627. u32 data;
  628. return readx_poll_timeout(LAN743X_CSR_READ_OP, MAC_MII_ACC, data,
  629. !(data & MAC_MII_ACC_MII_BUSY_), 0, 1000000);
  630. }
  631. static int lan743x_mdiobus_read(struct mii_bus *bus, int phy_id, int index)
  632. {
  633. struct lan743x_adapter *adapter = bus->priv;
  634. u32 val, mii_access;
  635. int ret;
  636. /* comfirm MII not busy */
  637. ret = lan743x_mac_mii_wait_till_not_busy(adapter);
  638. if (ret < 0)
  639. return ret;
  640. /* set the address, index & direction (read from PHY) */
  641. mii_access = lan743x_mac_mii_access(phy_id, index, MAC_MII_READ);
  642. lan743x_csr_write(adapter, MAC_MII_ACC, mii_access);
  643. ret = lan743x_mac_mii_wait_till_not_busy(adapter);
  644. if (ret < 0)
  645. return ret;
  646. val = lan743x_csr_read(adapter, MAC_MII_DATA);
  647. return (int)(val & 0xFFFF);
  648. }
  649. static int lan743x_mdiobus_write(struct mii_bus *bus,
  650. int phy_id, int index, u16 regval)
  651. {
  652. struct lan743x_adapter *adapter = bus->priv;
  653. u32 val, mii_access;
  654. int ret;
  655. /* confirm MII not busy */
  656. ret = lan743x_mac_mii_wait_till_not_busy(adapter);
  657. if (ret < 0)
  658. return ret;
  659. val = (u32)regval;
  660. lan743x_csr_write(adapter, MAC_MII_DATA, val);
  661. /* set the address, index & direction (write to PHY) */
  662. mii_access = lan743x_mac_mii_access(phy_id, index, MAC_MII_WRITE);
  663. lan743x_csr_write(adapter, MAC_MII_ACC, mii_access);
  664. ret = lan743x_mac_mii_wait_till_not_busy(adapter);
  665. return ret;
  666. }
  667. static void lan743x_mac_set_address(struct lan743x_adapter *adapter,
  668. u8 *addr)
  669. {
  670. u32 addr_lo, addr_hi;
  671. addr_lo = addr[0] |
  672. addr[1] << 8 |
  673. addr[2] << 16 |
  674. addr[3] << 24;
  675. addr_hi = addr[4] |
  676. addr[5] << 8;
  677. lan743x_csr_write(adapter, MAC_RX_ADDRL, addr_lo);
  678. lan743x_csr_write(adapter, MAC_RX_ADDRH, addr_hi);
  679. ether_addr_copy(adapter->mac_address, addr);
  680. netif_info(adapter, drv, adapter->netdev,
  681. "MAC address set to %pM\n", addr);
  682. }
  683. static int lan743x_mac_init(struct lan743x_adapter *adapter)
  684. {
  685. bool mac_address_valid = true;
  686. struct net_device *netdev;
  687. u32 mac_addr_hi = 0;
  688. u32 mac_addr_lo = 0;
  689. u32 data;
  690. int ret;
  691. netdev = adapter->netdev;
  692. lan743x_csr_write(adapter, MAC_CR, MAC_CR_RST_);
  693. ret = lan743x_csr_wait_for_bit(adapter, MAC_CR, MAC_CR_RST_,
  694. 0, 1000, 20000, 100);
  695. if (ret)
  696. return ret;
  697. /* setup auto duplex, and speed detection */
  698. data = lan743x_csr_read(adapter, MAC_CR);
  699. data |= MAC_CR_ADD_ | MAC_CR_ASD_;
  700. data |= MAC_CR_CNTR_RST_;
  701. lan743x_csr_write(adapter, MAC_CR, data);
  702. mac_addr_hi = lan743x_csr_read(adapter, MAC_RX_ADDRH);
  703. mac_addr_lo = lan743x_csr_read(adapter, MAC_RX_ADDRL);
  704. adapter->mac_address[0] = mac_addr_lo & 0xFF;
  705. adapter->mac_address[1] = (mac_addr_lo >> 8) & 0xFF;
  706. adapter->mac_address[2] = (mac_addr_lo >> 16) & 0xFF;
  707. adapter->mac_address[3] = (mac_addr_lo >> 24) & 0xFF;
  708. adapter->mac_address[4] = mac_addr_hi & 0xFF;
  709. adapter->mac_address[5] = (mac_addr_hi >> 8) & 0xFF;
  710. if (((mac_addr_hi & 0x0000FFFF) == 0x0000FFFF) &&
  711. mac_addr_lo == 0xFFFFFFFF) {
  712. mac_address_valid = false;
  713. } else if (!is_valid_ether_addr(adapter->mac_address)) {
  714. mac_address_valid = false;
  715. }
  716. if (!mac_address_valid)
  717. eth_random_addr(adapter->mac_address);
  718. lan743x_mac_set_address(adapter, adapter->mac_address);
  719. ether_addr_copy(netdev->dev_addr, adapter->mac_address);
  720. return 0;
  721. }
  722. static int lan743x_mac_open(struct lan743x_adapter *adapter)
  723. {
  724. int ret = 0;
  725. u32 temp;
  726. temp = lan743x_csr_read(adapter, MAC_RX);
  727. lan743x_csr_write(adapter, MAC_RX, temp | MAC_RX_RXEN_);
  728. temp = lan743x_csr_read(adapter, MAC_TX);
  729. lan743x_csr_write(adapter, MAC_TX, temp | MAC_TX_TXEN_);
  730. return ret;
  731. }
  732. static void lan743x_mac_close(struct lan743x_adapter *adapter)
  733. {
  734. u32 temp;
  735. temp = lan743x_csr_read(adapter, MAC_TX);
  736. temp &= ~MAC_TX_TXEN_;
  737. lan743x_csr_write(adapter, MAC_TX, temp);
  738. lan743x_csr_wait_for_bit(adapter, MAC_TX, MAC_TX_TXD_,
  739. 1, 1000, 20000, 100);
  740. temp = lan743x_csr_read(adapter, MAC_RX);
  741. temp &= ~MAC_RX_RXEN_;
  742. lan743x_csr_write(adapter, MAC_RX, temp);
  743. lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_,
  744. 1, 1000, 20000, 100);
  745. }
  746. static void lan743x_mac_flow_ctrl_set_enables(struct lan743x_adapter *adapter,
  747. bool tx_enable, bool rx_enable)
  748. {
  749. u32 flow_setting = 0;
  750. /* set maximum pause time because when fifo space frees
  751. * up a zero value pause frame will be sent to release the pause
  752. */
  753. flow_setting = MAC_FLOW_CR_FCPT_MASK_;
  754. if (tx_enable)
  755. flow_setting |= MAC_FLOW_CR_TX_FCEN_;
  756. if (rx_enable)
  757. flow_setting |= MAC_FLOW_CR_RX_FCEN_;
  758. lan743x_csr_write(adapter, MAC_FLOW, flow_setting);
  759. }
  760. static int lan743x_mac_set_mtu(struct lan743x_adapter *adapter, int new_mtu)
  761. {
  762. int enabled = 0;
  763. u32 mac_rx = 0;
  764. mac_rx = lan743x_csr_read(adapter, MAC_RX);
  765. if (mac_rx & MAC_RX_RXEN_) {
  766. enabled = 1;
  767. if (mac_rx & MAC_RX_RXD_) {
  768. lan743x_csr_write(adapter, MAC_RX, mac_rx);
  769. mac_rx &= ~MAC_RX_RXD_;
  770. }
  771. mac_rx &= ~MAC_RX_RXEN_;
  772. lan743x_csr_write(adapter, MAC_RX, mac_rx);
  773. lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_,
  774. 1, 1000, 20000, 100);
  775. lan743x_csr_write(adapter, MAC_RX, mac_rx | MAC_RX_RXD_);
  776. }
  777. mac_rx &= ~(MAC_RX_MAX_SIZE_MASK_);
  778. mac_rx |= (((new_mtu + ETH_HLEN + 4) << MAC_RX_MAX_SIZE_SHIFT_) &
  779. MAC_RX_MAX_SIZE_MASK_);
  780. lan743x_csr_write(adapter, MAC_RX, mac_rx);
  781. if (enabled) {
  782. mac_rx |= MAC_RX_RXEN_;
  783. lan743x_csr_write(adapter, MAC_RX, mac_rx);
  784. }
  785. return 0;
  786. }
  787. /* PHY */
  788. static int lan743x_phy_reset(struct lan743x_adapter *adapter)
  789. {
  790. u32 data;
  791. /* Only called with in probe, and before mdiobus_register */
  792. data = lan743x_csr_read(adapter, PMT_CTL);
  793. data |= PMT_CTL_ETH_PHY_RST_;
  794. lan743x_csr_write(adapter, PMT_CTL, data);
  795. return readx_poll_timeout(LAN743X_CSR_READ_OP, PMT_CTL, data,
  796. (!(data & PMT_CTL_ETH_PHY_RST_) &&
  797. (data & PMT_CTL_READY_)),
  798. 50000, 1000000);
  799. }
  800. static void lan743x_phy_update_flowcontrol(struct lan743x_adapter *adapter,
  801. u8 duplex, u16 local_adv,
  802. u16 remote_adv)
  803. {
  804. struct lan743x_phy *phy = &adapter->phy;
  805. u8 cap;
  806. if (phy->fc_autoneg)
  807. cap = mii_resolve_flowctrl_fdx(local_adv, remote_adv);
  808. else
  809. cap = phy->fc_request_control;
  810. lan743x_mac_flow_ctrl_set_enables(adapter,
  811. cap & FLOW_CTRL_TX,
  812. cap & FLOW_CTRL_RX);
  813. }
  814. static int lan743x_phy_init(struct lan743x_adapter *adapter)
  815. {
  816. return lan743x_phy_reset(adapter);
  817. }
  818. static void lan743x_phy_link_status_change(struct net_device *netdev)
  819. {
  820. struct lan743x_adapter *adapter = netdev_priv(netdev);
  821. struct phy_device *phydev = netdev->phydev;
  822. phy_print_status(phydev);
  823. if (phydev->state == PHY_RUNNING) {
  824. struct ethtool_link_ksettings ksettings;
  825. int remote_advertisement = 0;
  826. int local_advertisement = 0;
  827. memset(&ksettings, 0, sizeof(ksettings));
  828. phy_ethtool_get_link_ksettings(netdev, &ksettings);
  829. local_advertisement = phy_read(phydev, MII_ADVERTISE);
  830. if (local_advertisement < 0)
  831. return;
  832. remote_advertisement = phy_read(phydev, MII_LPA);
  833. if (remote_advertisement < 0)
  834. return;
  835. lan743x_phy_update_flowcontrol(adapter,
  836. ksettings.base.duplex,
  837. local_advertisement,
  838. remote_advertisement);
  839. lan743x_ptp_update_latency(adapter, ksettings.base.speed);
  840. }
  841. }
  842. static void lan743x_phy_close(struct lan743x_adapter *adapter)
  843. {
  844. struct net_device *netdev = adapter->netdev;
  845. phy_stop(netdev->phydev);
  846. phy_disconnect(netdev->phydev);
  847. netdev->phydev = NULL;
  848. }
  849. static int lan743x_phy_open(struct lan743x_adapter *adapter)
  850. {
  851. struct lan743x_phy *phy = &adapter->phy;
  852. struct phy_device *phydev;
  853. struct net_device *netdev;
  854. int ret = -EIO;
  855. u32 mii_adv;
  856. netdev = adapter->netdev;
  857. phydev = phy_find_first(adapter->mdiobus);
  858. if (!phydev)
  859. goto return_error;
  860. ret = phy_connect_direct(netdev, phydev,
  861. lan743x_phy_link_status_change,
  862. PHY_INTERFACE_MODE_GMII);
  863. if (ret)
  864. goto return_error;
  865. /* MAC doesn't support 1000T Half */
  866. phydev->supported &= ~SUPPORTED_1000baseT_Half;
  867. /* support both flow controls */
  868. phy->fc_request_control = (FLOW_CTRL_RX | FLOW_CTRL_TX);
  869. phydev->advertising &= ~(ADVERTISED_Pause | ADVERTISED_Asym_Pause);
  870. mii_adv = (u32)mii_advertise_flowctrl(phy->fc_request_control);
  871. phydev->advertising |= mii_adv_to_ethtool_adv_t(mii_adv);
  872. phy->fc_autoneg = phydev->autoneg;
  873. phy_start(phydev);
  874. phy_start_aneg(phydev);
  875. return 0;
  876. return_error:
  877. return ret;
  878. }
  879. static void lan743x_rfe_open(struct lan743x_adapter *adapter)
  880. {
  881. lan743x_csr_write(adapter, RFE_RSS_CFG,
  882. RFE_RSS_CFG_UDP_IPV6_EX_ |
  883. RFE_RSS_CFG_TCP_IPV6_EX_ |
  884. RFE_RSS_CFG_IPV6_EX_ |
  885. RFE_RSS_CFG_UDP_IPV6_ |
  886. RFE_RSS_CFG_TCP_IPV6_ |
  887. RFE_RSS_CFG_IPV6_ |
  888. RFE_RSS_CFG_UDP_IPV4_ |
  889. RFE_RSS_CFG_TCP_IPV4_ |
  890. RFE_RSS_CFG_IPV4_ |
  891. RFE_RSS_CFG_VALID_HASH_BITS_ |
  892. RFE_RSS_CFG_RSS_QUEUE_ENABLE_ |
  893. RFE_RSS_CFG_RSS_HASH_STORE_ |
  894. RFE_RSS_CFG_RSS_ENABLE_);
  895. }
  896. static void lan743x_rfe_update_mac_address(struct lan743x_adapter *adapter)
  897. {
  898. u8 *mac_addr;
  899. u32 mac_addr_hi = 0;
  900. u32 mac_addr_lo = 0;
  901. /* Add mac address to perfect Filter */
  902. mac_addr = adapter->mac_address;
  903. mac_addr_lo = ((((u32)(mac_addr[0])) << 0) |
  904. (((u32)(mac_addr[1])) << 8) |
  905. (((u32)(mac_addr[2])) << 16) |
  906. (((u32)(mac_addr[3])) << 24));
  907. mac_addr_hi = ((((u32)(mac_addr[4])) << 0) |
  908. (((u32)(mac_addr[5])) << 8));
  909. lan743x_csr_write(adapter, RFE_ADDR_FILT_LO(0), mac_addr_lo);
  910. lan743x_csr_write(adapter, RFE_ADDR_FILT_HI(0),
  911. mac_addr_hi | RFE_ADDR_FILT_HI_VALID_);
  912. }
  913. static void lan743x_rfe_set_multicast(struct lan743x_adapter *adapter)
  914. {
  915. struct net_device *netdev = adapter->netdev;
  916. u32 hash_table[DP_SEL_VHF_HASH_LEN];
  917. u32 rfctl;
  918. u32 data;
  919. rfctl = lan743x_csr_read(adapter, RFE_CTL);
  920. rfctl &= ~(RFE_CTL_AU_ | RFE_CTL_AM_ |
  921. RFE_CTL_DA_PERFECT_ | RFE_CTL_MCAST_HASH_);
  922. rfctl |= RFE_CTL_AB_;
  923. if (netdev->flags & IFF_PROMISC) {
  924. rfctl |= RFE_CTL_AM_ | RFE_CTL_AU_;
  925. } else {
  926. if (netdev->flags & IFF_ALLMULTI)
  927. rfctl |= RFE_CTL_AM_;
  928. }
  929. memset(hash_table, 0, DP_SEL_VHF_HASH_LEN * sizeof(u32));
  930. if (netdev_mc_count(netdev)) {
  931. struct netdev_hw_addr *ha;
  932. int i;
  933. rfctl |= RFE_CTL_DA_PERFECT_;
  934. i = 1;
  935. netdev_for_each_mc_addr(ha, netdev) {
  936. /* set first 32 into Perfect Filter */
  937. if (i < 33) {
  938. lan743x_csr_write(adapter,
  939. RFE_ADDR_FILT_HI(i), 0);
  940. data = ha->addr[3];
  941. data = ha->addr[2] | (data << 8);
  942. data = ha->addr[1] | (data << 8);
  943. data = ha->addr[0] | (data << 8);
  944. lan743x_csr_write(adapter,
  945. RFE_ADDR_FILT_LO(i), data);
  946. data = ha->addr[5];
  947. data = ha->addr[4] | (data << 8);
  948. data |= RFE_ADDR_FILT_HI_VALID_;
  949. lan743x_csr_write(adapter,
  950. RFE_ADDR_FILT_HI(i), data);
  951. } else {
  952. u32 bitnum = (ether_crc(ETH_ALEN, ha->addr) >>
  953. 23) & 0x1FF;
  954. hash_table[bitnum / 32] |= (1 << (bitnum % 32));
  955. rfctl |= RFE_CTL_MCAST_HASH_;
  956. }
  957. i++;
  958. }
  959. }
  960. lan743x_dp_write(adapter, DP_SEL_RFE_RAM,
  961. DP_SEL_VHF_VLAN_LEN,
  962. DP_SEL_VHF_HASH_LEN, hash_table);
  963. lan743x_csr_write(adapter, RFE_CTL, rfctl);
  964. }
  965. static int lan743x_dmac_init(struct lan743x_adapter *adapter)
  966. {
  967. u32 data = 0;
  968. lan743x_csr_write(adapter, DMAC_CMD, DMAC_CMD_SWR_);
  969. lan743x_csr_wait_for_bit(adapter, DMAC_CMD, DMAC_CMD_SWR_,
  970. 0, 1000, 20000, 100);
  971. switch (DEFAULT_DMA_DESCRIPTOR_SPACING) {
  972. case DMA_DESCRIPTOR_SPACING_16:
  973. data = DMAC_CFG_MAX_DSPACE_16_;
  974. break;
  975. case DMA_DESCRIPTOR_SPACING_32:
  976. data = DMAC_CFG_MAX_DSPACE_32_;
  977. break;
  978. case DMA_DESCRIPTOR_SPACING_64:
  979. data = DMAC_CFG_MAX_DSPACE_64_;
  980. break;
  981. case DMA_DESCRIPTOR_SPACING_128:
  982. data = DMAC_CFG_MAX_DSPACE_128_;
  983. break;
  984. default:
  985. return -EPERM;
  986. }
  987. if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0))
  988. data |= DMAC_CFG_COAL_EN_;
  989. data |= DMAC_CFG_CH_ARB_SEL_RX_HIGH_;
  990. data |= DMAC_CFG_MAX_READ_REQ_SET_(6);
  991. lan743x_csr_write(adapter, DMAC_CFG, data);
  992. data = DMAC_COAL_CFG_TIMER_LIMIT_SET_(1);
  993. data |= DMAC_COAL_CFG_TIMER_TX_START_;
  994. data |= DMAC_COAL_CFG_FLUSH_INTS_;
  995. data |= DMAC_COAL_CFG_INT_EXIT_COAL_;
  996. data |= DMAC_COAL_CFG_CSR_EXIT_COAL_;
  997. data |= DMAC_COAL_CFG_TX_THRES_SET_(0x0A);
  998. data |= DMAC_COAL_CFG_RX_THRES_SET_(0x0C);
  999. lan743x_csr_write(adapter, DMAC_COAL_CFG, data);
  1000. data = DMAC_OBFF_TX_THRES_SET_(0x08);
  1001. data |= DMAC_OBFF_RX_THRES_SET_(0x0A);
  1002. lan743x_csr_write(adapter, DMAC_OBFF_CFG, data);
  1003. return 0;
  1004. }
  1005. static int lan743x_dmac_tx_get_state(struct lan743x_adapter *adapter,
  1006. int tx_channel)
  1007. {
  1008. u32 dmac_cmd = 0;
  1009. dmac_cmd = lan743x_csr_read(adapter, DMAC_CMD);
  1010. return DMAC_CHANNEL_STATE_SET((dmac_cmd &
  1011. DMAC_CMD_START_T_(tx_channel)),
  1012. (dmac_cmd &
  1013. DMAC_CMD_STOP_T_(tx_channel)));
  1014. }
  1015. static int lan743x_dmac_tx_wait_till_stopped(struct lan743x_adapter *adapter,
  1016. int tx_channel)
  1017. {
  1018. int timeout = 100;
  1019. int result = 0;
  1020. while (timeout &&
  1021. ((result = lan743x_dmac_tx_get_state(adapter, tx_channel)) ==
  1022. DMAC_CHANNEL_STATE_STOP_PENDING)) {
  1023. usleep_range(1000, 20000);
  1024. timeout--;
  1025. }
  1026. if (result == DMAC_CHANNEL_STATE_STOP_PENDING)
  1027. result = -ENODEV;
  1028. return result;
  1029. }
  1030. static int lan743x_dmac_rx_get_state(struct lan743x_adapter *adapter,
  1031. int rx_channel)
  1032. {
  1033. u32 dmac_cmd = 0;
  1034. dmac_cmd = lan743x_csr_read(adapter, DMAC_CMD);
  1035. return DMAC_CHANNEL_STATE_SET((dmac_cmd &
  1036. DMAC_CMD_START_R_(rx_channel)),
  1037. (dmac_cmd &
  1038. DMAC_CMD_STOP_R_(rx_channel)));
  1039. }
  1040. static int lan743x_dmac_rx_wait_till_stopped(struct lan743x_adapter *adapter,
  1041. int rx_channel)
  1042. {
  1043. int timeout = 100;
  1044. int result = 0;
  1045. while (timeout &&
  1046. ((result = lan743x_dmac_rx_get_state(adapter, rx_channel)) ==
  1047. DMAC_CHANNEL_STATE_STOP_PENDING)) {
  1048. usleep_range(1000, 20000);
  1049. timeout--;
  1050. }
  1051. if (result == DMAC_CHANNEL_STATE_STOP_PENDING)
  1052. result = -ENODEV;
  1053. return result;
  1054. }
  1055. static void lan743x_tx_release_desc(struct lan743x_tx *tx,
  1056. int descriptor_index, bool cleanup)
  1057. {
  1058. struct lan743x_tx_buffer_info *buffer_info = NULL;
  1059. struct lan743x_tx_descriptor *descriptor = NULL;
  1060. u32 descriptor_type = 0;
  1061. bool ignore_sync;
  1062. descriptor = &tx->ring_cpu_ptr[descriptor_index];
  1063. buffer_info = &tx->buffer_info[descriptor_index];
  1064. if (!(buffer_info->flags & TX_BUFFER_INFO_FLAG_ACTIVE))
  1065. goto done;
  1066. descriptor_type = (descriptor->data0) &
  1067. TX_DESC_DATA0_DTYPE_MASK_;
  1068. if (descriptor_type == TX_DESC_DATA0_DTYPE_DATA_)
  1069. goto clean_up_data_descriptor;
  1070. else
  1071. goto clear_active;
  1072. clean_up_data_descriptor:
  1073. if (buffer_info->dma_ptr) {
  1074. if (buffer_info->flags &
  1075. TX_BUFFER_INFO_FLAG_SKB_FRAGMENT) {
  1076. dma_unmap_page(&tx->adapter->pdev->dev,
  1077. buffer_info->dma_ptr,
  1078. buffer_info->buffer_length,
  1079. DMA_TO_DEVICE);
  1080. } else {
  1081. dma_unmap_single(&tx->adapter->pdev->dev,
  1082. buffer_info->dma_ptr,
  1083. buffer_info->buffer_length,
  1084. DMA_TO_DEVICE);
  1085. }
  1086. buffer_info->dma_ptr = 0;
  1087. buffer_info->buffer_length = 0;
  1088. }
  1089. if (!buffer_info->skb)
  1090. goto clear_active;
  1091. if (!(buffer_info->flags & TX_BUFFER_INFO_FLAG_TIMESTAMP_REQUESTED)) {
  1092. dev_kfree_skb(buffer_info->skb);
  1093. goto clear_skb;
  1094. }
  1095. if (cleanup) {
  1096. lan743x_ptp_unrequest_tx_timestamp(tx->adapter);
  1097. dev_kfree_skb(buffer_info->skb);
  1098. } else {
  1099. ignore_sync = (buffer_info->flags &
  1100. TX_BUFFER_INFO_FLAG_IGNORE_SYNC) != 0;
  1101. lan743x_ptp_tx_timestamp_skb(tx->adapter,
  1102. buffer_info->skb, ignore_sync);
  1103. }
  1104. clear_skb:
  1105. buffer_info->skb = NULL;
  1106. clear_active:
  1107. buffer_info->flags &= ~TX_BUFFER_INFO_FLAG_ACTIVE;
  1108. done:
  1109. memset(buffer_info, 0, sizeof(*buffer_info));
  1110. memset(descriptor, 0, sizeof(*descriptor));
  1111. }
  1112. static int lan743x_tx_next_index(struct lan743x_tx *tx, int index)
  1113. {
  1114. return ((++index) % tx->ring_size);
  1115. }
  1116. static void lan743x_tx_release_completed_descriptors(struct lan743x_tx *tx)
  1117. {
  1118. while ((*tx->head_cpu_ptr) != (tx->last_head)) {
  1119. lan743x_tx_release_desc(tx, tx->last_head, false);
  1120. tx->last_head = lan743x_tx_next_index(tx, tx->last_head);
  1121. }
  1122. }
  1123. static void lan743x_tx_release_all_descriptors(struct lan743x_tx *tx)
  1124. {
  1125. u32 original_head = 0;
  1126. original_head = tx->last_head;
  1127. do {
  1128. lan743x_tx_release_desc(tx, tx->last_head, true);
  1129. tx->last_head = lan743x_tx_next_index(tx, tx->last_head);
  1130. } while (tx->last_head != original_head);
  1131. memset(tx->ring_cpu_ptr, 0,
  1132. sizeof(*tx->ring_cpu_ptr) * (tx->ring_size));
  1133. memset(tx->buffer_info, 0,
  1134. sizeof(*tx->buffer_info) * (tx->ring_size));
  1135. }
  1136. static int lan743x_tx_get_desc_cnt(struct lan743x_tx *tx,
  1137. struct sk_buff *skb)
  1138. {
  1139. int result = 1; /* 1 for the main skb buffer */
  1140. int nr_frags = 0;
  1141. if (skb_is_gso(skb))
  1142. result++; /* requires an extension descriptor */
  1143. nr_frags = skb_shinfo(skb)->nr_frags;
  1144. result += nr_frags; /* 1 for each fragment buffer */
  1145. return result;
  1146. }
  1147. static int lan743x_tx_get_avail_desc(struct lan743x_tx *tx)
  1148. {
  1149. int last_head = tx->last_head;
  1150. int last_tail = tx->last_tail;
  1151. if (last_tail >= last_head)
  1152. return tx->ring_size - last_tail + last_head - 1;
  1153. else
  1154. return last_head - last_tail - 1;
  1155. }
  1156. void lan743x_tx_set_timestamping_mode(struct lan743x_tx *tx,
  1157. bool enable_timestamping,
  1158. bool enable_onestep_sync)
  1159. {
  1160. if (enable_timestamping)
  1161. tx->ts_flags |= TX_TS_FLAG_TIMESTAMPING_ENABLED;
  1162. else
  1163. tx->ts_flags &= ~TX_TS_FLAG_TIMESTAMPING_ENABLED;
  1164. if (enable_onestep_sync)
  1165. tx->ts_flags |= TX_TS_FLAG_ONE_STEP_SYNC;
  1166. else
  1167. tx->ts_flags &= ~TX_TS_FLAG_ONE_STEP_SYNC;
  1168. }
  1169. static int lan743x_tx_frame_start(struct lan743x_tx *tx,
  1170. unsigned char *first_buffer,
  1171. unsigned int first_buffer_length,
  1172. unsigned int frame_length,
  1173. bool time_stamp,
  1174. bool check_sum)
  1175. {
  1176. /* called only from within lan743x_tx_xmit_frame.
  1177. * assuming tx->ring_lock has already been acquired.
  1178. */
  1179. struct lan743x_tx_descriptor *tx_descriptor = NULL;
  1180. struct lan743x_tx_buffer_info *buffer_info = NULL;
  1181. struct lan743x_adapter *adapter = tx->adapter;
  1182. struct device *dev = &adapter->pdev->dev;
  1183. dma_addr_t dma_ptr;
  1184. tx->frame_flags |= TX_FRAME_FLAG_IN_PROGRESS;
  1185. tx->frame_first = tx->last_tail;
  1186. tx->frame_tail = tx->frame_first;
  1187. tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
  1188. buffer_info = &tx->buffer_info[tx->frame_tail];
  1189. dma_ptr = dma_map_single(dev, first_buffer, first_buffer_length,
  1190. DMA_TO_DEVICE);
  1191. if (dma_mapping_error(dev, dma_ptr))
  1192. return -ENOMEM;
  1193. tx_descriptor->data1 = DMA_ADDR_LOW32(dma_ptr);
  1194. tx_descriptor->data2 = DMA_ADDR_HIGH32(dma_ptr);
  1195. tx_descriptor->data3 = (frame_length << 16) &
  1196. TX_DESC_DATA3_FRAME_LENGTH_MSS_MASK_;
  1197. buffer_info->skb = NULL;
  1198. buffer_info->dma_ptr = dma_ptr;
  1199. buffer_info->buffer_length = first_buffer_length;
  1200. buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE;
  1201. tx->frame_data0 = (first_buffer_length &
  1202. TX_DESC_DATA0_BUF_LENGTH_MASK_) |
  1203. TX_DESC_DATA0_DTYPE_DATA_ |
  1204. TX_DESC_DATA0_FS_ |
  1205. TX_DESC_DATA0_FCS_;
  1206. if (time_stamp)
  1207. tx->frame_data0 |= TX_DESC_DATA0_TSE_;
  1208. if (check_sum)
  1209. tx->frame_data0 |= TX_DESC_DATA0_ICE_ |
  1210. TX_DESC_DATA0_IPE_ |
  1211. TX_DESC_DATA0_TPE_;
  1212. /* data0 will be programmed in one of other frame assembler functions */
  1213. return 0;
  1214. }
  1215. static void lan743x_tx_frame_add_lso(struct lan743x_tx *tx,
  1216. unsigned int frame_length)
  1217. {
  1218. /* called only from within lan743x_tx_xmit_frame.
  1219. * assuming tx->ring_lock has already been acquired.
  1220. */
  1221. struct lan743x_tx_descriptor *tx_descriptor = NULL;
  1222. struct lan743x_tx_buffer_info *buffer_info = NULL;
  1223. /* wrap up previous descriptor */
  1224. tx->frame_data0 |= TX_DESC_DATA0_EXT_;
  1225. tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
  1226. tx_descriptor->data0 = tx->frame_data0;
  1227. /* move to next descriptor */
  1228. tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail);
  1229. tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
  1230. buffer_info = &tx->buffer_info[tx->frame_tail];
  1231. /* add extension descriptor */
  1232. tx_descriptor->data1 = 0;
  1233. tx_descriptor->data2 = 0;
  1234. tx_descriptor->data3 = 0;
  1235. buffer_info->skb = NULL;
  1236. buffer_info->dma_ptr = 0;
  1237. buffer_info->buffer_length = 0;
  1238. buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE;
  1239. tx->frame_data0 = (frame_length & TX_DESC_DATA0_EXT_PAY_LENGTH_MASK_) |
  1240. TX_DESC_DATA0_DTYPE_EXT_ |
  1241. TX_DESC_DATA0_EXT_LSO_;
  1242. /* data0 will be programmed in one of other frame assembler functions */
  1243. }
  1244. static int lan743x_tx_frame_add_fragment(struct lan743x_tx *tx,
  1245. const struct skb_frag_struct *fragment,
  1246. unsigned int frame_length)
  1247. {
  1248. /* called only from within lan743x_tx_xmit_frame
  1249. * assuming tx->ring_lock has already been acquired
  1250. */
  1251. struct lan743x_tx_descriptor *tx_descriptor = NULL;
  1252. struct lan743x_tx_buffer_info *buffer_info = NULL;
  1253. struct lan743x_adapter *adapter = tx->adapter;
  1254. struct device *dev = &adapter->pdev->dev;
  1255. unsigned int fragment_length = 0;
  1256. dma_addr_t dma_ptr;
  1257. fragment_length = skb_frag_size(fragment);
  1258. if (!fragment_length)
  1259. return 0;
  1260. /* wrap up previous descriptor */
  1261. tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
  1262. tx_descriptor->data0 = tx->frame_data0;
  1263. /* move to next descriptor */
  1264. tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail);
  1265. tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
  1266. buffer_info = &tx->buffer_info[tx->frame_tail];
  1267. dma_ptr = skb_frag_dma_map(dev, fragment,
  1268. 0, fragment_length,
  1269. DMA_TO_DEVICE);
  1270. if (dma_mapping_error(dev, dma_ptr)) {
  1271. int desc_index;
  1272. /* cleanup all previously setup descriptors */
  1273. desc_index = tx->frame_first;
  1274. while (desc_index != tx->frame_tail) {
  1275. lan743x_tx_release_desc(tx, desc_index, true);
  1276. desc_index = lan743x_tx_next_index(tx, desc_index);
  1277. }
  1278. dma_wmb();
  1279. tx->frame_flags &= ~TX_FRAME_FLAG_IN_PROGRESS;
  1280. tx->frame_first = 0;
  1281. tx->frame_data0 = 0;
  1282. tx->frame_tail = 0;
  1283. return -ENOMEM;
  1284. }
  1285. tx_descriptor->data1 = DMA_ADDR_LOW32(dma_ptr);
  1286. tx_descriptor->data2 = DMA_ADDR_HIGH32(dma_ptr);
  1287. tx_descriptor->data3 = (frame_length << 16) &
  1288. TX_DESC_DATA3_FRAME_LENGTH_MSS_MASK_;
  1289. buffer_info->skb = NULL;
  1290. buffer_info->dma_ptr = dma_ptr;
  1291. buffer_info->buffer_length = fragment_length;
  1292. buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE;
  1293. buffer_info->flags |= TX_BUFFER_INFO_FLAG_SKB_FRAGMENT;
  1294. tx->frame_data0 = (fragment_length & TX_DESC_DATA0_BUF_LENGTH_MASK_) |
  1295. TX_DESC_DATA0_DTYPE_DATA_ |
  1296. TX_DESC_DATA0_FCS_;
  1297. /* data0 will be programmed in one of other frame assembler functions */
  1298. return 0;
  1299. }
  1300. static void lan743x_tx_frame_end(struct lan743x_tx *tx,
  1301. struct sk_buff *skb,
  1302. bool time_stamp,
  1303. bool ignore_sync)
  1304. {
  1305. /* called only from within lan743x_tx_xmit_frame
  1306. * assuming tx->ring_lock has already been acquired
  1307. */
  1308. struct lan743x_tx_descriptor *tx_descriptor = NULL;
  1309. struct lan743x_tx_buffer_info *buffer_info = NULL;
  1310. struct lan743x_adapter *adapter = tx->adapter;
  1311. u32 tx_tail_flags = 0;
  1312. /* wrap up previous descriptor */
  1313. tx->frame_data0 |= TX_DESC_DATA0_LS_;
  1314. tx->frame_data0 |= TX_DESC_DATA0_IOC_;
  1315. tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
  1316. buffer_info = &tx->buffer_info[tx->frame_tail];
  1317. buffer_info->skb = skb;
  1318. if (time_stamp)
  1319. buffer_info->flags |= TX_BUFFER_INFO_FLAG_TIMESTAMP_REQUESTED;
  1320. if (ignore_sync)
  1321. buffer_info->flags |= TX_BUFFER_INFO_FLAG_IGNORE_SYNC;
  1322. tx_descriptor->data0 = tx->frame_data0;
  1323. tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail);
  1324. tx->last_tail = tx->frame_tail;
  1325. dma_wmb();
  1326. if (tx->vector_flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET)
  1327. tx_tail_flags |= TX_TAIL_SET_TOP_INT_VEC_EN_;
  1328. if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET)
  1329. tx_tail_flags |= TX_TAIL_SET_DMAC_INT_EN_ |
  1330. TX_TAIL_SET_TOP_INT_EN_;
  1331. lan743x_csr_write(adapter, TX_TAIL(tx->channel_number),
  1332. tx_tail_flags | tx->frame_tail);
  1333. tx->frame_flags &= ~TX_FRAME_FLAG_IN_PROGRESS;
  1334. }
  1335. static netdev_tx_t lan743x_tx_xmit_frame(struct lan743x_tx *tx,
  1336. struct sk_buff *skb)
  1337. {
  1338. int required_number_of_descriptors = 0;
  1339. unsigned int start_frame_length = 0;
  1340. unsigned int frame_length = 0;
  1341. unsigned int head_length = 0;
  1342. unsigned long irq_flags = 0;
  1343. bool do_timestamp = false;
  1344. bool ignore_sync = false;
  1345. int nr_frags = 0;
  1346. bool gso = false;
  1347. int j;
  1348. required_number_of_descriptors = lan743x_tx_get_desc_cnt(tx, skb);
  1349. spin_lock_irqsave(&tx->ring_lock, irq_flags);
  1350. if (required_number_of_descriptors >
  1351. lan743x_tx_get_avail_desc(tx)) {
  1352. if (required_number_of_descriptors > (tx->ring_size - 1)) {
  1353. dev_kfree_skb(skb);
  1354. } else {
  1355. /* save to overflow buffer */
  1356. tx->overflow_skb = skb;
  1357. netif_stop_queue(tx->adapter->netdev);
  1358. }
  1359. goto unlock;
  1360. }
  1361. /* space available, transmit skb */
  1362. if ((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
  1363. (tx->ts_flags & TX_TS_FLAG_TIMESTAMPING_ENABLED) &&
  1364. (lan743x_ptp_request_tx_timestamp(tx->adapter))) {
  1365. skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
  1366. do_timestamp = true;
  1367. if (tx->ts_flags & TX_TS_FLAG_ONE_STEP_SYNC)
  1368. ignore_sync = true;
  1369. }
  1370. head_length = skb_headlen(skb);
  1371. frame_length = skb_pagelen(skb);
  1372. nr_frags = skb_shinfo(skb)->nr_frags;
  1373. start_frame_length = frame_length;
  1374. gso = skb_is_gso(skb);
  1375. if (gso) {
  1376. start_frame_length = max(skb_shinfo(skb)->gso_size,
  1377. (unsigned short)8);
  1378. }
  1379. if (lan743x_tx_frame_start(tx,
  1380. skb->data, head_length,
  1381. start_frame_length,
  1382. do_timestamp,
  1383. skb->ip_summed == CHECKSUM_PARTIAL)) {
  1384. dev_kfree_skb(skb);
  1385. goto unlock;
  1386. }
  1387. if (gso)
  1388. lan743x_tx_frame_add_lso(tx, frame_length);
  1389. if (nr_frags <= 0)
  1390. goto finish;
  1391. for (j = 0; j < nr_frags; j++) {
  1392. const struct skb_frag_struct *frag;
  1393. frag = &(skb_shinfo(skb)->frags[j]);
  1394. if (lan743x_tx_frame_add_fragment(tx, frag, frame_length)) {
  1395. /* upon error no need to call
  1396. * lan743x_tx_frame_end
  1397. * frame assembler clean up was performed inside
  1398. * lan743x_tx_frame_add_fragment
  1399. */
  1400. dev_kfree_skb(skb);
  1401. goto unlock;
  1402. }
  1403. }
  1404. finish:
  1405. lan743x_tx_frame_end(tx, skb, do_timestamp, ignore_sync);
  1406. unlock:
  1407. spin_unlock_irqrestore(&tx->ring_lock, irq_flags);
  1408. return NETDEV_TX_OK;
  1409. }
  1410. static int lan743x_tx_napi_poll(struct napi_struct *napi, int weight)
  1411. {
  1412. struct lan743x_tx *tx = container_of(napi, struct lan743x_tx, napi);
  1413. struct lan743x_adapter *adapter = tx->adapter;
  1414. bool start_transmitter = false;
  1415. unsigned long irq_flags = 0;
  1416. u32 ioc_bit = 0;
  1417. u32 int_sts = 0;
  1418. ioc_bit = DMAC_INT_BIT_TX_IOC_(tx->channel_number);
  1419. int_sts = lan743x_csr_read(adapter, DMAC_INT_STS);
  1420. if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C)
  1421. lan743x_csr_write(adapter, DMAC_INT_STS, ioc_bit);
  1422. spin_lock_irqsave(&tx->ring_lock, irq_flags);
  1423. /* clean up tx ring */
  1424. lan743x_tx_release_completed_descriptors(tx);
  1425. if (netif_queue_stopped(adapter->netdev)) {
  1426. if (tx->overflow_skb) {
  1427. if (lan743x_tx_get_desc_cnt(tx, tx->overflow_skb) <=
  1428. lan743x_tx_get_avail_desc(tx))
  1429. start_transmitter = true;
  1430. } else {
  1431. netif_wake_queue(adapter->netdev);
  1432. }
  1433. }
  1434. spin_unlock_irqrestore(&tx->ring_lock, irq_flags);
  1435. if (start_transmitter) {
  1436. /* space is now available, transmit overflow skb */
  1437. lan743x_tx_xmit_frame(tx, tx->overflow_skb);
  1438. tx->overflow_skb = NULL;
  1439. netif_wake_queue(adapter->netdev);
  1440. }
  1441. if (!napi_complete_done(napi, weight))
  1442. goto done;
  1443. /* enable isr */
  1444. lan743x_csr_write(adapter, INT_EN_SET,
  1445. INT_BIT_DMA_TX_(tx->channel_number));
  1446. lan743x_csr_read(adapter, INT_STS);
  1447. done:
  1448. return weight;
  1449. }
  1450. static void lan743x_tx_ring_cleanup(struct lan743x_tx *tx)
  1451. {
  1452. if (tx->head_cpu_ptr) {
  1453. pci_free_consistent(tx->adapter->pdev,
  1454. sizeof(*tx->head_cpu_ptr),
  1455. (void *)(tx->head_cpu_ptr),
  1456. tx->head_dma_ptr);
  1457. tx->head_cpu_ptr = NULL;
  1458. tx->head_dma_ptr = 0;
  1459. }
  1460. kfree(tx->buffer_info);
  1461. tx->buffer_info = NULL;
  1462. if (tx->ring_cpu_ptr) {
  1463. pci_free_consistent(tx->adapter->pdev,
  1464. tx->ring_allocation_size,
  1465. tx->ring_cpu_ptr,
  1466. tx->ring_dma_ptr);
  1467. tx->ring_allocation_size = 0;
  1468. tx->ring_cpu_ptr = NULL;
  1469. tx->ring_dma_ptr = 0;
  1470. }
  1471. tx->ring_size = 0;
  1472. }
  1473. static int lan743x_tx_ring_init(struct lan743x_tx *tx)
  1474. {
  1475. size_t ring_allocation_size = 0;
  1476. void *cpu_ptr = NULL;
  1477. dma_addr_t dma_ptr;
  1478. int ret = -ENOMEM;
  1479. tx->ring_size = LAN743X_TX_RING_SIZE;
  1480. if (tx->ring_size & ~TX_CFG_B_TX_RING_LEN_MASK_) {
  1481. ret = -EINVAL;
  1482. goto cleanup;
  1483. }
  1484. ring_allocation_size = ALIGN(tx->ring_size *
  1485. sizeof(struct lan743x_tx_descriptor),
  1486. PAGE_SIZE);
  1487. dma_ptr = 0;
  1488. cpu_ptr = pci_zalloc_consistent(tx->adapter->pdev,
  1489. ring_allocation_size, &dma_ptr);
  1490. if (!cpu_ptr) {
  1491. ret = -ENOMEM;
  1492. goto cleanup;
  1493. }
  1494. tx->ring_allocation_size = ring_allocation_size;
  1495. tx->ring_cpu_ptr = (struct lan743x_tx_descriptor *)cpu_ptr;
  1496. tx->ring_dma_ptr = dma_ptr;
  1497. cpu_ptr = kcalloc(tx->ring_size, sizeof(*tx->buffer_info), GFP_KERNEL);
  1498. if (!cpu_ptr) {
  1499. ret = -ENOMEM;
  1500. goto cleanup;
  1501. }
  1502. tx->buffer_info = (struct lan743x_tx_buffer_info *)cpu_ptr;
  1503. dma_ptr = 0;
  1504. cpu_ptr = pci_zalloc_consistent(tx->adapter->pdev,
  1505. sizeof(*tx->head_cpu_ptr), &dma_ptr);
  1506. if (!cpu_ptr) {
  1507. ret = -ENOMEM;
  1508. goto cleanup;
  1509. }
  1510. tx->head_cpu_ptr = cpu_ptr;
  1511. tx->head_dma_ptr = dma_ptr;
  1512. if (tx->head_dma_ptr & 0x3) {
  1513. ret = -ENOMEM;
  1514. goto cleanup;
  1515. }
  1516. return 0;
  1517. cleanup:
  1518. lan743x_tx_ring_cleanup(tx);
  1519. return ret;
  1520. }
  1521. static void lan743x_tx_close(struct lan743x_tx *tx)
  1522. {
  1523. struct lan743x_adapter *adapter = tx->adapter;
  1524. lan743x_csr_write(adapter,
  1525. DMAC_CMD,
  1526. DMAC_CMD_STOP_T_(tx->channel_number));
  1527. lan743x_dmac_tx_wait_till_stopped(adapter, tx->channel_number);
  1528. lan743x_csr_write(adapter,
  1529. DMAC_INT_EN_CLR,
  1530. DMAC_INT_BIT_TX_IOC_(tx->channel_number));
  1531. lan743x_csr_write(adapter, INT_EN_CLR,
  1532. INT_BIT_DMA_TX_(tx->channel_number));
  1533. napi_disable(&tx->napi);
  1534. netif_napi_del(&tx->napi);
  1535. lan743x_csr_write(adapter, FCT_TX_CTL,
  1536. FCT_TX_CTL_DIS_(tx->channel_number));
  1537. lan743x_csr_wait_for_bit(adapter, FCT_TX_CTL,
  1538. FCT_TX_CTL_EN_(tx->channel_number),
  1539. 0, 1000, 20000, 100);
  1540. lan743x_tx_release_all_descriptors(tx);
  1541. if (tx->overflow_skb) {
  1542. dev_kfree_skb(tx->overflow_skb);
  1543. tx->overflow_skb = NULL;
  1544. }
  1545. lan743x_tx_ring_cleanup(tx);
  1546. }
  1547. static int lan743x_tx_open(struct lan743x_tx *tx)
  1548. {
  1549. struct lan743x_adapter *adapter = NULL;
  1550. u32 data = 0;
  1551. int ret;
  1552. adapter = tx->adapter;
  1553. ret = lan743x_tx_ring_init(tx);
  1554. if (ret)
  1555. return ret;
  1556. /* initialize fifo */
  1557. lan743x_csr_write(adapter, FCT_TX_CTL,
  1558. FCT_TX_CTL_RESET_(tx->channel_number));
  1559. lan743x_csr_wait_for_bit(adapter, FCT_TX_CTL,
  1560. FCT_TX_CTL_RESET_(tx->channel_number),
  1561. 0, 1000, 20000, 100);
  1562. /* enable fifo */
  1563. lan743x_csr_write(adapter, FCT_TX_CTL,
  1564. FCT_TX_CTL_EN_(tx->channel_number));
  1565. /* reset tx channel */
  1566. lan743x_csr_write(adapter, DMAC_CMD,
  1567. DMAC_CMD_TX_SWR_(tx->channel_number));
  1568. lan743x_csr_wait_for_bit(adapter, DMAC_CMD,
  1569. DMAC_CMD_TX_SWR_(tx->channel_number),
  1570. 0, 1000, 20000, 100);
  1571. /* Write TX_BASE_ADDR */
  1572. lan743x_csr_write(adapter,
  1573. TX_BASE_ADDRH(tx->channel_number),
  1574. DMA_ADDR_HIGH32(tx->ring_dma_ptr));
  1575. lan743x_csr_write(adapter,
  1576. TX_BASE_ADDRL(tx->channel_number),
  1577. DMA_ADDR_LOW32(tx->ring_dma_ptr));
  1578. /* Write TX_CFG_B */
  1579. data = lan743x_csr_read(adapter, TX_CFG_B(tx->channel_number));
  1580. data &= ~TX_CFG_B_TX_RING_LEN_MASK_;
  1581. data |= ((tx->ring_size) & TX_CFG_B_TX_RING_LEN_MASK_);
  1582. if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0))
  1583. data |= TX_CFG_B_TDMABL_512_;
  1584. lan743x_csr_write(adapter, TX_CFG_B(tx->channel_number), data);
  1585. /* Write TX_CFG_A */
  1586. data = TX_CFG_A_TX_TMR_HPWB_SEL_IOC_ | TX_CFG_A_TX_HP_WB_EN_;
  1587. if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) {
  1588. data |= TX_CFG_A_TX_HP_WB_ON_INT_TMR_;
  1589. data |= TX_CFG_A_TX_PF_THRES_SET_(0x10);
  1590. data |= TX_CFG_A_TX_PF_PRI_THRES_SET_(0x04);
  1591. data |= TX_CFG_A_TX_HP_WB_THRES_SET_(0x07);
  1592. }
  1593. lan743x_csr_write(adapter, TX_CFG_A(tx->channel_number), data);
  1594. /* Write TX_HEAD_WRITEBACK_ADDR */
  1595. lan743x_csr_write(adapter,
  1596. TX_HEAD_WRITEBACK_ADDRH(tx->channel_number),
  1597. DMA_ADDR_HIGH32(tx->head_dma_ptr));
  1598. lan743x_csr_write(adapter,
  1599. TX_HEAD_WRITEBACK_ADDRL(tx->channel_number),
  1600. DMA_ADDR_LOW32(tx->head_dma_ptr));
  1601. /* set last head */
  1602. tx->last_head = lan743x_csr_read(adapter, TX_HEAD(tx->channel_number));
  1603. /* write TX_TAIL */
  1604. tx->last_tail = 0;
  1605. lan743x_csr_write(adapter, TX_TAIL(tx->channel_number),
  1606. (u32)(tx->last_tail));
  1607. tx->vector_flags = lan743x_intr_get_vector_flags(adapter,
  1608. INT_BIT_DMA_TX_
  1609. (tx->channel_number));
  1610. netif_napi_add(adapter->netdev,
  1611. &tx->napi, lan743x_tx_napi_poll,
  1612. tx->ring_size - 1);
  1613. napi_enable(&tx->napi);
  1614. data = 0;
  1615. if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR)
  1616. data |= TX_CFG_C_TX_TOP_INT_EN_AUTO_CLR_;
  1617. if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR)
  1618. data |= TX_CFG_C_TX_DMA_INT_STS_AUTO_CLR_;
  1619. if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C)
  1620. data |= TX_CFG_C_TX_INT_STS_R2C_MODE_MASK_;
  1621. if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C)
  1622. data |= TX_CFG_C_TX_INT_EN_R2C_;
  1623. lan743x_csr_write(adapter, TX_CFG_C(tx->channel_number), data);
  1624. if (!(tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET))
  1625. lan743x_csr_write(adapter, INT_EN_SET,
  1626. INT_BIT_DMA_TX_(tx->channel_number));
  1627. lan743x_csr_write(adapter, DMAC_INT_EN_SET,
  1628. DMAC_INT_BIT_TX_IOC_(tx->channel_number));
  1629. /* start dmac channel */
  1630. lan743x_csr_write(adapter, DMAC_CMD,
  1631. DMAC_CMD_START_T_(tx->channel_number));
  1632. return 0;
  1633. }
  1634. static int lan743x_rx_next_index(struct lan743x_rx *rx, int index)
  1635. {
  1636. return ((++index) % rx->ring_size);
  1637. }
  1638. static int lan743x_rx_allocate_ring_element(struct lan743x_rx *rx, int index)
  1639. {
  1640. struct lan743x_rx_buffer_info *buffer_info;
  1641. struct lan743x_rx_descriptor *descriptor;
  1642. int length = 0;
  1643. length = (LAN743X_MAX_FRAME_SIZE + ETH_HLEN + 4 + RX_HEAD_PADDING);
  1644. descriptor = &rx->ring_cpu_ptr[index];
  1645. buffer_info = &rx->buffer_info[index];
  1646. buffer_info->skb = __netdev_alloc_skb(rx->adapter->netdev,
  1647. length,
  1648. GFP_ATOMIC | GFP_DMA);
  1649. if (!(buffer_info->skb))
  1650. return -ENOMEM;
  1651. buffer_info->dma_ptr = dma_map_single(&rx->adapter->pdev->dev,
  1652. buffer_info->skb->data,
  1653. length,
  1654. DMA_FROM_DEVICE);
  1655. if (dma_mapping_error(&rx->adapter->pdev->dev,
  1656. buffer_info->dma_ptr)) {
  1657. buffer_info->dma_ptr = 0;
  1658. return -ENOMEM;
  1659. }
  1660. buffer_info->buffer_length = length;
  1661. descriptor->data1 = DMA_ADDR_LOW32(buffer_info->dma_ptr);
  1662. descriptor->data2 = DMA_ADDR_HIGH32(buffer_info->dma_ptr);
  1663. descriptor->data3 = 0;
  1664. descriptor->data0 = (RX_DESC_DATA0_OWN_ |
  1665. (length & RX_DESC_DATA0_BUF_LENGTH_MASK_));
  1666. skb_reserve(buffer_info->skb, RX_HEAD_PADDING);
  1667. return 0;
  1668. }
  1669. static void lan743x_rx_reuse_ring_element(struct lan743x_rx *rx, int index)
  1670. {
  1671. struct lan743x_rx_buffer_info *buffer_info;
  1672. struct lan743x_rx_descriptor *descriptor;
  1673. descriptor = &rx->ring_cpu_ptr[index];
  1674. buffer_info = &rx->buffer_info[index];
  1675. descriptor->data1 = DMA_ADDR_LOW32(buffer_info->dma_ptr);
  1676. descriptor->data2 = DMA_ADDR_HIGH32(buffer_info->dma_ptr);
  1677. descriptor->data3 = 0;
  1678. descriptor->data0 = (RX_DESC_DATA0_OWN_ |
  1679. ((buffer_info->buffer_length) &
  1680. RX_DESC_DATA0_BUF_LENGTH_MASK_));
  1681. }
  1682. static void lan743x_rx_release_ring_element(struct lan743x_rx *rx, int index)
  1683. {
  1684. struct lan743x_rx_buffer_info *buffer_info;
  1685. struct lan743x_rx_descriptor *descriptor;
  1686. descriptor = &rx->ring_cpu_ptr[index];
  1687. buffer_info = &rx->buffer_info[index];
  1688. memset(descriptor, 0, sizeof(*descriptor));
  1689. if (buffer_info->dma_ptr) {
  1690. dma_unmap_single(&rx->adapter->pdev->dev,
  1691. buffer_info->dma_ptr,
  1692. buffer_info->buffer_length,
  1693. DMA_FROM_DEVICE);
  1694. buffer_info->dma_ptr = 0;
  1695. }
  1696. if (buffer_info->skb) {
  1697. dev_kfree_skb(buffer_info->skb);
  1698. buffer_info->skb = NULL;
  1699. }
  1700. memset(buffer_info, 0, sizeof(*buffer_info));
  1701. }
  1702. static int lan743x_rx_process_packet(struct lan743x_rx *rx)
  1703. {
  1704. struct skb_shared_hwtstamps *hwtstamps = NULL;
  1705. int result = RX_PROCESS_RESULT_NOTHING_TO_DO;
  1706. struct lan743x_rx_buffer_info *buffer_info;
  1707. struct lan743x_rx_descriptor *descriptor;
  1708. int current_head_index = -1;
  1709. int extension_index = -1;
  1710. int first_index = -1;
  1711. int last_index = -1;
  1712. current_head_index = *rx->head_cpu_ptr;
  1713. if (current_head_index < 0 || current_head_index >= rx->ring_size)
  1714. goto done;
  1715. if (rx->last_head < 0 || rx->last_head >= rx->ring_size)
  1716. goto done;
  1717. if (rx->last_head != current_head_index) {
  1718. descriptor = &rx->ring_cpu_ptr[rx->last_head];
  1719. if (descriptor->data0 & RX_DESC_DATA0_OWN_)
  1720. goto done;
  1721. if (!(descriptor->data0 & RX_DESC_DATA0_FS_))
  1722. goto done;
  1723. first_index = rx->last_head;
  1724. if (descriptor->data0 & RX_DESC_DATA0_LS_) {
  1725. last_index = rx->last_head;
  1726. } else {
  1727. int index;
  1728. index = lan743x_rx_next_index(rx, first_index);
  1729. while (index != current_head_index) {
  1730. descriptor = &rx->ring_cpu_ptr[index];
  1731. if (descriptor->data0 & RX_DESC_DATA0_OWN_)
  1732. goto done;
  1733. if (descriptor->data0 & RX_DESC_DATA0_LS_) {
  1734. last_index = index;
  1735. break;
  1736. }
  1737. index = lan743x_rx_next_index(rx, index);
  1738. }
  1739. }
  1740. if (last_index >= 0) {
  1741. descriptor = &rx->ring_cpu_ptr[last_index];
  1742. if (descriptor->data0 & RX_DESC_DATA0_EXT_) {
  1743. /* extension is expected to follow */
  1744. int index = lan743x_rx_next_index(rx,
  1745. last_index);
  1746. if (index != current_head_index) {
  1747. descriptor = &rx->ring_cpu_ptr[index];
  1748. if (descriptor->data0 &
  1749. RX_DESC_DATA0_OWN_) {
  1750. goto done;
  1751. }
  1752. if (descriptor->data0 &
  1753. RX_DESC_DATA0_EXT_) {
  1754. extension_index = index;
  1755. } else {
  1756. goto done;
  1757. }
  1758. } else {
  1759. /* extension is not yet available */
  1760. /* prevent processing of this packet */
  1761. first_index = -1;
  1762. last_index = -1;
  1763. }
  1764. }
  1765. }
  1766. }
  1767. if (first_index >= 0 && last_index >= 0) {
  1768. int real_last_index = last_index;
  1769. struct sk_buff *skb = NULL;
  1770. u32 ts_sec = 0;
  1771. u32 ts_nsec = 0;
  1772. /* packet is available */
  1773. if (first_index == last_index) {
  1774. /* single buffer packet */
  1775. int packet_length;
  1776. buffer_info = &rx->buffer_info[first_index];
  1777. skb = buffer_info->skb;
  1778. descriptor = &rx->ring_cpu_ptr[first_index];
  1779. /* unmap from dma */
  1780. if (buffer_info->dma_ptr) {
  1781. dma_unmap_single(&rx->adapter->pdev->dev,
  1782. buffer_info->dma_ptr,
  1783. buffer_info->buffer_length,
  1784. DMA_FROM_DEVICE);
  1785. buffer_info->dma_ptr = 0;
  1786. buffer_info->buffer_length = 0;
  1787. }
  1788. buffer_info->skb = NULL;
  1789. packet_length = RX_DESC_DATA0_FRAME_LENGTH_GET_
  1790. (descriptor->data0);
  1791. skb_put(skb, packet_length - 4);
  1792. skb->protocol = eth_type_trans(skb,
  1793. rx->adapter->netdev);
  1794. lan743x_rx_allocate_ring_element(rx, first_index);
  1795. } else {
  1796. int index = first_index;
  1797. /* multi buffer packet not supported */
  1798. /* this should not happen since
  1799. * buffers are allocated to be at least jumbo size
  1800. */
  1801. /* clean up buffers */
  1802. if (first_index <= last_index) {
  1803. while ((index >= first_index) &&
  1804. (index <= last_index)) {
  1805. lan743x_rx_release_ring_element(rx,
  1806. index);
  1807. lan743x_rx_allocate_ring_element(rx,
  1808. index);
  1809. index = lan743x_rx_next_index(rx,
  1810. index);
  1811. }
  1812. } else {
  1813. while ((index >= first_index) ||
  1814. (index <= last_index)) {
  1815. lan743x_rx_release_ring_element(rx,
  1816. index);
  1817. lan743x_rx_allocate_ring_element(rx,
  1818. index);
  1819. index = lan743x_rx_next_index(rx,
  1820. index);
  1821. }
  1822. }
  1823. }
  1824. if (extension_index >= 0) {
  1825. descriptor = &rx->ring_cpu_ptr[extension_index];
  1826. buffer_info = &rx->buffer_info[extension_index];
  1827. ts_sec = descriptor->data1;
  1828. ts_nsec = (descriptor->data2 &
  1829. RX_DESC_DATA2_TS_NS_MASK_);
  1830. lan743x_rx_reuse_ring_element(rx, extension_index);
  1831. real_last_index = extension_index;
  1832. }
  1833. if (!skb) {
  1834. result = RX_PROCESS_RESULT_PACKET_DROPPED;
  1835. goto move_forward;
  1836. }
  1837. if (extension_index < 0)
  1838. goto pass_packet_to_os;
  1839. hwtstamps = skb_hwtstamps(skb);
  1840. if (hwtstamps)
  1841. hwtstamps->hwtstamp = ktime_set(ts_sec, ts_nsec);
  1842. pass_packet_to_os:
  1843. /* pass packet to OS */
  1844. napi_gro_receive(&rx->napi, skb);
  1845. result = RX_PROCESS_RESULT_PACKET_RECEIVED;
  1846. move_forward:
  1847. /* push tail and head forward */
  1848. rx->last_tail = real_last_index;
  1849. rx->last_head = lan743x_rx_next_index(rx, real_last_index);
  1850. }
  1851. done:
  1852. return result;
  1853. }
  1854. static int lan743x_rx_napi_poll(struct napi_struct *napi, int weight)
  1855. {
  1856. struct lan743x_rx *rx = container_of(napi, struct lan743x_rx, napi);
  1857. struct lan743x_adapter *adapter = rx->adapter;
  1858. u32 rx_tail_flags = 0;
  1859. int count;
  1860. if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C) {
  1861. /* clear int status bit before reading packet */
  1862. lan743x_csr_write(adapter, DMAC_INT_STS,
  1863. DMAC_INT_BIT_RXFRM_(rx->channel_number));
  1864. }
  1865. count = 0;
  1866. while (count < weight) {
  1867. int rx_process_result = -1;
  1868. rx_process_result = lan743x_rx_process_packet(rx);
  1869. if (rx_process_result == RX_PROCESS_RESULT_PACKET_RECEIVED) {
  1870. count++;
  1871. } else if (rx_process_result ==
  1872. RX_PROCESS_RESULT_NOTHING_TO_DO) {
  1873. break;
  1874. } else if (rx_process_result ==
  1875. RX_PROCESS_RESULT_PACKET_DROPPED) {
  1876. continue;
  1877. }
  1878. }
  1879. rx->frame_count += count;
  1880. if (count == weight)
  1881. goto done;
  1882. if (!napi_complete_done(napi, count))
  1883. goto done;
  1884. if (rx->vector_flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET)
  1885. rx_tail_flags |= RX_TAIL_SET_TOP_INT_VEC_EN_;
  1886. if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET) {
  1887. rx_tail_flags |= RX_TAIL_SET_TOP_INT_EN_;
  1888. } else {
  1889. lan743x_csr_write(adapter, INT_EN_SET,
  1890. INT_BIT_DMA_RX_(rx->channel_number));
  1891. }
  1892. /* update RX_TAIL */
  1893. lan743x_csr_write(adapter, RX_TAIL(rx->channel_number),
  1894. rx_tail_flags | rx->last_tail);
  1895. done:
  1896. return count;
  1897. }
  1898. static void lan743x_rx_ring_cleanup(struct lan743x_rx *rx)
  1899. {
  1900. if (rx->buffer_info && rx->ring_cpu_ptr) {
  1901. int index;
  1902. for (index = 0; index < rx->ring_size; index++)
  1903. lan743x_rx_release_ring_element(rx, index);
  1904. }
  1905. if (rx->head_cpu_ptr) {
  1906. pci_free_consistent(rx->adapter->pdev,
  1907. sizeof(*rx->head_cpu_ptr),
  1908. rx->head_cpu_ptr,
  1909. rx->head_dma_ptr);
  1910. rx->head_cpu_ptr = NULL;
  1911. rx->head_dma_ptr = 0;
  1912. }
  1913. kfree(rx->buffer_info);
  1914. rx->buffer_info = NULL;
  1915. if (rx->ring_cpu_ptr) {
  1916. pci_free_consistent(rx->adapter->pdev,
  1917. rx->ring_allocation_size,
  1918. rx->ring_cpu_ptr,
  1919. rx->ring_dma_ptr);
  1920. rx->ring_allocation_size = 0;
  1921. rx->ring_cpu_ptr = NULL;
  1922. rx->ring_dma_ptr = 0;
  1923. }
  1924. rx->ring_size = 0;
  1925. rx->last_head = 0;
  1926. }
  1927. static int lan743x_rx_ring_init(struct lan743x_rx *rx)
  1928. {
  1929. size_t ring_allocation_size = 0;
  1930. dma_addr_t dma_ptr = 0;
  1931. void *cpu_ptr = NULL;
  1932. int ret = -ENOMEM;
  1933. int index = 0;
  1934. rx->ring_size = LAN743X_RX_RING_SIZE;
  1935. if (rx->ring_size <= 1) {
  1936. ret = -EINVAL;
  1937. goto cleanup;
  1938. }
  1939. if (rx->ring_size & ~RX_CFG_B_RX_RING_LEN_MASK_) {
  1940. ret = -EINVAL;
  1941. goto cleanup;
  1942. }
  1943. ring_allocation_size = ALIGN(rx->ring_size *
  1944. sizeof(struct lan743x_rx_descriptor),
  1945. PAGE_SIZE);
  1946. dma_ptr = 0;
  1947. cpu_ptr = pci_zalloc_consistent(rx->adapter->pdev,
  1948. ring_allocation_size, &dma_ptr);
  1949. if (!cpu_ptr) {
  1950. ret = -ENOMEM;
  1951. goto cleanup;
  1952. }
  1953. rx->ring_allocation_size = ring_allocation_size;
  1954. rx->ring_cpu_ptr = (struct lan743x_rx_descriptor *)cpu_ptr;
  1955. rx->ring_dma_ptr = dma_ptr;
  1956. cpu_ptr = kcalloc(rx->ring_size, sizeof(*rx->buffer_info),
  1957. GFP_KERNEL);
  1958. if (!cpu_ptr) {
  1959. ret = -ENOMEM;
  1960. goto cleanup;
  1961. }
  1962. rx->buffer_info = (struct lan743x_rx_buffer_info *)cpu_ptr;
  1963. dma_ptr = 0;
  1964. cpu_ptr = pci_zalloc_consistent(rx->adapter->pdev,
  1965. sizeof(*rx->head_cpu_ptr), &dma_ptr);
  1966. if (!cpu_ptr) {
  1967. ret = -ENOMEM;
  1968. goto cleanup;
  1969. }
  1970. rx->head_cpu_ptr = cpu_ptr;
  1971. rx->head_dma_ptr = dma_ptr;
  1972. if (rx->head_dma_ptr & 0x3) {
  1973. ret = -ENOMEM;
  1974. goto cleanup;
  1975. }
  1976. rx->last_head = 0;
  1977. for (index = 0; index < rx->ring_size; index++) {
  1978. ret = lan743x_rx_allocate_ring_element(rx, index);
  1979. if (ret)
  1980. goto cleanup;
  1981. }
  1982. return 0;
  1983. cleanup:
  1984. lan743x_rx_ring_cleanup(rx);
  1985. return ret;
  1986. }
  1987. static void lan743x_rx_close(struct lan743x_rx *rx)
  1988. {
  1989. struct lan743x_adapter *adapter = rx->adapter;
  1990. lan743x_csr_write(adapter, FCT_RX_CTL,
  1991. FCT_RX_CTL_DIS_(rx->channel_number));
  1992. lan743x_csr_wait_for_bit(adapter, FCT_RX_CTL,
  1993. FCT_RX_CTL_EN_(rx->channel_number),
  1994. 0, 1000, 20000, 100);
  1995. lan743x_csr_write(adapter, DMAC_CMD,
  1996. DMAC_CMD_STOP_R_(rx->channel_number));
  1997. lan743x_dmac_rx_wait_till_stopped(adapter, rx->channel_number);
  1998. lan743x_csr_write(adapter, DMAC_INT_EN_CLR,
  1999. DMAC_INT_BIT_RXFRM_(rx->channel_number));
  2000. lan743x_csr_write(adapter, INT_EN_CLR,
  2001. INT_BIT_DMA_RX_(rx->channel_number));
  2002. napi_disable(&rx->napi);
  2003. netif_napi_del(&rx->napi);
  2004. lan743x_rx_ring_cleanup(rx);
  2005. }
  2006. static int lan743x_rx_open(struct lan743x_rx *rx)
  2007. {
  2008. struct lan743x_adapter *adapter = rx->adapter;
  2009. u32 data = 0;
  2010. int ret;
  2011. rx->frame_count = 0;
  2012. ret = lan743x_rx_ring_init(rx);
  2013. if (ret)
  2014. goto return_error;
  2015. netif_napi_add(adapter->netdev,
  2016. &rx->napi, lan743x_rx_napi_poll,
  2017. rx->ring_size - 1);
  2018. lan743x_csr_write(adapter, DMAC_CMD,
  2019. DMAC_CMD_RX_SWR_(rx->channel_number));
  2020. lan743x_csr_wait_for_bit(adapter, DMAC_CMD,
  2021. DMAC_CMD_RX_SWR_(rx->channel_number),
  2022. 0, 1000, 20000, 100);
  2023. /* set ring base address */
  2024. lan743x_csr_write(adapter,
  2025. RX_BASE_ADDRH(rx->channel_number),
  2026. DMA_ADDR_HIGH32(rx->ring_dma_ptr));
  2027. lan743x_csr_write(adapter,
  2028. RX_BASE_ADDRL(rx->channel_number),
  2029. DMA_ADDR_LOW32(rx->ring_dma_ptr));
  2030. /* set rx write back address */
  2031. lan743x_csr_write(adapter,
  2032. RX_HEAD_WRITEBACK_ADDRH(rx->channel_number),
  2033. DMA_ADDR_HIGH32(rx->head_dma_ptr));
  2034. lan743x_csr_write(adapter,
  2035. RX_HEAD_WRITEBACK_ADDRL(rx->channel_number),
  2036. DMA_ADDR_LOW32(rx->head_dma_ptr));
  2037. data = RX_CFG_A_RX_HP_WB_EN_;
  2038. if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) {
  2039. data |= (RX_CFG_A_RX_WB_ON_INT_TMR_ |
  2040. RX_CFG_A_RX_WB_THRES_SET_(0x7) |
  2041. RX_CFG_A_RX_PF_THRES_SET_(16) |
  2042. RX_CFG_A_RX_PF_PRI_THRES_SET_(4));
  2043. }
  2044. /* set RX_CFG_A */
  2045. lan743x_csr_write(adapter,
  2046. RX_CFG_A(rx->channel_number), data);
  2047. /* set RX_CFG_B */
  2048. data = lan743x_csr_read(adapter, RX_CFG_B(rx->channel_number));
  2049. data &= ~RX_CFG_B_RX_PAD_MASK_;
  2050. if (!RX_HEAD_PADDING)
  2051. data |= RX_CFG_B_RX_PAD_0_;
  2052. else
  2053. data |= RX_CFG_B_RX_PAD_2_;
  2054. data &= ~RX_CFG_B_RX_RING_LEN_MASK_;
  2055. data |= ((rx->ring_size) & RX_CFG_B_RX_RING_LEN_MASK_);
  2056. data |= RX_CFG_B_TS_ALL_RX_;
  2057. if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0))
  2058. data |= RX_CFG_B_RDMABL_512_;
  2059. lan743x_csr_write(adapter, RX_CFG_B(rx->channel_number), data);
  2060. rx->vector_flags = lan743x_intr_get_vector_flags(adapter,
  2061. INT_BIT_DMA_RX_
  2062. (rx->channel_number));
  2063. /* set RX_CFG_C */
  2064. data = 0;
  2065. if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR)
  2066. data |= RX_CFG_C_RX_TOP_INT_EN_AUTO_CLR_;
  2067. if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR)
  2068. data |= RX_CFG_C_RX_DMA_INT_STS_AUTO_CLR_;
  2069. if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C)
  2070. data |= RX_CFG_C_RX_INT_STS_R2C_MODE_MASK_;
  2071. if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C)
  2072. data |= RX_CFG_C_RX_INT_EN_R2C_;
  2073. lan743x_csr_write(adapter, RX_CFG_C(rx->channel_number), data);
  2074. rx->last_tail = ((u32)(rx->ring_size - 1));
  2075. lan743x_csr_write(adapter, RX_TAIL(rx->channel_number),
  2076. rx->last_tail);
  2077. rx->last_head = lan743x_csr_read(adapter, RX_HEAD(rx->channel_number));
  2078. if (rx->last_head) {
  2079. ret = -EIO;
  2080. goto napi_delete;
  2081. }
  2082. napi_enable(&rx->napi);
  2083. lan743x_csr_write(adapter, INT_EN_SET,
  2084. INT_BIT_DMA_RX_(rx->channel_number));
  2085. lan743x_csr_write(adapter, DMAC_INT_STS,
  2086. DMAC_INT_BIT_RXFRM_(rx->channel_number));
  2087. lan743x_csr_write(adapter, DMAC_INT_EN_SET,
  2088. DMAC_INT_BIT_RXFRM_(rx->channel_number));
  2089. lan743x_csr_write(adapter, DMAC_CMD,
  2090. DMAC_CMD_START_R_(rx->channel_number));
  2091. /* initialize fifo */
  2092. lan743x_csr_write(adapter, FCT_RX_CTL,
  2093. FCT_RX_CTL_RESET_(rx->channel_number));
  2094. lan743x_csr_wait_for_bit(adapter, FCT_RX_CTL,
  2095. FCT_RX_CTL_RESET_(rx->channel_number),
  2096. 0, 1000, 20000, 100);
  2097. lan743x_csr_write(adapter, FCT_FLOW(rx->channel_number),
  2098. FCT_FLOW_CTL_REQ_EN_ |
  2099. FCT_FLOW_CTL_ON_THRESHOLD_SET_(0x2A) |
  2100. FCT_FLOW_CTL_OFF_THRESHOLD_SET_(0xA));
  2101. /* enable fifo */
  2102. lan743x_csr_write(adapter, FCT_RX_CTL,
  2103. FCT_RX_CTL_EN_(rx->channel_number));
  2104. return 0;
  2105. napi_delete:
  2106. netif_napi_del(&rx->napi);
  2107. lan743x_rx_ring_cleanup(rx);
  2108. return_error:
  2109. return ret;
  2110. }
  2111. static int lan743x_netdev_close(struct net_device *netdev)
  2112. {
  2113. struct lan743x_adapter *adapter = netdev_priv(netdev);
  2114. int index;
  2115. lan743x_tx_close(&adapter->tx[0]);
  2116. for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++)
  2117. lan743x_rx_close(&adapter->rx[index]);
  2118. lan743x_ptp_close(adapter);
  2119. lan743x_phy_close(adapter);
  2120. lan743x_mac_close(adapter);
  2121. lan743x_intr_close(adapter);
  2122. return 0;
  2123. }
  2124. static int lan743x_netdev_open(struct net_device *netdev)
  2125. {
  2126. struct lan743x_adapter *adapter = netdev_priv(netdev);
  2127. int index;
  2128. int ret;
  2129. ret = lan743x_intr_open(adapter);
  2130. if (ret)
  2131. goto return_error;
  2132. ret = lan743x_mac_open(adapter);
  2133. if (ret)
  2134. goto close_intr;
  2135. ret = lan743x_phy_open(adapter);
  2136. if (ret)
  2137. goto close_mac;
  2138. ret = lan743x_ptp_open(adapter);
  2139. if (ret)
  2140. goto close_phy;
  2141. lan743x_rfe_open(adapter);
  2142. for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) {
  2143. ret = lan743x_rx_open(&adapter->rx[index]);
  2144. if (ret)
  2145. goto close_rx;
  2146. }
  2147. ret = lan743x_tx_open(&adapter->tx[0]);
  2148. if (ret)
  2149. goto close_rx;
  2150. return 0;
  2151. close_rx:
  2152. for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) {
  2153. if (adapter->rx[index].ring_cpu_ptr)
  2154. lan743x_rx_close(&adapter->rx[index]);
  2155. }
  2156. lan743x_ptp_close(adapter);
  2157. close_phy:
  2158. lan743x_phy_close(adapter);
  2159. close_mac:
  2160. lan743x_mac_close(adapter);
  2161. close_intr:
  2162. lan743x_intr_close(adapter);
  2163. return_error:
  2164. netif_warn(adapter, ifup, adapter->netdev,
  2165. "Error opening LAN743x\n");
  2166. return ret;
  2167. }
  2168. static netdev_tx_t lan743x_netdev_xmit_frame(struct sk_buff *skb,
  2169. struct net_device *netdev)
  2170. {
  2171. struct lan743x_adapter *adapter = netdev_priv(netdev);
  2172. return lan743x_tx_xmit_frame(&adapter->tx[0], skb);
  2173. }
  2174. static int lan743x_netdev_ioctl(struct net_device *netdev,
  2175. struct ifreq *ifr, int cmd)
  2176. {
  2177. if (!netif_running(netdev))
  2178. return -EINVAL;
  2179. if (cmd == SIOCSHWTSTAMP)
  2180. return lan743x_ptp_ioctl(netdev, ifr, cmd);
  2181. return phy_mii_ioctl(netdev->phydev, ifr, cmd);
  2182. }
  2183. static void lan743x_netdev_set_multicast(struct net_device *netdev)
  2184. {
  2185. struct lan743x_adapter *adapter = netdev_priv(netdev);
  2186. lan743x_rfe_set_multicast(adapter);
  2187. }
  2188. static int lan743x_netdev_change_mtu(struct net_device *netdev, int new_mtu)
  2189. {
  2190. struct lan743x_adapter *adapter = netdev_priv(netdev);
  2191. int ret = 0;
  2192. ret = lan743x_mac_set_mtu(adapter, new_mtu);
  2193. if (!ret)
  2194. netdev->mtu = new_mtu;
  2195. return ret;
  2196. }
  2197. static void lan743x_netdev_get_stats64(struct net_device *netdev,
  2198. struct rtnl_link_stats64 *stats)
  2199. {
  2200. struct lan743x_adapter *adapter = netdev_priv(netdev);
  2201. stats->rx_packets = lan743x_csr_read(adapter, STAT_RX_TOTAL_FRAMES);
  2202. stats->tx_packets = lan743x_csr_read(adapter, STAT_TX_TOTAL_FRAMES);
  2203. stats->rx_bytes = lan743x_csr_read(adapter,
  2204. STAT_RX_UNICAST_BYTE_COUNT) +
  2205. lan743x_csr_read(adapter,
  2206. STAT_RX_BROADCAST_BYTE_COUNT) +
  2207. lan743x_csr_read(adapter,
  2208. STAT_RX_MULTICAST_BYTE_COUNT);
  2209. stats->tx_bytes = lan743x_csr_read(adapter,
  2210. STAT_TX_UNICAST_BYTE_COUNT) +
  2211. lan743x_csr_read(adapter,
  2212. STAT_TX_BROADCAST_BYTE_COUNT) +
  2213. lan743x_csr_read(adapter,
  2214. STAT_TX_MULTICAST_BYTE_COUNT);
  2215. stats->rx_errors = lan743x_csr_read(adapter, STAT_RX_FCS_ERRORS) +
  2216. lan743x_csr_read(adapter,
  2217. STAT_RX_ALIGNMENT_ERRORS) +
  2218. lan743x_csr_read(adapter, STAT_RX_JABBER_ERRORS) +
  2219. lan743x_csr_read(adapter,
  2220. STAT_RX_UNDERSIZE_FRAME_ERRORS) +
  2221. lan743x_csr_read(adapter,
  2222. STAT_RX_OVERSIZE_FRAME_ERRORS);
  2223. stats->tx_errors = lan743x_csr_read(adapter, STAT_TX_FCS_ERRORS) +
  2224. lan743x_csr_read(adapter,
  2225. STAT_TX_EXCESS_DEFERRAL_ERRORS) +
  2226. lan743x_csr_read(adapter, STAT_TX_CARRIER_ERRORS);
  2227. stats->rx_dropped = lan743x_csr_read(adapter,
  2228. STAT_RX_DROPPED_FRAMES);
  2229. stats->tx_dropped = lan743x_csr_read(adapter,
  2230. STAT_TX_EXCESSIVE_COLLISION);
  2231. stats->multicast = lan743x_csr_read(adapter,
  2232. STAT_RX_MULTICAST_FRAMES) +
  2233. lan743x_csr_read(adapter,
  2234. STAT_TX_MULTICAST_FRAMES);
  2235. stats->collisions = lan743x_csr_read(adapter,
  2236. STAT_TX_SINGLE_COLLISIONS) +
  2237. lan743x_csr_read(adapter,
  2238. STAT_TX_MULTIPLE_COLLISIONS) +
  2239. lan743x_csr_read(adapter,
  2240. STAT_TX_LATE_COLLISIONS);
  2241. }
  2242. static int lan743x_netdev_set_mac_address(struct net_device *netdev,
  2243. void *addr)
  2244. {
  2245. struct lan743x_adapter *adapter = netdev_priv(netdev);
  2246. struct sockaddr *sock_addr = addr;
  2247. int ret;
  2248. ret = eth_prepare_mac_addr_change(netdev, sock_addr);
  2249. if (ret)
  2250. return ret;
  2251. ether_addr_copy(netdev->dev_addr, sock_addr->sa_data);
  2252. lan743x_mac_set_address(adapter, sock_addr->sa_data);
  2253. lan743x_rfe_update_mac_address(adapter);
  2254. return 0;
  2255. }
  2256. static const struct net_device_ops lan743x_netdev_ops = {
  2257. .ndo_open = lan743x_netdev_open,
  2258. .ndo_stop = lan743x_netdev_close,
  2259. .ndo_start_xmit = lan743x_netdev_xmit_frame,
  2260. .ndo_do_ioctl = lan743x_netdev_ioctl,
  2261. .ndo_set_rx_mode = lan743x_netdev_set_multicast,
  2262. .ndo_change_mtu = lan743x_netdev_change_mtu,
  2263. .ndo_get_stats64 = lan743x_netdev_get_stats64,
  2264. .ndo_set_mac_address = lan743x_netdev_set_mac_address,
  2265. };
  2266. static void lan743x_hardware_cleanup(struct lan743x_adapter *adapter)
  2267. {
  2268. lan743x_csr_write(adapter, INT_EN_CLR, 0xFFFFFFFF);
  2269. }
  2270. static void lan743x_mdiobus_cleanup(struct lan743x_adapter *adapter)
  2271. {
  2272. mdiobus_unregister(adapter->mdiobus);
  2273. }
  2274. static void lan743x_full_cleanup(struct lan743x_adapter *adapter)
  2275. {
  2276. unregister_netdev(adapter->netdev);
  2277. lan743x_mdiobus_cleanup(adapter);
  2278. lan743x_hardware_cleanup(adapter);
  2279. lan743x_pci_cleanup(adapter);
  2280. }
  2281. static int lan743x_hardware_init(struct lan743x_adapter *adapter,
  2282. struct pci_dev *pdev)
  2283. {
  2284. struct lan743x_tx *tx;
  2285. int index;
  2286. int ret;
  2287. adapter->intr.irq = adapter->pdev->irq;
  2288. lan743x_csr_write(adapter, INT_EN_CLR, 0xFFFFFFFF);
  2289. mutex_init(&adapter->dp_lock);
  2290. ret = lan743x_gpio_init(adapter);
  2291. if (ret)
  2292. return ret;
  2293. ret = lan743x_mac_init(adapter);
  2294. if (ret)
  2295. return ret;
  2296. ret = lan743x_phy_init(adapter);
  2297. if (ret)
  2298. return ret;
  2299. ret = lan743x_ptp_init(adapter);
  2300. if (ret)
  2301. return ret;
  2302. lan743x_rfe_update_mac_address(adapter);
  2303. ret = lan743x_dmac_init(adapter);
  2304. if (ret)
  2305. return ret;
  2306. for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) {
  2307. adapter->rx[index].adapter = adapter;
  2308. adapter->rx[index].channel_number = index;
  2309. }
  2310. tx = &adapter->tx[0];
  2311. tx->adapter = adapter;
  2312. tx->channel_number = 0;
  2313. spin_lock_init(&tx->ring_lock);
  2314. return 0;
  2315. }
  2316. static int lan743x_mdiobus_init(struct lan743x_adapter *adapter)
  2317. {
  2318. int ret;
  2319. adapter->mdiobus = devm_mdiobus_alloc(&adapter->pdev->dev);
  2320. if (!(adapter->mdiobus)) {
  2321. ret = -ENOMEM;
  2322. goto return_error;
  2323. }
  2324. adapter->mdiobus->priv = (void *)adapter;
  2325. adapter->mdiobus->read = lan743x_mdiobus_read;
  2326. adapter->mdiobus->write = lan743x_mdiobus_write;
  2327. adapter->mdiobus->name = "lan743x-mdiobus";
  2328. snprintf(adapter->mdiobus->id, MII_BUS_ID_SIZE,
  2329. "pci-%s", pci_name(adapter->pdev));
  2330. /* set to internal PHY id */
  2331. adapter->mdiobus->phy_mask = ~(u32)BIT(1);
  2332. /* register mdiobus */
  2333. ret = mdiobus_register(adapter->mdiobus);
  2334. if (ret < 0)
  2335. goto return_error;
  2336. return 0;
  2337. return_error:
  2338. return ret;
  2339. }
  2340. /* lan743x_pcidev_probe - Device Initialization Routine
  2341. * @pdev: PCI device information struct
  2342. * @id: entry in lan743x_pci_tbl
  2343. *
  2344. * Returns 0 on success, negative on failure
  2345. *
  2346. * initializes an adapter identified by a pci_dev structure.
  2347. * The OS initialization, configuring of the adapter private structure,
  2348. * and a hardware reset occur.
  2349. **/
  2350. static int lan743x_pcidev_probe(struct pci_dev *pdev,
  2351. const struct pci_device_id *id)
  2352. {
  2353. struct lan743x_adapter *adapter = NULL;
  2354. struct net_device *netdev = NULL;
  2355. int ret = -ENODEV;
  2356. netdev = devm_alloc_etherdev(&pdev->dev,
  2357. sizeof(struct lan743x_adapter));
  2358. if (!netdev)
  2359. goto return_error;
  2360. SET_NETDEV_DEV(netdev, &pdev->dev);
  2361. pci_set_drvdata(pdev, netdev);
  2362. adapter = netdev_priv(netdev);
  2363. adapter->netdev = netdev;
  2364. adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE |
  2365. NETIF_MSG_LINK | NETIF_MSG_IFUP |
  2366. NETIF_MSG_IFDOWN | NETIF_MSG_TX_QUEUED;
  2367. netdev->max_mtu = LAN743X_MAX_FRAME_SIZE;
  2368. ret = lan743x_pci_init(adapter, pdev);
  2369. if (ret)
  2370. goto return_error;
  2371. ret = lan743x_csr_init(adapter);
  2372. if (ret)
  2373. goto cleanup_pci;
  2374. ret = lan743x_hardware_init(adapter, pdev);
  2375. if (ret)
  2376. goto cleanup_pci;
  2377. ret = lan743x_mdiobus_init(adapter);
  2378. if (ret)
  2379. goto cleanup_hardware;
  2380. adapter->netdev->netdev_ops = &lan743x_netdev_ops;
  2381. adapter->netdev->ethtool_ops = &lan743x_ethtool_ops;
  2382. adapter->netdev->features = NETIF_F_SG | NETIF_F_TSO | NETIF_F_HW_CSUM;
  2383. adapter->netdev->hw_features = adapter->netdev->features;
  2384. /* carrier off reporting is important to ethtool even BEFORE open */
  2385. netif_carrier_off(netdev);
  2386. ret = register_netdev(adapter->netdev);
  2387. if (ret < 0)
  2388. goto cleanup_mdiobus;
  2389. return 0;
  2390. cleanup_mdiobus:
  2391. lan743x_mdiobus_cleanup(adapter);
  2392. cleanup_hardware:
  2393. lan743x_hardware_cleanup(adapter);
  2394. cleanup_pci:
  2395. lan743x_pci_cleanup(adapter);
  2396. return_error:
  2397. pr_warn("Initialization failed\n");
  2398. return ret;
  2399. }
  2400. /**
  2401. * lan743x_pcidev_remove - Device Removal Routine
  2402. * @pdev: PCI device information struct
  2403. *
  2404. * this is called by the PCI subsystem to alert the driver
  2405. * that it should release a PCI device. This could be caused by a
  2406. * Hot-Plug event, or because the driver is going to be removed from
  2407. * memory.
  2408. **/
  2409. static void lan743x_pcidev_remove(struct pci_dev *pdev)
  2410. {
  2411. struct net_device *netdev = pci_get_drvdata(pdev);
  2412. struct lan743x_adapter *adapter = netdev_priv(netdev);
  2413. lan743x_full_cleanup(adapter);
  2414. }
  2415. static void lan743x_pcidev_shutdown(struct pci_dev *pdev)
  2416. {
  2417. struct net_device *netdev = pci_get_drvdata(pdev);
  2418. struct lan743x_adapter *adapter = netdev_priv(netdev);
  2419. rtnl_lock();
  2420. netif_device_detach(netdev);
  2421. /* close netdev when netdev is at running state.
  2422. * For instance, it is true when system goes to sleep by pm-suspend
  2423. * However, it is false when system goes to sleep by suspend GUI menu
  2424. */
  2425. if (netif_running(netdev))
  2426. lan743x_netdev_close(netdev);
  2427. rtnl_unlock();
  2428. #ifdef CONFIG_PM
  2429. pci_save_state(pdev);
  2430. #endif
  2431. /* clean up lan743x portion */
  2432. lan743x_hardware_cleanup(adapter);
  2433. }
  2434. #ifdef CONFIG_PM
  2435. static u16 lan743x_pm_wakeframe_crc16(const u8 *buf, int len)
  2436. {
  2437. return bitrev16(crc16(0xFFFF, buf, len));
  2438. }
  2439. static void lan743x_pm_set_wol(struct lan743x_adapter *adapter)
  2440. {
  2441. const u8 ipv4_multicast[3] = { 0x01, 0x00, 0x5E };
  2442. const u8 ipv6_multicast[3] = { 0x33, 0x33 };
  2443. const u8 arp_type[2] = { 0x08, 0x06 };
  2444. int mask_index;
  2445. u32 pmtctl;
  2446. u32 wucsr;
  2447. u32 macrx;
  2448. u16 crc;
  2449. for (mask_index = 0; mask_index < MAC_NUM_OF_WUF_CFG; mask_index++)
  2450. lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 0);
  2451. /* clear wake settings */
  2452. pmtctl = lan743x_csr_read(adapter, PMT_CTL);
  2453. pmtctl |= PMT_CTL_WUPS_MASK_;
  2454. pmtctl &= ~(PMT_CTL_GPIO_WAKEUP_EN_ | PMT_CTL_EEE_WAKEUP_EN_ |
  2455. PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_ |
  2456. PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_ | PMT_CTL_ETH_PHY_WAKE_EN_);
  2457. macrx = lan743x_csr_read(adapter, MAC_RX);
  2458. wucsr = 0;
  2459. mask_index = 0;
  2460. pmtctl |= PMT_CTL_ETH_PHY_D3_COLD_OVR_ | PMT_CTL_ETH_PHY_D3_OVR_;
  2461. if (adapter->wolopts & WAKE_PHY) {
  2462. pmtctl |= PMT_CTL_ETH_PHY_EDPD_PLL_CTL_;
  2463. pmtctl |= PMT_CTL_ETH_PHY_WAKE_EN_;
  2464. }
  2465. if (adapter->wolopts & WAKE_MAGIC) {
  2466. wucsr |= MAC_WUCSR_MPEN_;
  2467. macrx |= MAC_RX_RXEN_;
  2468. pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
  2469. }
  2470. if (adapter->wolopts & WAKE_UCAST) {
  2471. wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_PFDA_EN_;
  2472. macrx |= MAC_RX_RXEN_;
  2473. pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
  2474. pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_;
  2475. }
  2476. if (adapter->wolopts & WAKE_BCAST) {
  2477. wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_BCST_EN_;
  2478. macrx |= MAC_RX_RXEN_;
  2479. pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
  2480. pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_;
  2481. }
  2482. if (adapter->wolopts & WAKE_MCAST) {
  2483. /* IPv4 multicast */
  2484. crc = lan743x_pm_wakeframe_crc16(ipv4_multicast, 3);
  2485. lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index),
  2486. MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_MCAST_ |
  2487. (0 << MAC_WUF_CFG_OFFSET_SHIFT_) |
  2488. (crc & MAC_WUF_CFG_CRC16_MASK_));
  2489. lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 7);
  2490. lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0);
  2491. lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0);
  2492. lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0);
  2493. mask_index++;
  2494. /* IPv6 multicast */
  2495. crc = lan743x_pm_wakeframe_crc16(ipv6_multicast, 2);
  2496. lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index),
  2497. MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_MCAST_ |
  2498. (0 << MAC_WUF_CFG_OFFSET_SHIFT_) |
  2499. (crc & MAC_WUF_CFG_CRC16_MASK_));
  2500. lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 3);
  2501. lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0);
  2502. lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0);
  2503. lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0);
  2504. mask_index++;
  2505. wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_WAKE_EN_;
  2506. macrx |= MAC_RX_RXEN_;
  2507. pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
  2508. pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_;
  2509. }
  2510. if (adapter->wolopts & WAKE_ARP) {
  2511. /* set MAC_WUF_CFG & WUF_MASK
  2512. * for packettype (offset 12,13) = ARP (0x0806)
  2513. */
  2514. crc = lan743x_pm_wakeframe_crc16(arp_type, 2);
  2515. lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index),
  2516. MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_ALL_ |
  2517. (0 << MAC_WUF_CFG_OFFSET_SHIFT_) |
  2518. (crc & MAC_WUF_CFG_CRC16_MASK_));
  2519. lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 0x3000);
  2520. lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0);
  2521. lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0);
  2522. lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0);
  2523. mask_index++;
  2524. wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_WAKE_EN_;
  2525. macrx |= MAC_RX_RXEN_;
  2526. pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
  2527. pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_;
  2528. }
  2529. lan743x_csr_write(adapter, MAC_WUCSR, wucsr);
  2530. lan743x_csr_write(adapter, PMT_CTL, pmtctl);
  2531. lan743x_csr_write(adapter, MAC_RX, macrx);
  2532. }
  2533. static int lan743x_pm_suspend(struct device *dev)
  2534. {
  2535. struct pci_dev *pdev = to_pci_dev(dev);
  2536. struct net_device *netdev = pci_get_drvdata(pdev);
  2537. struct lan743x_adapter *adapter = netdev_priv(netdev);
  2538. int ret;
  2539. lan743x_pcidev_shutdown(pdev);
  2540. /* clear all wakes */
  2541. lan743x_csr_write(adapter, MAC_WUCSR, 0);
  2542. lan743x_csr_write(adapter, MAC_WUCSR2, 0);
  2543. lan743x_csr_write(adapter, MAC_WK_SRC, 0xFFFFFFFF);
  2544. if (adapter->wolopts)
  2545. lan743x_pm_set_wol(adapter);
  2546. /* Host sets PME_En, put D3hot */
  2547. ret = pci_prepare_to_sleep(pdev);
  2548. return 0;
  2549. }
  2550. static int lan743x_pm_resume(struct device *dev)
  2551. {
  2552. struct pci_dev *pdev = to_pci_dev(dev);
  2553. struct net_device *netdev = pci_get_drvdata(pdev);
  2554. struct lan743x_adapter *adapter = netdev_priv(netdev);
  2555. int ret;
  2556. pci_set_power_state(pdev, PCI_D0);
  2557. pci_restore_state(pdev);
  2558. pci_save_state(pdev);
  2559. ret = lan743x_hardware_init(adapter, pdev);
  2560. if (ret) {
  2561. netif_err(adapter, probe, adapter->netdev,
  2562. "lan743x_hardware_init returned %d\n", ret);
  2563. }
  2564. /* open netdev when netdev is at running state while resume.
  2565. * For instance, it is true when system wakesup after pm-suspend
  2566. * However, it is false when system wakes up after suspend GUI menu
  2567. */
  2568. if (netif_running(netdev))
  2569. lan743x_netdev_open(netdev);
  2570. netif_device_attach(netdev);
  2571. return 0;
  2572. }
  2573. static const struct dev_pm_ops lan743x_pm_ops = {
  2574. SET_SYSTEM_SLEEP_PM_OPS(lan743x_pm_suspend, lan743x_pm_resume)
  2575. };
  2576. #endif /*CONFIG_PM */
  2577. static const struct pci_device_id lan743x_pcidev_tbl[] = {
  2578. { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_LAN7430) },
  2579. { 0, }
  2580. };
  2581. static struct pci_driver lan743x_pcidev_driver = {
  2582. .name = DRIVER_NAME,
  2583. .id_table = lan743x_pcidev_tbl,
  2584. .probe = lan743x_pcidev_probe,
  2585. .remove = lan743x_pcidev_remove,
  2586. #ifdef CONFIG_PM
  2587. .driver.pm = &lan743x_pm_ops,
  2588. #endif
  2589. .shutdown = lan743x_pcidev_shutdown,
  2590. };
  2591. module_pci_driver(lan743x_pcidev_driver);
  2592. MODULE_AUTHOR(DRIVER_AUTHOR);
  2593. MODULE_DESCRIPTION(DRIVER_DESC);
  2594. MODULE_LICENSE("GPL");