octeon-feature.h 6.0 KB

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  1. /***********************license start***************
  2. * Author: Cavium Networks
  3. *
  4. * Contact: support@caviumnetworks.com
  5. * This file is part of the OCTEON SDK
  6. *
  7. * Copyright (c) 2003-2008 Cavium Networks
  8. *
  9. * This file is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License, Version 2, as
  11. * published by the Free Software Foundation.
  12. *
  13. * This file is distributed in the hope that it will be useful, but
  14. * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
  15. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
  16. * NONINFRINGEMENT. See the GNU General Public License for more
  17. * details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this file; if not, write to the Free Software
  21. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  22. * or visit http://www.gnu.org/licenses/.
  23. *
  24. * This file may also be available under a different license from Cavium.
  25. * Contact Cavium Networks for more information
  26. ***********************license end**************************************/
  27. /*
  28. * File defining checks for different Octeon features.
  29. */
  30. #ifndef __OCTEON_FEATURE_H__
  31. #define __OCTEON_FEATURE_H__
  32. #include <asm/octeon/cvmx-mio-defs.h>
  33. #include <asm/octeon/cvmx-rnm-defs.h>
  34. enum octeon_feature {
  35. /* CN68XX uses port kinds for packet interface */
  36. OCTEON_FEATURE_PKND,
  37. /* CN68XX has different fields in word0 - word2 */
  38. OCTEON_FEATURE_CN68XX_WQE,
  39. /*
  40. * Octeon models in the CN5XXX family and higher support
  41. * atomic add instructions to memory (saa/saad).
  42. */
  43. OCTEON_FEATURE_SAAD,
  44. /* Does this Octeon support the ZIP offload engine? */
  45. OCTEON_FEATURE_ZIP,
  46. OCTEON_FEATURE_DORM_CRYPTO,
  47. /* Does this Octeon support PCI express? */
  48. OCTEON_FEATURE_PCIE,
  49. /* Does this Octeon support SRIOs */
  50. OCTEON_FEATURE_SRIO,
  51. /* Does this Octeon support Interlaken */
  52. OCTEON_FEATURE_ILK,
  53. /* Some Octeon models support internal memory for storing
  54. * cryptographic keys */
  55. OCTEON_FEATURE_KEY_MEMORY,
  56. /* Octeon has a LED controller for banks of external LEDs */
  57. OCTEON_FEATURE_LED_CONTROLLER,
  58. /* Octeon has a trace buffer */
  59. OCTEON_FEATURE_TRA,
  60. /* Octeon has a management port */
  61. OCTEON_FEATURE_MGMT_PORT,
  62. /* Octeon has a raid unit */
  63. OCTEON_FEATURE_RAID,
  64. /* Octeon has a builtin USB */
  65. OCTEON_FEATURE_USB,
  66. /* Octeon IPD can run without using work queue entries */
  67. OCTEON_FEATURE_NO_WPTR,
  68. /* Octeon has DFA state machines */
  69. OCTEON_FEATURE_DFA,
  70. /* Octeon MDIO block supports clause 45 transactions for 10
  71. * Gig support */
  72. OCTEON_FEATURE_MDIO_CLAUSE_45,
  73. /*
  74. * CN52XX and CN56XX used a block named NPEI for PCIe
  75. * access. Newer chips replaced this with SLI+DPI.
  76. */
  77. OCTEON_FEATURE_NPEI,
  78. OCTEON_FEATURE_HFA,
  79. OCTEON_FEATURE_DFM,
  80. OCTEON_FEATURE_CIU2,
  81. OCTEON_MAX_FEATURE
  82. };
  83. enum octeon_feature_bits {
  84. OCTEON_HAS_CRYPTO = 0x0001, /* Crypto acceleration using COP2 */
  85. };
  86. extern enum octeon_feature_bits __octeon_feature_bits;
  87. /**
  88. * octeon_has_crypto() - Check if this OCTEON has crypto acceleration support.
  89. *
  90. * Returns: Non-zero if the feature exists. Zero if the feature does not exist.
  91. */
  92. static inline int octeon_has_crypto(void)
  93. {
  94. return __octeon_feature_bits & OCTEON_HAS_CRYPTO;
  95. }
  96. /**
  97. * Determine if the current Octeon supports a specific feature. These
  98. * checks have been optimized to be fairly quick, but they should still
  99. * be kept out of fast path code.
  100. *
  101. * @feature: Feature to check for. This should always be a constant so the
  102. * compiler can remove the switch statement through optimization.
  103. *
  104. * Returns Non zero if the feature exists. Zero if the feature does not
  105. * exist.
  106. */
  107. static inline int octeon_has_feature(enum octeon_feature feature)
  108. {
  109. switch (feature) {
  110. case OCTEON_FEATURE_SAAD:
  111. return !OCTEON_IS_MODEL(OCTEON_CN3XXX);
  112. case OCTEON_FEATURE_DORM_CRYPTO:
  113. if (OCTEON_IS_MODEL(OCTEON_CN6XXX)) {
  114. union cvmx_mio_fus_dat2 fus_2;
  115. fus_2.u64 = cvmx_read_csr(CVMX_MIO_FUS_DAT2);
  116. return !fus_2.s.nocrypto && !fus_2.s.nomul && fus_2.s.dorm_crypto;
  117. } else {
  118. return 0;
  119. }
  120. case OCTEON_FEATURE_PCIE:
  121. return OCTEON_IS_MODEL(OCTEON_CN56XX)
  122. || OCTEON_IS_MODEL(OCTEON_CN52XX)
  123. || OCTEON_IS_MODEL(OCTEON_CN6XXX)
  124. || OCTEON_IS_MODEL(OCTEON_CN7XXX);
  125. case OCTEON_FEATURE_SRIO:
  126. return OCTEON_IS_MODEL(OCTEON_CN63XX)
  127. || OCTEON_IS_MODEL(OCTEON_CN66XX);
  128. case OCTEON_FEATURE_ILK:
  129. return (OCTEON_IS_MODEL(OCTEON_CN68XX));
  130. case OCTEON_FEATURE_KEY_MEMORY:
  131. return OCTEON_IS_MODEL(OCTEON_CN38XX)
  132. || OCTEON_IS_MODEL(OCTEON_CN58XX)
  133. || OCTEON_IS_MODEL(OCTEON_CN56XX)
  134. || OCTEON_IS_MODEL(OCTEON_CN6XXX);
  135. case OCTEON_FEATURE_LED_CONTROLLER:
  136. return OCTEON_IS_MODEL(OCTEON_CN38XX)
  137. || OCTEON_IS_MODEL(OCTEON_CN58XX)
  138. || OCTEON_IS_MODEL(OCTEON_CN56XX);
  139. case OCTEON_FEATURE_TRA:
  140. return !(OCTEON_IS_MODEL(OCTEON_CN30XX)
  141. || OCTEON_IS_MODEL(OCTEON_CN50XX));
  142. case OCTEON_FEATURE_MGMT_PORT:
  143. return OCTEON_IS_MODEL(OCTEON_CN56XX)
  144. || OCTEON_IS_MODEL(OCTEON_CN52XX)
  145. || OCTEON_IS_MODEL(OCTEON_CN6XXX);
  146. case OCTEON_FEATURE_RAID:
  147. return OCTEON_IS_MODEL(OCTEON_CN56XX)
  148. || OCTEON_IS_MODEL(OCTEON_CN52XX)
  149. || OCTEON_IS_MODEL(OCTEON_CN6XXX);
  150. case OCTEON_FEATURE_USB:
  151. return !(OCTEON_IS_MODEL(OCTEON_CN38XX)
  152. || OCTEON_IS_MODEL(OCTEON_CN58XX));
  153. case OCTEON_FEATURE_NO_WPTR:
  154. return (OCTEON_IS_MODEL(OCTEON_CN56XX)
  155. || OCTEON_IS_MODEL(OCTEON_CN52XX)
  156. || OCTEON_IS_MODEL(OCTEON_CN6XXX))
  157. && !OCTEON_IS_MODEL(OCTEON_CN56XX_PASS1_X)
  158. && !OCTEON_IS_MODEL(OCTEON_CN52XX_PASS1_X);
  159. case OCTEON_FEATURE_MDIO_CLAUSE_45:
  160. return !(OCTEON_IS_MODEL(OCTEON_CN3XXX)
  161. || OCTEON_IS_MODEL(OCTEON_CN58XX)
  162. || OCTEON_IS_MODEL(OCTEON_CN50XX));
  163. case OCTEON_FEATURE_NPEI:
  164. return OCTEON_IS_MODEL(OCTEON_CN56XX)
  165. || OCTEON_IS_MODEL(OCTEON_CN52XX);
  166. case OCTEON_FEATURE_PKND:
  167. return OCTEON_IS_MODEL(OCTEON_CN68XX);
  168. case OCTEON_FEATURE_CN68XX_WQE:
  169. return OCTEON_IS_MODEL(OCTEON_CN68XX);
  170. case OCTEON_FEATURE_CIU2:
  171. return OCTEON_IS_MODEL(OCTEON_CN68XX);
  172. default:
  173. break;
  174. }
  175. return 0;
  176. }
  177. #endif /* __OCTEON_FEATURE_H__ */