intel_dp_mst.c 17 KB

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  1. /*
  2. * Copyright © 2008 Intel Corporation
  3. * 2014 Red Hat Inc.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  22. * IN THE SOFTWARE.
  23. *
  24. */
  25. #include <drm/drmP.h>
  26. #include "i915_drv.h"
  27. #include "intel_drv.h"
  28. #include <drm/drm_atomic_helper.h>
  29. #include <drm/drm_crtc_helper.h>
  30. #include <drm/drm_edid.h>
  31. static bool intel_dp_mst_compute_config(struct intel_encoder *encoder,
  32. struct intel_crtc_state *pipe_config)
  33. {
  34. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  35. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  36. struct intel_dp *intel_dp = &intel_dig_port->dp;
  37. struct drm_atomic_state *state;
  38. int bpp, i;
  39. int lane_count, slots;
  40. struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
  41. struct drm_connector *drm_connector;
  42. struct intel_connector *connector, *found = NULL;
  43. struct drm_connector_state *connector_state;
  44. int mst_pbn;
  45. pipe_config->dp_encoder_is_mst = true;
  46. pipe_config->has_pch_encoder = false;
  47. pipe_config->has_dp_encoder = true;
  48. bpp = 24;
  49. /*
  50. * for MST we always configure max link bw - the spec doesn't
  51. * seem to suggest we should do otherwise.
  52. */
  53. lane_count = drm_dp_max_lane_count(intel_dp->dpcd);
  54. pipe_config->lane_count = lane_count;
  55. pipe_config->pipe_bpp = 24;
  56. pipe_config->port_clock = intel_dp_max_link_rate(intel_dp);
  57. state = pipe_config->base.state;
  58. for_each_connector_in_state(state, drm_connector, connector_state, i) {
  59. connector = to_intel_connector(drm_connector);
  60. if (connector_state->best_encoder == &encoder->base) {
  61. found = connector;
  62. break;
  63. }
  64. }
  65. if (!found) {
  66. DRM_ERROR("can't find connector\n");
  67. return false;
  68. }
  69. mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->clock, bpp);
  70. pipe_config->pbn = mst_pbn;
  71. slots = drm_dp_find_vcpi_slots(&intel_dp->mst_mgr, mst_pbn);
  72. intel_link_compute_m_n(bpp, lane_count,
  73. adjusted_mode->crtc_clock,
  74. pipe_config->port_clock,
  75. &pipe_config->dp_m_n);
  76. pipe_config->dp_m_n.tu = slots;
  77. return true;
  78. }
  79. static void intel_mst_disable_dp(struct intel_encoder *encoder)
  80. {
  81. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  82. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  83. struct intel_dp *intel_dp = &intel_dig_port->dp;
  84. int ret;
  85. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  86. drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, intel_mst->port);
  87. ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
  88. if (ret) {
  89. DRM_ERROR("failed to update payload %d\n", ret);
  90. }
  91. }
  92. static void intel_mst_post_disable_dp(struct intel_encoder *encoder)
  93. {
  94. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  95. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  96. struct intel_dp *intel_dp = &intel_dig_port->dp;
  97. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  98. /* this can fail */
  99. drm_dp_check_act_status(&intel_dp->mst_mgr);
  100. /* and this can also fail */
  101. drm_dp_update_payload_part2(&intel_dp->mst_mgr);
  102. drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, intel_mst->port);
  103. intel_dp->active_mst_links--;
  104. intel_mst->port = NULL;
  105. if (intel_dp->active_mst_links == 0) {
  106. intel_dig_port->base.post_disable(&intel_dig_port->base);
  107. intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF);
  108. }
  109. }
  110. static void intel_mst_pre_enable_dp(struct intel_encoder *encoder)
  111. {
  112. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  113. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  114. struct intel_dp *intel_dp = &intel_dig_port->dp;
  115. struct drm_device *dev = encoder->base.dev;
  116. struct drm_i915_private *dev_priv = dev->dev_private;
  117. enum port port = intel_dig_port->port;
  118. int ret;
  119. uint32_t temp;
  120. struct intel_connector *found = NULL, *connector;
  121. int slots;
  122. struct drm_crtc *crtc = encoder->base.crtc;
  123. struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
  124. for_each_intel_connector(dev, connector) {
  125. if (connector->base.state->best_encoder == &encoder->base) {
  126. found = connector;
  127. break;
  128. }
  129. }
  130. if (!found) {
  131. DRM_ERROR("can't find connector\n");
  132. return;
  133. }
  134. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  135. intel_mst->port = found->port;
  136. if (intel_dp->active_mst_links == 0) {
  137. enum port port = intel_ddi_get_encoder_port(encoder);
  138. /* FIXME: add support for SKL */
  139. if (INTEL_INFO(dev)->gen < 9)
  140. I915_WRITE(PORT_CLK_SEL(port),
  141. intel_crtc->config->ddi_pll_sel);
  142. intel_ddi_init_dp_buf_reg(&intel_dig_port->base);
  143. intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
  144. intel_dp_start_link_train(intel_dp);
  145. intel_dp_complete_link_train(intel_dp);
  146. intel_dp_stop_link_train(intel_dp);
  147. }
  148. ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr,
  149. intel_mst->port,
  150. intel_crtc->config->pbn, &slots);
  151. if (ret == false) {
  152. DRM_ERROR("failed to allocate vcpi\n");
  153. return;
  154. }
  155. intel_dp->active_mst_links++;
  156. temp = I915_READ(DP_TP_STATUS(port));
  157. I915_WRITE(DP_TP_STATUS(port), temp);
  158. ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
  159. }
  160. static void intel_mst_enable_dp(struct intel_encoder *encoder)
  161. {
  162. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  163. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  164. struct intel_dp *intel_dp = &intel_dig_port->dp;
  165. struct drm_device *dev = intel_dig_port->base.base.dev;
  166. struct drm_i915_private *dev_priv = dev->dev_private;
  167. enum port port = intel_dig_port->port;
  168. int ret;
  169. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  170. if (wait_for((I915_READ(DP_TP_STATUS(port)) & DP_TP_STATUS_ACT_SENT),
  171. 1))
  172. DRM_ERROR("Timed out waiting for ACT sent\n");
  173. ret = drm_dp_check_act_status(&intel_dp->mst_mgr);
  174. ret = drm_dp_update_payload_part2(&intel_dp->mst_mgr);
  175. }
  176. static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder,
  177. enum pipe *pipe)
  178. {
  179. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  180. *pipe = intel_mst->pipe;
  181. if (intel_mst->port)
  182. return true;
  183. return false;
  184. }
  185. static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder,
  186. struct intel_crtc_state *pipe_config)
  187. {
  188. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  189. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  190. struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
  191. struct drm_device *dev = encoder->base.dev;
  192. struct drm_i915_private *dev_priv = dev->dev_private;
  193. enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
  194. u32 temp, flags = 0;
  195. pipe_config->has_dp_encoder = true;
  196. temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder));
  197. if (temp & TRANS_DDI_PHSYNC)
  198. flags |= DRM_MODE_FLAG_PHSYNC;
  199. else
  200. flags |= DRM_MODE_FLAG_NHSYNC;
  201. if (temp & TRANS_DDI_PVSYNC)
  202. flags |= DRM_MODE_FLAG_PVSYNC;
  203. else
  204. flags |= DRM_MODE_FLAG_NVSYNC;
  205. switch (temp & TRANS_DDI_BPC_MASK) {
  206. case TRANS_DDI_BPC_6:
  207. pipe_config->pipe_bpp = 18;
  208. break;
  209. case TRANS_DDI_BPC_8:
  210. pipe_config->pipe_bpp = 24;
  211. break;
  212. case TRANS_DDI_BPC_10:
  213. pipe_config->pipe_bpp = 30;
  214. break;
  215. case TRANS_DDI_BPC_12:
  216. pipe_config->pipe_bpp = 36;
  217. break;
  218. default:
  219. break;
  220. }
  221. pipe_config->base.adjusted_mode.flags |= flags;
  222. pipe_config->lane_count =
  223. ((temp & DDI_PORT_WIDTH_MASK) >> DDI_PORT_WIDTH_SHIFT) + 1;
  224. intel_dp_get_m_n(crtc, pipe_config);
  225. intel_ddi_clock_get(&intel_dig_port->base, pipe_config);
  226. }
  227. static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector)
  228. {
  229. struct intel_connector *intel_connector = to_intel_connector(connector);
  230. struct intel_dp *intel_dp = intel_connector->mst_port;
  231. struct edid *edid;
  232. int ret;
  233. edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port);
  234. if (!edid)
  235. return 0;
  236. ret = intel_connector_update_modes(connector, edid);
  237. kfree(edid);
  238. return ret;
  239. }
  240. static enum drm_connector_status
  241. intel_dp_mst_detect(struct drm_connector *connector, bool force)
  242. {
  243. struct intel_connector *intel_connector = to_intel_connector(connector);
  244. struct intel_dp *intel_dp = intel_connector->mst_port;
  245. return drm_dp_mst_detect_port(connector, &intel_dp->mst_mgr, intel_connector->port);
  246. }
  247. static int
  248. intel_dp_mst_set_property(struct drm_connector *connector,
  249. struct drm_property *property,
  250. uint64_t val)
  251. {
  252. return 0;
  253. }
  254. static void
  255. intel_dp_mst_connector_destroy(struct drm_connector *connector)
  256. {
  257. struct intel_connector *intel_connector = to_intel_connector(connector);
  258. if (!IS_ERR_OR_NULL(intel_connector->edid))
  259. kfree(intel_connector->edid);
  260. drm_connector_cleanup(connector);
  261. kfree(connector);
  262. }
  263. static const struct drm_connector_funcs intel_dp_mst_connector_funcs = {
  264. .dpms = drm_atomic_helper_connector_dpms,
  265. .detect = intel_dp_mst_detect,
  266. .fill_modes = drm_helper_probe_single_connector_modes,
  267. .set_property = intel_dp_mst_set_property,
  268. .atomic_get_property = intel_connector_atomic_get_property,
  269. .destroy = intel_dp_mst_connector_destroy,
  270. .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
  271. .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
  272. };
  273. static int intel_dp_mst_get_modes(struct drm_connector *connector)
  274. {
  275. return intel_dp_mst_get_ddc_modes(connector);
  276. }
  277. static enum drm_mode_status
  278. intel_dp_mst_mode_valid(struct drm_connector *connector,
  279. struct drm_display_mode *mode)
  280. {
  281. /* TODO - validate mode against available PBN for link */
  282. if (mode->clock < 10000)
  283. return MODE_CLOCK_LOW;
  284. if (mode->flags & DRM_MODE_FLAG_DBLCLK)
  285. return MODE_H_ILLEGAL;
  286. return MODE_OK;
  287. }
  288. static struct drm_encoder *intel_mst_atomic_best_encoder(struct drm_connector *connector,
  289. struct drm_connector_state *state)
  290. {
  291. struct intel_connector *intel_connector = to_intel_connector(connector);
  292. struct intel_dp *intel_dp = intel_connector->mst_port;
  293. struct intel_crtc *crtc = to_intel_crtc(state->crtc);
  294. return &intel_dp->mst_encoders[crtc->pipe]->base.base;
  295. }
  296. static struct drm_encoder *intel_mst_best_encoder(struct drm_connector *connector)
  297. {
  298. struct intel_connector *intel_connector = to_intel_connector(connector);
  299. struct intel_dp *intel_dp = intel_connector->mst_port;
  300. return &intel_dp->mst_encoders[0]->base.base;
  301. }
  302. static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = {
  303. .get_modes = intel_dp_mst_get_modes,
  304. .mode_valid = intel_dp_mst_mode_valid,
  305. .atomic_best_encoder = intel_mst_atomic_best_encoder,
  306. .best_encoder = intel_mst_best_encoder,
  307. };
  308. static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder)
  309. {
  310. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
  311. drm_encoder_cleanup(encoder);
  312. kfree(intel_mst);
  313. }
  314. static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = {
  315. .destroy = intel_dp_mst_encoder_destroy,
  316. };
  317. static bool intel_dp_mst_get_hw_state(struct intel_connector *connector)
  318. {
  319. if (connector->encoder) {
  320. enum pipe pipe;
  321. if (!connector->encoder->get_hw_state(connector->encoder, &pipe))
  322. return false;
  323. return true;
  324. }
  325. return false;
  326. }
  327. static void intel_connector_add_to_fbdev(struct intel_connector *connector)
  328. {
  329. #ifdef CONFIG_DRM_I915_FBDEV
  330. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  331. drm_fb_helper_add_one_connector(&dev_priv->fbdev->helper, &connector->base);
  332. #endif
  333. }
  334. static void intel_connector_remove_from_fbdev(struct intel_connector *connector)
  335. {
  336. #ifdef CONFIG_DRM_I915_FBDEV
  337. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  338. drm_fb_helper_remove_one_connector(&dev_priv->fbdev->helper, &connector->base);
  339. #endif
  340. }
  341. static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop)
  342. {
  343. struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
  344. struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
  345. struct drm_device *dev = intel_dig_port->base.base.dev;
  346. struct intel_connector *intel_connector;
  347. struct drm_connector *connector;
  348. int i;
  349. intel_connector = intel_connector_alloc();
  350. if (!intel_connector)
  351. return NULL;
  352. connector = &intel_connector->base;
  353. drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs, DRM_MODE_CONNECTOR_DisplayPort);
  354. drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs);
  355. intel_connector->unregister = intel_connector_unregister;
  356. intel_connector->get_hw_state = intel_dp_mst_get_hw_state;
  357. intel_connector->mst_port = intel_dp;
  358. intel_connector->port = port;
  359. for (i = PIPE_A; i <= PIPE_C; i++) {
  360. drm_mode_connector_attach_encoder(&intel_connector->base,
  361. &intel_dp->mst_encoders[i]->base.base);
  362. }
  363. intel_dp_add_properties(intel_dp, connector);
  364. drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
  365. drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0);
  366. drm_mode_connector_set_path_property(connector, pathprop);
  367. drm_modeset_lock_all(dev);
  368. intel_connector_add_to_fbdev(intel_connector);
  369. drm_modeset_unlock_all(dev);
  370. drm_connector_register(&intel_connector->base);
  371. return connector;
  372. }
  373. static void intel_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
  374. struct drm_connector *connector)
  375. {
  376. struct intel_connector *intel_connector = to_intel_connector(connector);
  377. struct drm_device *dev = connector->dev;
  378. /* need to nuke the connector */
  379. drm_modeset_lock_all(dev);
  380. if (connector->state->crtc) {
  381. struct drm_mode_set set;
  382. int ret;
  383. memset(&set, 0, sizeof(set));
  384. set.crtc = connector->state->crtc,
  385. ret = drm_atomic_helper_set_config(&set);
  386. WARN(ret, "Disabling mst crtc failed with %i\n", ret);
  387. }
  388. drm_modeset_unlock_all(dev);
  389. intel_connector->unregister(intel_connector);
  390. drm_modeset_lock_all(dev);
  391. intel_connector_remove_from_fbdev(intel_connector);
  392. drm_connector_cleanup(connector);
  393. drm_modeset_unlock_all(dev);
  394. kfree(intel_connector);
  395. DRM_DEBUG_KMS("\n");
  396. }
  397. static void intel_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr)
  398. {
  399. struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
  400. struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
  401. struct drm_device *dev = intel_dig_port->base.base.dev;
  402. drm_kms_helper_hotplug_event(dev);
  403. }
  404. static struct drm_dp_mst_topology_cbs mst_cbs = {
  405. .add_connector = intel_dp_add_mst_connector,
  406. .destroy_connector = intel_dp_destroy_mst_connector,
  407. .hotplug = intel_dp_mst_hotplug,
  408. };
  409. static struct intel_dp_mst_encoder *
  410. intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe)
  411. {
  412. struct intel_dp_mst_encoder *intel_mst;
  413. struct intel_encoder *intel_encoder;
  414. struct drm_device *dev = intel_dig_port->base.base.dev;
  415. intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL);
  416. if (!intel_mst)
  417. return NULL;
  418. intel_mst->pipe = pipe;
  419. intel_encoder = &intel_mst->base;
  420. intel_mst->primary = intel_dig_port;
  421. drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs,
  422. DRM_MODE_ENCODER_DPMST);
  423. intel_encoder->type = INTEL_OUTPUT_DP_MST;
  424. intel_encoder->crtc_mask = 0x7;
  425. intel_encoder->cloneable = 0;
  426. intel_encoder->compute_config = intel_dp_mst_compute_config;
  427. intel_encoder->disable = intel_mst_disable_dp;
  428. intel_encoder->post_disable = intel_mst_post_disable_dp;
  429. intel_encoder->pre_enable = intel_mst_pre_enable_dp;
  430. intel_encoder->enable = intel_mst_enable_dp;
  431. intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state;
  432. intel_encoder->get_config = intel_dp_mst_enc_get_config;
  433. return intel_mst;
  434. }
  435. static bool
  436. intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port)
  437. {
  438. int i;
  439. struct intel_dp *intel_dp = &intel_dig_port->dp;
  440. for (i = PIPE_A; i <= PIPE_C; i++)
  441. intel_dp->mst_encoders[i] = intel_dp_create_fake_mst_encoder(intel_dig_port, i);
  442. return true;
  443. }
  444. int
  445. intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id)
  446. {
  447. struct intel_dp *intel_dp = &intel_dig_port->dp;
  448. struct drm_device *dev = intel_dig_port->base.base.dev;
  449. int ret;
  450. intel_dp->can_mst = true;
  451. intel_dp->mst_mgr.cbs = &mst_cbs;
  452. /* create encoders */
  453. intel_dp_create_fake_mst_encoders(intel_dig_port);
  454. ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, dev->dev, &intel_dp->aux, 16, 3, conn_base_id);
  455. if (ret) {
  456. intel_dp->can_mst = false;
  457. return ret;
  458. }
  459. return 0;
  460. }
  461. void
  462. intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port)
  463. {
  464. struct intel_dp *intel_dp = &intel_dig_port->dp;
  465. if (!intel_dp->can_mst)
  466. return;
  467. drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr);
  468. /* encoders will get killed by normal cleanup */
  469. }