davinci-pcm.c 24 KB

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  1. /*
  2. * ALSA PCM interface for the TI DAVINCI processor
  3. *
  4. * Author: Vladimir Barinov, <vbarinov@embeddedalley.com>
  5. * Copyright: (C) 2007 MontaVista Software, Inc., <source@mvista.com>
  6. * added SRAM ping/pong (C) 2008 Troy Kisky <troy.kisky@boundarydevices.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/init.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/slab.h>
  16. #include <linux/dma-mapping.h>
  17. #include <linux/kernel.h>
  18. #include <linux/genalloc.h>
  19. #include <linux/platform_data/edma.h>
  20. #include <sound/core.h>
  21. #include <sound/pcm.h>
  22. #include <sound/pcm_params.h>
  23. #include <sound/soc.h>
  24. #include <asm/dma.h>
  25. #include "davinci-pcm.h"
  26. #ifdef DEBUG
  27. static void print_buf_info(int slot, char *name)
  28. {
  29. struct edmacc_param p;
  30. if (slot < 0)
  31. return;
  32. edma_read_slot(slot, &p);
  33. printk(KERN_DEBUG "%s: 0x%x, opt=%x, src=%x, a_b_cnt=%x dst=%x\n",
  34. name, slot, p.opt, p.src, p.a_b_cnt, p.dst);
  35. printk(KERN_DEBUG " src_dst_bidx=%x link_bcntrld=%x src_dst_cidx=%x ccnt=%x\n",
  36. p.src_dst_bidx, p.link_bcntrld, p.src_dst_cidx, p.ccnt);
  37. }
  38. #else
  39. static void print_buf_info(int slot, char *name)
  40. {
  41. }
  42. #endif
  43. static struct snd_pcm_hardware pcm_hardware_playback = {
  44. .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER |
  45. SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
  46. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME|
  47. SNDRV_PCM_INFO_BATCH),
  48. .buffer_bytes_max = 128 * 1024,
  49. .period_bytes_min = 32,
  50. .period_bytes_max = 8 * 1024,
  51. .periods_min = 16,
  52. .periods_max = 255,
  53. .fifo_size = 0,
  54. };
  55. static struct snd_pcm_hardware pcm_hardware_capture = {
  56. .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER |
  57. SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
  58. SNDRV_PCM_INFO_PAUSE |
  59. SNDRV_PCM_INFO_BATCH),
  60. .buffer_bytes_max = 128 * 1024,
  61. .period_bytes_min = 32,
  62. .period_bytes_max = 8 * 1024,
  63. .periods_min = 16,
  64. .periods_max = 255,
  65. .fifo_size = 0,
  66. };
  67. /*
  68. * How ping/pong works....
  69. *
  70. * Playback:
  71. * ram_params - copys 2*ping_size from start of SDRAM to iram,
  72. * links to ram_link2
  73. * ram_link2 - copys rest of SDRAM to iram in ping_size units,
  74. * links to ram_link
  75. * ram_link - copys entire SDRAM to iram in ping_size uints,
  76. * links to self
  77. *
  78. * asp_params - same as asp_link[0]
  79. * asp_link[0] - copys from lower half of iram to asp port
  80. * links to asp_link[1], triggers iram copy event on completion
  81. * asp_link[1] - copys from upper half of iram to asp port
  82. * links to asp_link[0], triggers iram copy event on completion
  83. * triggers interrupt only needed to let upper SOC levels update position
  84. * in stream on completion
  85. *
  86. * When playback is started:
  87. * ram_params started
  88. * asp_params started
  89. *
  90. * Capture:
  91. * ram_params - same as ram_link,
  92. * links to ram_link
  93. * ram_link - same as playback
  94. * links to self
  95. *
  96. * asp_params - same as playback
  97. * asp_link[0] - same as playback
  98. * asp_link[1] - same as playback
  99. *
  100. * When capture is started:
  101. * asp_params started
  102. */
  103. struct davinci_runtime_data {
  104. spinlock_t lock;
  105. int period; /* current DMA period */
  106. int asp_channel; /* Master DMA channel */
  107. int asp_link[2]; /* asp parameter link channel, ping/pong */
  108. struct davinci_pcm_dma_params *params; /* DMA params */
  109. int ram_channel;
  110. int ram_link;
  111. int ram_link2;
  112. struct edmacc_param asp_params;
  113. struct edmacc_param ram_params;
  114. };
  115. static void davinci_pcm_period_elapsed(struct snd_pcm_substream *substream)
  116. {
  117. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  118. struct snd_pcm_runtime *runtime = substream->runtime;
  119. prtd->period++;
  120. if (unlikely(prtd->period >= runtime->periods))
  121. prtd->period = 0;
  122. }
  123. static void davinci_pcm_period_reset(struct snd_pcm_substream *substream)
  124. {
  125. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  126. prtd->period = 0;
  127. }
  128. /*
  129. * Not used with ping/pong
  130. */
  131. static void davinci_pcm_enqueue_dma(struct snd_pcm_substream *substream)
  132. {
  133. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  134. struct snd_pcm_runtime *runtime = substream->runtime;
  135. unsigned int period_size;
  136. unsigned int dma_offset;
  137. dma_addr_t dma_pos;
  138. dma_addr_t src, dst;
  139. unsigned short src_bidx, dst_bidx;
  140. unsigned short src_cidx, dst_cidx;
  141. unsigned int data_type;
  142. unsigned short acnt;
  143. unsigned int count;
  144. unsigned int fifo_level;
  145. period_size = snd_pcm_lib_period_bytes(substream);
  146. dma_offset = prtd->period * period_size;
  147. dma_pos = runtime->dma_addr + dma_offset;
  148. fifo_level = prtd->params->fifo_level;
  149. pr_debug("davinci_pcm: audio_set_dma_params_play channel = %d "
  150. "dma_ptr = %x period_size=%x\n", prtd->asp_link[0], dma_pos,
  151. period_size);
  152. data_type = prtd->params->data_type;
  153. count = period_size / data_type;
  154. if (fifo_level)
  155. count /= fifo_level;
  156. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  157. src = dma_pos;
  158. dst = prtd->params->dma_addr;
  159. src_bidx = data_type;
  160. dst_bidx = 4;
  161. src_cidx = data_type * fifo_level;
  162. dst_cidx = 0;
  163. } else {
  164. src = prtd->params->dma_addr;
  165. dst = dma_pos;
  166. src_bidx = 0;
  167. dst_bidx = data_type;
  168. src_cidx = 0;
  169. dst_cidx = data_type * fifo_level;
  170. }
  171. acnt = prtd->params->acnt;
  172. edma_set_src(prtd->asp_link[0], src, INCR, W8BIT);
  173. edma_set_dest(prtd->asp_link[0], dst, INCR, W8BIT);
  174. edma_set_src_index(prtd->asp_link[0], src_bidx, src_cidx);
  175. edma_set_dest_index(prtd->asp_link[0], dst_bidx, dst_cidx);
  176. if (!fifo_level)
  177. edma_set_transfer_params(prtd->asp_link[0], acnt, count, 1, 0,
  178. ASYNC);
  179. else
  180. edma_set_transfer_params(prtd->asp_link[0], acnt,
  181. fifo_level,
  182. count, fifo_level,
  183. ABSYNC);
  184. }
  185. static void davinci_pcm_dma_irq(unsigned link, u16 ch_status, void *data)
  186. {
  187. struct snd_pcm_substream *substream = data;
  188. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  189. print_buf_info(prtd->ram_channel, "i ram_channel");
  190. pr_debug("davinci_pcm: link=%d, status=0x%x\n", link, ch_status);
  191. if (unlikely(ch_status != EDMA_DMA_COMPLETE))
  192. return;
  193. if (snd_pcm_running(substream)) {
  194. spin_lock(&prtd->lock);
  195. if (prtd->ram_channel < 0) {
  196. /* No ping/pong must fix up link dma data*/
  197. davinci_pcm_enqueue_dma(substream);
  198. }
  199. davinci_pcm_period_elapsed(substream);
  200. spin_unlock(&prtd->lock);
  201. snd_pcm_period_elapsed(substream);
  202. }
  203. }
  204. #ifdef CONFIG_GENERIC_ALLOCATOR
  205. static int allocate_sram(struct snd_pcm_substream *substream,
  206. struct gen_pool *sram_pool, unsigned size,
  207. struct snd_pcm_hardware *ppcm)
  208. {
  209. struct snd_dma_buffer *buf = &substream->dma_buffer;
  210. struct snd_dma_buffer *iram_dma = NULL;
  211. dma_addr_t iram_phys = 0;
  212. void *iram_virt = NULL;
  213. if (buf->private_data || !size)
  214. return 0;
  215. ppcm->period_bytes_max = size;
  216. iram_virt = gen_pool_dma_alloc(sram_pool, size, &iram_phys);
  217. if (!iram_virt)
  218. goto exit1;
  219. iram_dma = kzalloc(sizeof(*iram_dma), GFP_KERNEL);
  220. if (!iram_dma)
  221. goto exit2;
  222. iram_dma->area = iram_virt;
  223. iram_dma->addr = iram_phys;
  224. memset(iram_dma->area, 0, size);
  225. iram_dma->bytes = size;
  226. buf->private_data = iram_dma;
  227. return 0;
  228. exit2:
  229. if (iram_virt)
  230. gen_pool_free(sram_pool, (unsigned)iram_virt, size);
  231. exit1:
  232. return -ENOMEM;
  233. }
  234. static void davinci_free_sram(struct snd_pcm_substream *substream,
  235. struct snd_dma_buffer *iram_dma)
  236. {
  237. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  238. struct gen_pool *sram_pool = prtd->params->sram_pool;
  239. gen_pool_free(sram_pool, (unsigned) iram_dma->area, iram_dma->bytes);
  240. }
  241. #else
  242. static int allocate_sram(struct snd_pcm_substream *substream,
  243. struct gen_pool *sram_pool, unsigned size,
  244. struct snd_pcm_hardware *ppcm)
  245. {
  246. return 0;
  247. }
  248. static void davinci_free_sram(struct snd_pcm_substream *substream,
  249. struct snd_dma_buffer *iram_dma)
  250. {
  251. }
  252. #endif
  253. /*
  254. * Only used with ping/pong.
  255. * This is called after runtime->dma_addr, period_bytes and data_type are valid
  256. */
  257. static int ping_pong_dma_setup(struct snd_pcm_substream *substream)
  258. {
  259. unsigned short ram_src_cidx, ram_dst_cidx;
  260. struct snd_pcm_runtime *runtime = substream->runtime;
  261. struct davinci_runtime_data *prtd = runtime->private_data;
  262. struct snd_dma_buffer *iram_dma =
  263. (struct snd_dma_buffer *)substream->dma_buffer.private_data;
  264. struct davinci_pcm_dma_params *params = prtd->params;
  265. unsigned int data_type = params->data_type;
  266. unsigned int acnt = params->acnt;
  267. /* divide by 2 for ping/pong */
  268. unsigned int ping_size = snd_pcm_lib_period_bytes(substream) >> 1;
  269. unsigned int fifo_level = prtd->params->fifo_level;
  270. unsigned int count;
  271. if ((data_type == 0) || (data_type > 4)) {
  272. printk(KERN_ERR "%s: data_type=%i\n", __func__, data_type);
  273. return -EINVAL;
  274. }
  275. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  276. dma_addr_t asp_src_pong = iram_dma->addr + ping_size;
  277. ram_src_cidx = ping_size;
  278. ram_dst_cidx = -ping_size;
  279. edma_set_src(prtd->asp_link[1], asp_src_pong, INCR, W8BIT);
  280. edma_set_src_index(prtd->asp_link[0], data_type,
  281. data_type * fifo_level);
  282. edma_set_src_index(prtd->asp_link[1], data_type,
  283. data_type * fifo_level);
  284. edma_set_src(prtd->ram_link, runtime->dma_addr, INCR, W32BIT);
  285. } else {
  286. dma_addr_t asp_dst_pong = iram_dma->addr + ping_size;
  287. ram_src_cidx = -ping_size;
  288. ram_dst_cidx = ping_size;
  289. edma_set_dest(prtd->asp_link[1], asp_dst_pong, INCR, W8BIT);
  290. edma_set_dest_index(prtd->asp_link[0], data_type,
  291. data_type * fifo_level);
  292. edma_set_dest_index(prtd->asp_link[1], data_type,
  293. data_type * fifo_level);
  294. edma_set_dest(prtd->ram_link, runtime->dma_addr, INCR, W32BIT);
  295. }
  296. if (!fifo_level) {
  297. count = ping_size / data_type;
  298. edma_set_transfer_params(prtd->asp_link[0], acnt, count,
  299. 1, 0, ASYNC);
  300. edma_set_transfer_params(prtd->asp_link[1], acnt, count,
  301. 1, 0, ASYNC);
  302. } else {
  303. count = ping_size / (data_type * fifo_level);
  304. edma_set_transfer_params(prtd->asp_link[0], acnt, fifo_level,
  305. count, fifo_level, ABSYNC);
  306. edma_set_transfer_params(prtd->asp_link[1], acnt, fifo_level,
  307. count, fifo_level, ABSYNC);
  308. }
  309. edma_set_src_index(prtd->ram_link, ping_size, ram_src_cidx);
  310. edma_set_dest_index(prtd->ram_link, ping_size, ram_dst_cidx);
  311. edma_set_transfer_params(prtd->ram_link, ping_size, 2,
  312. runtime->periods, 2, ASYNC);
  313. /* init master params */
  314. edma_read_slot(prtd->asp_link[0], &prtd->asp_params);
  315. edma_read_slot(prtd->ram_link, &prtd->ram_params);
  316. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  317. struct edmacc_param p_ram;
  318. /* Copy entire iram buffer before playback started */
  319. prtd->ram_params.a_b_cnt = (1 << 16) | (ping_size << 1);
  320. /* 0 dst_bidx */
  321. prtd->ram_params.src_dst_bidx = (ping_size << 1);
  322. /* 0 dst_cidx */
  323. prtd->ram_params.src_dst_cidx = (ping_size << 1);
  324. prtd->ram_params.ccnt = 1;
  325. /* Skip 1st period */
  326. edma_read_slot(prtd->ram_link, &p_ram);
  327. p_ram.src += (ping_size << 1);
  328. p_ram.ccnt -= 1;
  329. edma_write_slot(prtd->ram_link2, &p_ram);
  330. /*
  331. * When 1st started, ram -> iram dma channel will fill the
  332. * entire iram. Then, whenever a ping/pong asp buffer finishes,
  333. * 1/2 iram will be filled.
  334. */
  335. prtd->ram_params.link_bcntrld =
  336. EDMA_CHAN_SLOT(prtd->ram_link2) << 5;
  337. }
  338. return 0;
  339. }
  340. /* 1 asp tx or rx channel using 2 parameter channels
  341. * 1 ram to/from iram channel using 1 parameter channel
  342. *
  343. * Playback
  344. * ram copy channel kicks off first,
  345. * 1st ram copy of entire iram buffer completion kicks off asp channel
  346. * asp tcc always kicks off ram copy of 1/2 iram buffer
  347. *
  348. * Record
  349. * asp channel starts, tcc kicks off ram copy
  350. */
  351. static int request_ping_pong(struct snd_pcm_substream *substream,
  352. struct davinci_runtime_data *prtd,
  353. struct snd_dma_buffer *iram_dma)
  354. {
  355. dma_addr_t asp_src_ping;
  356. dma_addr_t asp_dst_ping;
  357. int ret;
  358. struct davinci_pcm_dma_params *params = prtd->params;
  359. /* Request ram master channel */
  360. ret = prtd->ram_channel = edma_alloc_channel(EDMA_CHANNEL_ANY,
  361. davinci_pcm_dma_irq, substream,
  362. prtd->params->ram_chan_q);
  363. if (ret < 0)
  364. goto exit1;
  365. /* Request ram link channel */
  366. ret = prtd->ram_link = edma_alloc_slot(
  367. EDMA_CTLR(prtd->ram_channel), EDMA_SLOT_ANY);
  368. if (ret < 0)
  369. goto exit2;
  370. ret = prtd->asp_link[1] = edma_alloc_slot(
  371. EDMA_CTLR(prtd->asp_channel), EDMA_SLOT_ANY);
  372. if (ret < 0)
  373. goto exit3;
  374. prtd->ram_link2 = -1;
  375. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  376. ret = prtd->ram_link2 = edma_alloc_slot(
  377. EDMA_CTLR(prtd->ram_channel), EDMA_SLOT_ANY);
  378. if (ret < 0)
  379. goto exit4;
  380. }
  381. /* circle ping-pong buffers */
  382. edma_link(prtd->asp_link[0], prtd->asp_link[1]);
  383. edma_link(prtd->asp_link[1], prtd->asp_link[0]);
  384. /* circle ram buffers */
  385. edma_link(prtd->ram_link, prtd->ram_link);
  386. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  387. asp_src_ping = iram_dma->addr;
  388. asp_dst_ping = params->dma_addr; /* fifo */
  389. } else {
  390. asp_src_ping = params->dma_addr; /* fifo */
  391. asp_dst_ping = iram_dma->addr;
  392. }
  393. /* ping */
  394. edma_set_src(prtd->asp_link[0], asp_src_ping, INCR, W16BIT);
  395. edma_set_dest(prtd->asp_link[0], asp_dst_ping, INCR, W16BIT);
  396. edma_set_src_index(prtd->asp_link[0], 0, 0);
  397. edma_set_dest_index(prtd->asp_link[0], 0, 0);
  398. edma_read_slot(prtd->asp_link[0], &prtd->asp_params);
  399. prtd->asp_params.opt &= ~(TCCMODE | EDMA_TCC(0x3f) | TCINTEN);
  400. prtd->asp_params.opt |= TCCHEN |
  401. EDMA_TCC(prtd->ram_channel & 0x3f);
  402. edma_write_slot(prtd->asp_link[0], &prtd->asp_params);
  403. /* pong */
  404. edma_set_src(prtd->asp_link[1], asp_src_ping, INCR, W16BIT);
  405. edma_set_dest(prtd->asp_link[1], asp_dst_ping, INCR, W16BIT);
  406. edma_set_src_index(prtd->asp_link[1], 0, 0);
  407. edma_set_dest_index(prtd->asp_link[1], 0, 0);
  408. edma_read_slot(prtd->asp_link[1], &prtd->asp_params);
  409. prtd->asp_params.opt &= ~(TCCMODE | EDMA_TCC(0x3f));
  410. /* interrupt after every pong completion */
  411. prtd->asp_params.opt |= TCINTEN | TCCHEN |
  412. EDMA_TCC(prtd->ram_channel & 0x3f);
  413. edma_write_slot(prtd->asp_link[1], &prtd->asp_params);
  414. /* ram */
  415. edma_set_src(prtd->ram_link, iram_dma->addr, INCR, W32BIT);
  416. edma_set_dest(prtd->ram_link, iram_dma->addr, INCR, W32BIT);
  417. pr_debug("%s: audio dma channels/slots in use for ram:%u %u %u,"
  418. "for asp:%u %u %u\n", __func__,
  419. prtd->ram_channel, prtd->ram_link, prtd->ram_link2,
  420. prtd->asp_channel, prtd->asp_link[0],
  421. prtd->asp_link[1]);
  422. return 0;
  423. exit4:
  424. edma_free_channel(prtd->asp_link[1]);
  425. prtd->asp_link[1] = -1;
  426. exit3:
  427. edma_free_channel(prtd->ram_link);
  428. prtd->ram_link = -1;
  429. exit2:
  430. edma_free_channel(prtd->ram_channel);
  431. prtd->ram_channel = -1;
  432. exit1:
  433. return ret;
  434. }
  435. static int davinci_pcm_dma_request(struct snd_pcm_substream *substream)
  436. {
  437. struct snd_dma_buffer *iram_dma;
  438. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  439. struct davinci_pcm_dma_params *params = prtd->params;
  440. int ret;
  441. if (!params)
  442. return -ENODEV;
  443. /* Request asp master DMA channel */
  444. ret = prtd->asp_channel = edma_alloc_channel(params->channel,
  445. davinci_pcm_dma_irq, substream,
  446. prtd->params->asp_chan_q);
  447. if (ret < 0)
  448. goto exit1;
  449. /* Request asp link channels */
  450. ret = prtd->asp_link[0] = edma_alloc_slot(
  451. EDMA_CTLR(prtd->asp_channel), EDMA_SLOT_ANY);
  452. if (ret < 0)
  453. goto exit2;
  454. iram_dma = (struct snd_dma_buffer *)substream->dma_buffer.private_data;
  455. if (iram_dma) {
  456. if (request_ping_pong(substream, prtd, iram_dma) == 0)
  457. return 0;
  458. printk(KERN_WARNING "%s: dma channel allocation failed,"
  459. "not using sram\n", __func__);
  460. }
  461. /* Issue transfer completion IRQ when the channel completes a
  462. * transfer, then always reload from the same slot (by a kind
  463. * of loopback link). The completion IRQ handler will update
  464. * the reload slot with a new buffer.
  465. *
  466. * REVISIT save p_ram here after setting up everything except
  467. * the buffer and its length (ccnt) ... use it as a template
  468. * so davinci_pcm_enqueue_dma() takes less time in IRQ.
  469. */
  470. edma_read_slot(prtd->asp_link[0], &prtd->asp_params);
  471. prtd->asp_params.opt |= TCINTEN |
  472. EDMA_TCC(EDMA_CHAN_SLOT(prtd->asp_channel));
  473. prtd->asp_params.link_bcntrld = EDMA_CHAN_SLOT(prtd->asp_link[0]) << 5;
  474. edma_write_slot(prtd->asp_link[0], &prtd->asp_params);
  475. return 0;
  476. exit2:
  477. edma_free_channel(prtd->asp_channel);
  478. prtd->asp_channel = -1;
  479. exit1:
  480. return ret;
  481. }
  482. static int davinci_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
  483. {
  484. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  485. int ret = 0;
  486. spin_lock(&prtd->lock);
  487. switch (cmd) {
  488. case SNDRV_PCM_TRIGGER_START:
  489. edma_start(prtd->asp_channel);
  490. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK &&
  491. prtd->ram_channel >= 0) {
  492. /* copy 1st iram buffer */
  493. edma_start(prtd->ram_channel);
  494. }
  495. break;
  496. case SNDRV_PCM_TRIGGER_RESUME:
  497. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  498. edma_resume(prtd->asp_channel);
  499. break;
  500. case SNDRV_PCM_TRIGGER_STOP:
  501. case SNDRV_PCM_TRIGGER_SUSPEND:
  502. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  503. edma_pause(prtd->asp_channel);
  504. break;
  505. default:
  506. ret = -EINVAL;
  507. break;
  508. }
  509. spin_unlock(&prtd->lock);
  510. return ret;
  511. }
  512. static int davinci_pcm_prepare(struct snd_pcm_substream *substream)
  513. {
  514. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  515. davinci_pcm_period_reset(substream);
  516. if (prtd->ram_channel >= 0) {
  517. int ret = ping_pong_dma_setup(substream);
  518. if (ret < 0)
  519. return ret;
  520. edma_write_slot(prtd->ram_channel, &prtd->ram_params);
  521. edma_write_slot(prtd->asp_channel, &prtd->asp_params);
  522. print_buf_info(prtd->ram_channel, "ram_channel");
  523. print_buf_info(prtd->ram_link, "ram_link");
  524. print_buf_info(prtd->ram_link2, "ram_link2");
  525. print_buf_info(prtd->asp_channel, "asp_channel");
  526. print_buf_info(prtd->asp_link[0], "asp_link[0]");
  527. print_buf_info(prtd->asp_link[1], "asp_link[1]");
  528. /*
  529. * There is a phase offset of 2 periods between the position
  530. * used by dma setup and the position reported in the pointer
  531. * function.
  532. *
  533. * The phase offset, when not using ping-pong buffers, is due to
  534. * the two consecutive calls to davinci_pcm_enqueue_dma() below.
  535. *
  536. * Whereas here, with ping-pong buffers, the phase is due to
  537. * there being an entire buffer transfer complete before the
  538. * first dma completion event triggers davinci_pcm_dma_irq().
  539. */
  540. davinci_pcm_period_elapsed(substream);
  541. davinci_pcm_period_elapsed(substream);
  542. return 0;
  543. }
  544. davinci_pcm_enqueue_dma(substream);
  545. davinci_pcm_period_elapsed(substream);
  546. /* Copy self-linked parameter RAM entry into master channel */
  547. edma_read_slot(prtd->asp_link[0], &prtd->asp_params);
  548. edma_write_slot(prtd->asp_channel, &prtd->asp_params);
  549. davinci_pcm_enqueue_dma(substream);
  550. davinci_pcm_period_elapsed(substream);
  551. return 0;
  552. }
  553. static snd_pcm_uframes_t
  554. davinci_pcm_pointer(struct snd_pcm_substream *substream)
  555. {
  556. struct snd_pcm_runtime *runtime = substream->runtime;
  557. struct davinci_runtime_data *prtd = runtime->private_data;
  558. unsigned int offset;
  559. int asp_count;
  560. unsigned int period_size = snd_pcm_lib_period_bytes(substream);
  561. /*
  562. * There is a phase offset of 2 periods between the position used by dma
  563. * setup and the position reported in the pointer function. Either +2 in
  564. * the dma setup or -2 here in the pointer function (with wrapping,
  565. * both) accounts for this offset -- choose the latter since it makes
  566. * the first-time setup clearer.
  567. */
  568. spin_lock(&prtd->lock);
  569. asp_count = prtd->period - 2;
  570. spin_unlock(&prtd->lock);
  571. if (asp_count < 0)
  572. asp_count += runtime->periods;
  573. asp_count *= period_size;
  574. offset = bytes_to_frames(runtime, asp_count);
  575. if (offset >= runtime->buffer_size)
  576. offset = 0;
  577. return offset;
  578. }
  579. static int davinci_pcm_open(struct snd_pcm_substream *substream)
  580. {
  581. struct snd_pcm_runtime *runtime = substream->runtime;
  582. struct davinci_runtime_data *prtd;
  583. struct snd_pcm_hardware *ppcm;
  584. int ret = 0;
  585. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  586. struct davinci_pcm_dma_params *pa;
  587. struct davinci_pcm_dma_params *params;
  588. pa = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
  589. if (!pa)
  590. return -ENODEV;
  591. params = &pa[substream->stream];
  592. ppcm = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
  593. &pcm_hardware_playback : &pcm_hardware_capture;
  594. allocate_sram(substream, params->sram_pool, params->sram_size, ppcm);
  595. snd_soc_set_runtime_hwparams(substream, ppcm);
  596. /* ensure that buffer size is a multiple of period size */
  597. ret = snd_pcm_hw_constraint_integer(runtime,
  598. SNDRV_PCM_HW_PARAM_PERIODS);
  599. if (ret < 0)
  600. return ret;
  601. prtd = kzalloc(sizeof(struct davinci_runtime_data), GFP_KERNEL);
  602. if (prtd == NULL)
  603. return -ENOMEM;
  604. spin_lock_init(&prtd->lock);
  605. prtd->params = params;
  606. prtd->asp_channel = -1;
  607. prtd->asp_link[0] = prtd->asp_link[1] = -1;
  608. prtd->ram_channel = -1;
  609. prtd->ram_link = -1;
  610. prtd->ram_link2 = -1;
  611. runtime->private_data = prtd;
  612. ret = davinci_pcm_dma_request(substream);
  613. if (ret) {
  614. printk(KERN_ERR "davinci_pcm: Failed to get dma channels\n");
  615. kfree(prtd);
  616. }
  617. return ret;
  618. }
  619. static int davinci_pcm_close(struct snd_pcm_substream *substream)
  620. {
  621. struct snd_pcm_runtime *runtime = substream->runtime;
  622. struct davinci_runtime_data *prtd = runtime->private_data;
  623. if (prtd->ram_channel >= 0)
  624. edma_stop(prtd->ram_channel);
  625. if (prtd->asp_channel >= 0)
  626. edma_stop(prtd->asp_channel);
  627. if (prtd->asp_link[0] >= 0)
  628. edma_unlink(prtd->asp_link[0]);
  629. if (prtd->asp_link[1] >= 0)
  630. edma_unlink(prtd->asp_link[1]);
  631. if (prtd->ram_link >= 0)
  632. edma_unlink(prtd->ram_link);
  633. if (prtd->asp_link[0] >= 0)
  634. edma_free_slot(prtd->asp_link[0]);
  635. if (prtd->asp_link[1] >= 0)
  636. edma_free_slot(prtd->asp_link[1]);
  637. if (prtd->asp_channel >= 0)
  638. edma_free_channel(prtd->asp_channel);
  639. if (prtd->ram_link >= 0)
  640. edma_free_slot(prtd->ram_link);
  641. if (prtd->ram_link2 >= 0)
  642. edma_free_slot(prtd->ram_link2);
  643. if (prtd->ram_channel >= 0)
  644. edma_free_channel(prtd->ram_channel);
  645. kfree(prtd);
  646. return 0;
  647. }
  648. static int davinci_pcm_hw_params(struct snd_pcm_substream *substream,
  649. struct snd_pcm_hw_params *hw_params)
  650. {
  651. return snd_pcm_lib_malloc_pages(substream,
  652. params_buffer_bytes(hw_params));
  653. }
  654. static int davinci_pcm_hw_free(struct snd_pcm_substream *substream)
  655. {
  656. return snd_pcm_lib_free_pages(substream);
  657. }
  658. static int davinci_pcm_mmap(struct snd_pcm_substream *substream,
  659. struct vm_area_struct *vma)
  660. {
  661. struct snd_pcm_runtime *runtime = substream->runtime;
  662. return dma_mmap_writecombine(substream->pcm->card->dev, vma,
  663. runtime->dma_area,
  664. runtime->dma_addr,
  665. runtime->dma_bytes);
  666. }
  667. static struct snd_pcm_ops davinci_pcm_ops = {
  668. .open = davinci_pcm_open,
  669. .close = davinci_pcm_close,
  670. .ioctl = snd_pcm_lib_ioctl,
  671. .hw_params = davinci_pcm_hw_params,
  672. .hw_free = davinci_pcm_hw_free,
  673. .prepare = davinci_pcm_prepare,
  674. .trigger = davinci_pcm_trigger,
  675. .pointer = davinci_pcm_pointer,
  676. .mmap = davinci_pcm_mmap,
  677. };
  678. static int davinci_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream,
  679. size_t size)
  680. {
  681. struct snd_pcm_substream *substream = pcm->streams[stream].substream;
  682. struct snd_dma_buffer *buf = &substream->dma_buffer;
  683. buf->dev.type = SNDRV_DMA_TYPE_DEV;
  684. buf->dev.dev = pcm->card->dev;
  685. buf->private_data = NULL;
  686. buf->area = dma_alloc_writecombine(pcm->card->dev, size,
  687. &buf->addr, GFP_KERNEL);
  688. pr_debug("davinci_pcm: preallocate_dma_buffer: area=%p, addr=%p, "
  689. "size=%d\n", (void *) buf->area, (void *) buf->addr, size);
  690. if (!buf->area)
  691. return -ENOMEM;
  692. buf->bytes = size;
  693. return 0;
  694. }
  695. static void davinci_pcm_free(struct snd_pcm *pcm)
  696. {
  697. struct snd_pcm_substream *substream;
  698. struct snd_dma_buffer *buf;
  699. int stream;
  700. for (stream = 0; stream < 2; stream++) {
  701. struct snd_dma_buffer *iram_dma;
  702. substream = pcm->streams[stream].substream;
  703. if (!substream)
  704. continue;
  705. buf = &substream->dma_buffer;
  706. if (!buf->area)
  707. continue;
  708. dma_free_writecombine(pcm->card->dev, buf->bytes,
  709. buf->area, buf->addr);
  710. buf->area = NULL;
  711. iram_dma = buf->private_data;
  712. if (iram_dma) {
  713. davinci_free_sram(substream, iram_dma);
  714. kfree(iram_dma);
  715. }
  716. }
  717. }
  718. static int davinci_pcm_new(struct snd_soc_pcm_runtime *rtd)
  719. {
  720. struct snd_card *card = rtd->card->snd_card;
  721. struct snd_pcm *pcm = rtd->pcm;
  722. int ret;
  723. ret = dma_coerce_mask_and_coherent(card->dev, DMA_BIT_MASK(32));
  724. if (ret)
  725. return ret;
  726. if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) {
  727. ret = davinci_pcm_preallocate_dma_buffer(pcm,
  728. SNDRV_PCM_STREAM_PLAYBACK,
  729. pcm_hardware_playback.buffer_bytes_max);
  730. if (ret)
  731. return ret;
  732. }
  733. if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) {
  734. ret = davinci_pcm_preallocate_dma_buffer(pcm,
  735. SNDRV_PCM_STREAM_CAPTURE,
  736. pcm_hardware_capture.buffer_bytes_max);
  737. if (ret)
  738. return ret;
  739. }
  740. return 0;
  741. }
  742. static struct snd_soc_platform_driver davinci_soc_platform = {
  743. .ops = &davinci_pcm_ops,
  744. .pcm_new = davinci_pcm_new,
  745. .pcm_free = davinci_pcm_free,
  746. };
  747. int davinci_soc_platform_register(struct device *dev)
  748. {
  749. return devm_snd_soc_register_platform(dev, &davinci_soc_platform);
  750. }
  751. EXPORT_SYMBOL_GPL(davinci_soc_platform_register);
  752. MODULE_AUTHOR("Vladimir Barinov");
  753. MODULE_DESCRIPTION("TI DAVINCI PCM DMA module");
  754. MODULE_LICENSE("GPL");