 Mikko Perttunen
|
66b6f3d074
clk: tegra: Introduce ability for SoC-specific reset control callbacks
|
10 years ago |
 Thierry Reding
|
31b52ba42d
clk: tegra: EMC clock driver depends on EMC driver
|
10 years ago |
 Mikko Perttunen
|
2db04f16b5
clk: tegra: Add EMC clock driver
|
10 years ago |
|
Thierry Reding
|
63cc5a4da1
clk: tegra: Model oscillator as clock
|
10 years ago |
|
Thierry Reding
|
8106462faa
clk: tegra: Fix typo tabel -> table
|
11 years ago |
|
Thierry Reding
|
4f4f85fa0b
clk: tegra: Implement memory-controller clock
|
11 years ago |
 Stephen Warren
|
2ae77527bb
clk: tegra: remove legacy reset APIs
|
12 years ago |
|
Stephen Warren
|
6d5b988e7d
clk: tegra: implement a reset driver
|
12 years ago |
 Peter De Schrijver
|
b29f9e9264
clk: tegra: add TEGRA_PERIPH_NO_GATE
|
12 years ago |
|
Peter De Schrijver
|
bc44275b8e
clk: tegra: add locking to periph clks
|
12 years ago |
|
Peter De Schrijver
|
798e910bee
clk: tegra: Add support for PLLSS
|
12 years ago |
|
Peter De Schrijver
|
a7c8485a0e
clk: tegra: introduce common gen4 super clock
|
12 years ago |
|
Peter De Schrijver
|
de4f30fd84
clk: tegra: move PMC, fixed clocks to common files
|
12 years ago |
|
Peter De Schrijver
|
76ebc134d4
clk: tegra: move periph clocks to common file
|
12 years ago |
|
Peter De Schrijver
|
6609dbe40e
clk: tegra: move audio clk to common file
|
12 years ago |
|
Peter De Schrijver
|
73d37e4c7c
clk: tegra: add clkdev registration infra
|
12 years ago |
|
Peter De Schrijver
|
b8700d506a
clk: tegra: add common infra for DT clocks
|
12 years ago |
|
Peter De Schrijver
|
ebe142b2ad
clk: tegra: move fields to tegra_clk_pll_params
|
12 years ago |
|
Peter De Schrijver
|
5bb9d26700
clk: tegra: Add TEGRA_PERIPH_NO_DIV flag
|
12 years ago |
|
Peter De Schrijver
|
343a607cb7
clk: tegra: common periph_clk_enb_refcnt and clks
|
12 years ago |
|
Peter De Schrijver
|
d5ff89a82a
clk: tegra: simplify periph clock data
|
12 years ago |
 Paul Walmsley
|
1c472d8e82
clk: tegra: T114: add DFLL DVCO reset control
|
12 years ago |
|
Paul Walmsley
|
25c9ded6ed
clk: tegra: T114: add FCPU clock shaper programming, needed by the DFLL
|
12 years ago |
|
Peter De Schrijver
|
7b781c72c9
clk: tegra: Add fields for override bits
|
12 years ago |
|
Peter De Schrijver
|
aa6fefde62
clk: tegra: allow PLL m,n,p init from SoC files
|
12 years ago |
 Prashant Gaikwad
|
061cec925f
clk: tegra: Use common of_clk_init function
|
12 years ago |
|
Peter De Schrijver
|
27aa99dc0e
clk: tegra: devicetree match for nvidia,tegra114-car
|
12 years ago |
|
Peter De Schrijver
|
fdcccbd804
clk: tegra: Workaround for Tegra114 MSENC problem
|
12 years ago |
|
Peter De Schrijver
|
a26a029893
clk: tegra: Add flags to tegra_clk_periph()
|
12 years ago |
|
Peter De Schrijver
|
c1d1939c51
clk: tegra: Add new fields and PLL types for Tegra114
|
12 years ago |
