 Andi Kleen
|
b7af41a1bc
perf/x86: Suppress duplicated abort LBR records
|
%!s(int64=12) %!d(string=hai) anos |
 Peter Zijlstra
|
2b9e344df3
perf/x86/intel: Clean up checkpoint-interrupt bits
|
%!s(int64=12) %!d(string=hai) anos |
 Yan, Zheng
|
1fa64180fb
perf/x86: Add Silvermont (22nm Atom) support
|
%!s(int64=12) %!d(string=hai) anos |
 Stephane Eranian
|
2f7f73a520
perf/x86: Fix shared register mutual exclusion enforcement
|
%!s(int64=12) %!d(string=hai) anos |
|
Andi Kleen
|
069e0c3c40
perf/x86/intel: Support full width counting
|
%!s(int64=12) %!d(string=hai) anos |
|
Andi Kleen
|
f9134f36ae
perf/x86/intel: Add mem-loads/stores support for Haswell
|
%!s(int64=12) %!d(string=hai) anos |
|
Andi Kleen
|
72db559646
perf/x86/intel: Move NMI clearing to end of PMI handler
|
%!s(int64=12) %!d(string=hai) anos |
|
Andi Kleen
|
3044318f1f
perf/x86/intel: Add Haswell PEBS support
|
%!s(int64=12) %!d(string=hai) anos |
|
Andi Kleen
|
3a632cb229
perf/x86/intel: Add simple Haswell PMU support
|
%!s(int64=12) %!d(string=hai) anos |
 Andrew Hunter
|
43b4578071
perf/x86: Reduce stack usage of x86_schedule_events()
|
%!s(int64=12) %!d(string=hai) anos |
|
Stephane Eranian
|
9ad64c0f48
perf/x86: Add support for PEBS Precise Store
|
%!s(int64=13) %!d(string=hai) anos |
|
Stephane Eranian
|
f20093eef5
perf/x86: Add memory profiling via PEBS Load Latency
|
%!s(int64=13) %!d(string=hai) anos |
|
Stephane Eranian
|
9fac2cf316
perf/x86: Add flags to event constraints
|
%!s(int64=13) %!d(string=hai) anos |
|
Stephane Eranian
|
3a54aaa0a3
perf/x86: Improve sysfs event mapping with event string
|
%!s(int64=13) %!d(string=hai) anos |
|
Andi Kleen
|
1a6461b128
perf/x86: Support CPU specific sysfs events
|
%!s(int64=13) %!d(string=hai) anos |
 Jacob Shin
|
0fbdad078a
perf/x86: Allow for architecture specific RDPMC indexes
|
%!s(int64=13) %!d(string=hai) anos |
|
Jacob Shin
|
4c1fd17a1c
perf/x86: Move MSR address offset calculation to architecture specific files
|
%!s(int64=13) %!d(string=hai) anos |
 Jiri Olsa
|
20550a4345
perf/x86: Add hardware events translations for Intel P6 cpus
|
%!s(int64=13) %!d(string=hai) anos |
|
Jiri Olsa
|
0bf79d4413
perf/x86: Add hardware events translations for AMD cpus
|
%!s(int64=13) %!d(string=hai) anos |
|
Jiri Olsa
|
43c032febd
perf/x86: Add hardware events translations for Intel cpus
|
%!s(int64=13) %!d(string=hai) anos |
|
Jiri Olsa
|
a47473939d
perf/x86: Make hardware event translations available in sysfs
|
%!s(int64=13) %!d(string=hai) anos |
 Vince Weaver
|
e717bf4e4f
perf/x86: Add support for Intel Xeon-Phi Knights Corner PMU
|
%!s(int64=13) %!d(string=hai) anos |
|
Stephane Eranian
|
20a36e39d5
perf/x86: Fix Intel Ivy Bridge support
|
%!s(int64=13) %!d(string=hai) anos |
 Peter Zijlstra
|
d07bdfd322
perf/x86: Fix USER/KERNEL tagging of samples properly
|
%!s(int64=13) %!d(string=hai) anos |
|
Peter Zijlstra
|
597ed953d7
perf/x86: Make bitfield unsigned
|
%!s(int64=13) %!d(string=hai) anos |
|
Peter Zijlstra
|
3e0091e2b6
perf/x86: Save a few bytes in 'struct x86_pmu'
|
%!s(int64=13) %!d(string=hai) anos |
|
Peter Zijlstra
|
c93dc84cbe
perf/x86: Add a microcode revision check for SNB-PEBS
|
%!s(int64=13) %!d(string=hai) anos |
|
Yan, Zheng
|
4b4969b144
perf: Export perf_assign_events()
|
%!s(int64=13) %!d(string=hai) anos |
|
Andi Kleen
|
70ab7003de
perf/x86: Don't assume there can be only 4 PEBS events
|
%!s(int64=13) %!d(string=hai) anos |
|
Peter Zijlstra
|
1c2ac3fde3
perf/x86: Fix wrmsrl() debug wrapper
|
%!s(int64=13) %!d(string=hai) anos |
