 Maciej W. Rozycki
|
bf4aac07b5
MIPS: c-r4k: Avoid duplicate CPU_74K/CPU_1074K checks
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пре 11 година |
 David Daney
|
18a8cd63c0
MIPS: Add minimal support for OCTEON3 to c-r4k.c
|
пре 11 година |
 Ralf Baechle
|
2e2d663d2d
Merge branch 'wip-mips-pm' of https://github.com/paulburton/linux into mips-for-linux-next
|
пре 11 година |
|
Ralf Baechle
|
b633648c5a
MIPS: MT: Remove SMTC support
|
пре 11 година |
|
Ralf Baechle
|
c836732fa0
MIPS: c-r4k: Call R4600_HIT_CACHEOP_WAR_IMPL only for 32 byte cache lines.
|
пре 11 година |
 James Hogan
|
61d73044fe
MIPS: c-r4k: Add CPU PM callback for coherency
|
пре 11 година |
 Huacai Chen
|
c579d310b9
MIPS: Loongson: Add basic Loongson-3 CPU support
|
пре 11 година |
 Leonid Yegoshin
|
f36c4720fc
MIPS: Add support for the M5150 processor
|
пре 11 година |
 Manuel Lauss
|
8005711c8d
MIPS: Extend DMA_MAYBE_COHERENT logic to DMA_NONCOHERENT use
|
пре 12 година |
|
Leonid Yegoshin
|
4676f9359f
MIPS: mm: c-r4k: Flush scache to avoid cache aliases
|
пре 12 година |
 Markos Chandras
|
80ca69f40f
MIPS: mm: c-r4k: Add support for flushing user pages from cache
|
пре 12 година |
|
Leonid Yegoshin
|
4caa906ee9
MIPS: mm: c-r4k: Build EVA {d,i}cache flushing functions
|
пре 12 година |
|
James Hogan
|
aced4cbd6e
MIPS: Add cases for CPU_P5600
|
пре 12 година |
 Paul Burton
|
0ee958e102
MIPS: Coherent Processing System SMP implementation
|
пре 12 година |
 Steven J. Hill
|
442e14a2c5
MIPS: Add 1074K CPU support explicitly.
|
пре 12 година |
|
Markos Chandras
|
02dc6bfb08
MIPS: mm: c-r4k: Detect instruction cache aliases
|
пре 12 година |
 Linus Torvalds
|
cdfc83075f
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
|
пре 12 година |
|
Leonid Yegoshin
|
26ab96dfa9
MIPS: Add support for interAptiv cores
|
пре 12 година |
|
Leonid Yegoshin
|
708ac4b870
MIPS: Add support for the proAptiv cores
|
пре 12 година |
|
Markos Chandras
|
175cba8c74
MIPS: mm: c-r4k: Panic if IL or DL fields have a reserved value
|
пре 12 година |
 Aaro Koskinen
|
43a06847b9
MIPS: fix blast_icache32 on loongson2
|
пре 12 година |
|
Huacai Chen
|
bad009fe35
MIPS: fix case mismatch in local_r4k_flush_icache_range()
|
пре 12 година |
|
Ralf Baechle
|
14bd8c0820
MIPS: Loongson: Get rid of Loongson 2 #ifdefery all over arch/mips.
|
пре 12 година |
 Yoichi Yuasa
|
5596b0b245
MIPS: Fix forgotten preempt_enable() when CPU has inclusive pcaches
|
пре 12 година |
|
Maciej W. Rozycki
|
9213ad7707
MIPS: 74K/1074K: Correct erratum workaround.
|
пре 12 година |
|
Maciej W. Rozycki
|
8ff374b9c2
MIPS: Cleanup CP0 PRId and CP1 FPIR register access masks
|
пре 12 година |
|
Ralf Baechle
|
69f24d1784
MIPS: Optimize current_cpu_type() for better code.
|
пре 12 година |
|
Ralf Baechle
|
ff522058bd
MIPS: Fix accessing to per-cpu data when flushing the cache
|
пре 12 година |
 Paul Gortmaker
|
078a55fc82
MIPS: Delete __cpuinit/__CPUINIT usage from MIPS code
|
пре 12 година |
|
Ralf Baechle
|
b22d1b6a91
Merge branch 'mti-next' of git://git.linux-mips.org/pub/scm/sjhill/linux-sjhill into mips-for-linux-next
|
пре 12 година |
