 Zhou Yanjie
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3ed14a8d2f
MIPS: Ingenic: Disable broken BTB lookup optimization.
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%!s(int64=6) %!d(string=hai) anos |
 Linus Torvalds
|
e5a32b5b21
Merge tag 'mips_4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
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%!s(int64=7) %!d(string=hai) anos |
 Paul Burton
|
36dc5b20e3
MIPS: Use dins to simplify __write_64bit_c0_split()
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%!s(int64=7) %!d(string=hai) anos |
|
Paul Burton
|
08eeb44b24
MIPS: Use read-write output operand in __write_64bit_c0_split()
|
%!s(int64=7) %!d(string=hai) anos |
 Rafał Miłecki
|
d5ea019f8a
Revert "MIPS: BCM47XX: Enable 74K Core ExternalSync for PCIe erratum"
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%!s(int64=7) %!d(string=hai) anos |
 Huacai Chen
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97ab1bb490
MIPS: Loongson64: Define and use some CP0 registers
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%!s(int64=7) %!d(string=hai) anos |
 Tokunori Ikegami
|
2a027b47db
MIPS: BCM47XX: Enable 74K Core ExternalSync for PCIe erratum
|
%!s(int64=7) %!d(string=hai) anos |
 Matt Redfearn
|
8270ab48e6
MIPS: Probe for MIPS MT perf counters per TC
|
%!s(int64=7) %!d(string=hai) anos |
 Marcin Nowakowski
|
256211f2b0
MIPS: Add crc instruction support flag to elf_hwcap
|
%!s(int64=7) %!d(string=hai) anos |
 James Hogan
|
abbd52fd6b
MIPS: XPA: Standardise readx/writex accessors
|
%!s(int64=8) %!d(string=hai) anos |
|
James Hogan
|
3478ba9969
MIPS: XPA: Allow use of $0 (zero) to MTHC0
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%!s(int64=8) %!d(string=hai) anos |
|
James Hogan
|
8e4789d288
MIPS: XPA: Use XPA instructions in assembly
|
%!s(int64=8) %!d(string=hai) anos |
|
James Hogan
|
ed21e00777
MIPS: VZ: Pass GC0 register names in $n format
|
%!s(int64=8) %!d(string=hai) anos |
|
James Hogan
|
00b4eb408a
MIPS: VZ: Update helpers to use new asm macros
|
%!s(int64=8) %!d(string=hai) anos |
|
James Hogan
|
fc62f53bb2
MIPS: Add helpers for assembler macro instructions
|
%!s(int64=8) %!d(string=hai) anos |
|
James Hogan
|
6538953f1e
MIPS: mipsregs.h: Make read_c0_prid use const accessor
|
%!s(int64=8) %!d(string=hai) anos |
|
James Hogan
|
cd1e0737ef
MIPS: mipsregs.h: Add read const Cop0 macros
|
%!s(int64=8) %!d(string=hai) anos |
 Maciej W. Rozycki
|
d3a0b96818
MIPS: Use SLL by 0 for 32-bit truncation in `__read_64bit_c0_split'
|
%!s(int64=8) %!d(string=hai) anos |
 James Hogan
|
c22c804310
MIPS: Fix input modify in __write_64bit_c0_split()
|
%!s(int64=8) %!d(string=hai) anos |
 Paul Burton
|
c6593dded1
MIPS: Add accessor & bit definitions for GlobalNumber
|
%!s(int64=8) %!d(string=hai) anos |
|
Maciej W. Rozycki
|
8d1630f137
MIPS: MIPS16e2: Identify ASE presence
|
%!s(int64=8) %!d(string=hai) anos |
|
James Hogan
|
1f48f9be4d
KVM: MIPS/VZ: Handle Octeon III guest.PRid register
|
%!s(int64=8) %!d(string=hai) anos |
|
James Hogan
|
7d8a528d19
MIPS: Add Octeon III register accessors & definitions
|
%!s(int64=8) %!d(string=hai) anos |
|
James Hogan
|
eb0bab3866
MIPS: Add some missing guest CP0 accessors & defs
|
%!s(int64=8) %!d(string=hai) anos |
|
James Hogan
|
f359a11155
MIPS: Separate MAAR V bit into VL and VH for XPA
|
%!s(int64=8) %!d(string=hai) anos |
|
James Hogan
|
2654294bac
MIPS: Unify perf counter register definitions
|
%!s(int64=8) %!d(string=hai) anos |
|
Paul Burton
|
1031398035
MIPS: Mask out limit field when calculating wired entry count
|
%!s(int64=9) %!d(string=hai) anos |
|
Paul Burton
|
72c70f010d
MIPS: Stop setting I6400 FTLBP
|
%!s(int64=9) %!d(string=hai) anos |
|
James Hogan
|
4b34bca0e4
MIPS: Add define for Config.VI (virtual icache) bit
|
%!s(int64=9) %!d(string=hai) anos |
|
James Hogan
|
aff565aab9
MIPS: Clean up RDHWR handling
|
%!s(int64=9) %!d(string=hai) anos |
