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PCI: cadence: Check whether MSI is masked before sending it

The EP driver did not check the mask bit for each MSI before
sending it in raise_irq.  This is now checked, and EINVAL is
returned if masked.

Signed-off-by: Alan Douglas <adouglas@cadence.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Alan Douglas 6 years ago
parent
commit
fda5cd6806
1 changed files with 5 additions and 0 deletions
  1. 5 0
      drivers/pci/controller/pcie-cadence-ep.c

+ 5 - 0
drivers/pci/controller/pcie-cadence-ep.c

@@ -425,6 +425,11 @@ static int cdns_pcie_ep_send_msi_irq(struct cdns_pcie_ep *ep, u8 fn, u8 vfn,
 	if (!interrupt_num || interrupt_num > msi_count)
 		return -EINVAL;
 
+	/* Check whether MSI is masked */
+	data = cdns_pcie_ep_fn_readw(pcie, fn, cap + PCI_MSI_MASK_64);
+	if (data & (1 << (interrupt_num - 1)))
+		return -EINVAL;
+
 	/* Compute the data value to be written. */
 	data_mask = msi_count - 1;
 	data = cdns_pcie_ep_fn_readw(pcie, fn, cap + PCI_MSI_DATA_64);