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@@ -103,6 +103,39 @@ static s32 ixgbe_init_eeprom_params_X550(struct ixgbe_hw *hw)
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return 0;
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}
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+/**
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+ * ixgbe_iosf_wait - Wait for IOSF command completion
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+ * @hw: pointer to hardware structure
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+ * @ctrl: pointer to location to receive final IOSF control value
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+ *
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+ * Return: failing status on timeout
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+ *
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+ * Note: ctrl can be NULL if the IOSF control register value is not needed
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+ */
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+static s32 ixgbe_iosf_wait(struct ixgbe_hw *hw, u32 *ctrl)
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+{
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+ u32 i, command;
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+
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+ /* Check every 10 usec to see if the address cycle completed.
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+ * The SB IOSF BUSY bit will clear when the operation is
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+ * complete.
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+ */
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+ for (i = 0; i < IXGBE_MDIO_COMMAND_TIMEOUT; i++) {
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+ command = IXGBE_READ_REG(hw, IXGBE_SB_IOSF_INDIRECT_CTRL);
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+ if (!(command & IXGBE_SB_IOSF_CTRL_BUSY))
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+ break;
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+ usleep_range(10, 20);
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+ }
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+ if (ctrl)
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+ *ctrl = command;
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+ if (i == IXGBE_MDIO_COMMAND_TIMEOUT) {
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+ hw_dbg(hw, "IOSF wait timed out\n");
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+ return IXGBE_ERR_PHY;
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+ }
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+
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+ return 0;
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+}
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+
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/** ixgbe_read_iosf_sb_reg_x550 - Writes a value to specified register of the
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* IOSF device
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* @hw: pointer to hardware structure
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@@ -113,7 +146,17 @@ static s32 ixgbe_init_eeprom_params_X550(struct ixgbe_hw *hw)
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static s32 ixgbe_read_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,
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u32 device_type, u32 *data)
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{
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- u32 i, command, error;
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+ u32 gssr = IXGBE_GSSR_PHY1_SM | IXGBE_GSSR_PHY0_SM;
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+ u32 command, error;
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+ s32 ret;
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+
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+ ret = hw->mac.ops.acquire_swfw_sync(hw, gssr);
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+ if (ret)
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+ return ret;
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+
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+ ret = ixgbe_iosf_wait(hw, NULL);
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+ if (ret)
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+ goto out;
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command = ((reg_addr << IXGBE_SB_IOSF_CTRL_ADDR_SHIFT) |
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(device_type << IXGBE_SB_IOSF_CTRL_TARGET_SELECT_SHIFT));
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@@ -121,17 +164,7 @@ static s32 ixgbe_read_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,
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/* Write IOSF control register */
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IXGBE_WRITE_REG(hw, IXGBE_SB_IOSF_INDIRECT_CTRL, command);
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- /* Check every 10 usec to see if the address cycle completed.
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- * The SB IOSF BUSY bit will clear when the operation is
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- * complete
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- */
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- for (i = 0; i < IXGBE_MDIO_COMMAND_TIMEOUT; i++) {
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- usleep_range(10, 20);
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-
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- command = IXGBE_READ_REG(hw, IXGBE_SB_IOSF_INDIRECT_CTRL);
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- if ((command & IXGBE_SB_IOSF_CTRL_BUSY) == 0)
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- break;
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- }
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+ ret = ixgbe_iosf_wait(hw, &command);
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if ((command & IXGBE_SB_IOSF_CTRL_RESP_STAT_MASK) != 0) {
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error = (command & IXGBE_SB_IOSF_CTRL_CMPL_ERR_MASK) >>
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@@ -140,14 +173,12 @@ static s32 ixgbe_read_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,
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return IXGBE_ERR_PHY;
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}
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- if (i == IXGBE_MDIO_COMMAND_TIMEOUT) {
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- hw_dbg(hw, "Read timed out\n");
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- return IXGBE_ERR_PHY;
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- }
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-
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- *data = IXGBE_READ_REG(hw, IXGBE_SB_IOSF_INDIRECT_DATA);
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+ if (!ret)
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+ *data = IXGBE_READ_REG(hw, IXGBE_SB_IOSF_INDIRECT_DATA);
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- return 0;
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+out:
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+ hw->mac.ops.release_swfw_sync(hw, gssr);
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+ return ret;
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}
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/** ixgbe_read_ee_hostif_data_X550 - Read EEPROM word using a host interface
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@@ -789,7 +820,17 @@ static s32 ixgbe_get_link_capabilities_X550em(struct ixgbe_hw *hw,
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static s32 ixgbe_write_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,
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u32 device_type, u32 data)
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{
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- u32 i, command, error;
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+ u32 gssr = IXGBE_GSSR_PHY1_SM | IXGBE_GSSR_PHY0_SM;
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+ u32 command, error;
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+ s32 ret;
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+
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+ ret = hw->mac.ops.acquire_swfw_sync(hw, gssr);
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+ if (ret)
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+ return ret;
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+
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+ ret = ixgbe_iosf_wait(hw, NULL);
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+ if (ret)
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+ goto out;
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command = ((reg_addr << IXGBE_SB_IOSF_CTRL_ADDR_SHIFT) |
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(device_type << IXGBE_SB_IOSF_CTRL_TARGET_SELECT_SHIFT));
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@@ -800,17 +841,7 @@ static s32 ixgbe_write_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,
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/* Write IOSF data register */
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IXGBE_WRITE_REG(hw, IXGBE_SB_IOSF_INDIRECT_DATA, data);
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- /* Check every 10 usec to see if the address cycle completed.
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- * The SB IOSF BUSY bit will clear when the operation is
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- * complete
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- */
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- for (i = 0; i < IXGBE_MDIO_COMMAND_TIMEOUT; i++) {
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- usleep_range(10, 20);
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-
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- command = IXGBE_READ_REG(hw, IXGBE_SB_IOSF_INDIRECT_CTRL);
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- if ((command & IXGBE_SB_IOSF_CTRL_BUSY) == 0)
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- break;
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- }
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+ ret = ixgbe_iosf_wait(hw, &command);
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if ((command & IXGBE_SB_IOSF_CTRL_RESP_STAT_MASK) != 0) {
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error = (command & IXGBE_SB_IOSF_CTRL_CMPL_ERR_MASK) >>
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@@ -819,12 +850,9 @@ static s32 ixgbe_write_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,
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return IXGBE_ERR_PHY;
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}
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- if (i == IXGBE_MDIO_COMMAND_TIMEOUT) {
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- hw_dbg(hw, "Write timed out\n");
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- return IXGBE_ERR_PHY;
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- }
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-
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- return 0;
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+out:
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+ hw->mac.ops.release_swfw_sync(hw, gssr);
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+ return ret;
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}
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/** ixgbe_setup_ixfi_x550em - Configure the KR PHY for iXFI mode.
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@@ -1035,7 +1063,7 @@ static s32 ixgbe_setup_kr_x550em(struct ixgbe_hw *hw)
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**/
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static s32 ixgbe_setup_internal_phy_x550em(struct ixgbe_hw *hw)
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{
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- u32 status;
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+ s32 status;
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u16 lasi, autoneg_status, speed;
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ixgbe_link_speed force_speed;
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@@ -1177,7 +1205,7 @@ static enum ixgbe_media_type ixgbe_get_media_type_X550em(struct ixgbe_hw *hw)
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**/
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static s32 ixgbe_init_ext_t_x550em(struct ixgbe_hw *hw)
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{
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- u32 status;
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+ s32 status;
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u16 reg;
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u32 retries = 2;
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