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@@ -237,6 +237,7 @@ static void ks_pcie_setup_interrupts(struct keystone_pcie *ks_pcie)
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ks_dw_pcie_enable_error_irq(ks_pcie);
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}
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+#ifdef CONFIG_ARM
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/*
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* When a PCI device does not exist during config cycles, keystone host gets a
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* bus error instead of returning 0xffffffff. This handler always returns 0
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@@ -256,6 +257,7 @@ static int keystone_pcie_fault(unsigned long addr, unsigned int fsr,
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return 0;
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}
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+#endif
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static int __init ks_pcie_host_init(struct pcie_port *pp)
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{
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@@ -279,12 +281,14 @@ static int __init ks_pcie_host_init(struct pcie_port *pp)
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val |= BIT(12);
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writel(val, pci->dbi_base + PCIE_CAP_BASE + PCI_EXP_DEVCTL);
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+#ifdef CONFIG_ARM
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/*
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* PCIe access errors that result into OCP errors are caught by ARM as
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* "External aborts"
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*/
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hook_fault_code(17, keystone_pcie_fault, SIGBUS, 0,
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"Asynchronous external abort");
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+#endif
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return 0;
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}
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