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clocksource/drivers/mips-gic-timer: Add fastpath for local timer updates

Always accessing the compare register via the CM redirect region is
(relatively) slow. If the timer being updated is the current CPUs
then this can be shortcutted by writing to the CM VP local region.

Signed-off-by: Matt Redfearn <matt.redfearn@mips.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Matt Redfearn 8 years ago
parent
commit
f16ff2bdb1
1 changed files with 7 additions and 2 deletions
  1. 7 2
      drivers/clocksource/mips-gic-timer.c

+ 7 - 2
drivers/clocksource/mips-gic-timer.c

@@ -39,13 +39,18 @@ static u64 notrace gic_read_count(void)
 
 
 static int gic_next_event(unsigned long delta, struct clock_event_device *evt)
 static int gic_next_event(unsigned long delta, struct clock_event_device *evt)
 {
 {
+	int cpu = cpumask_first(evt->cpumask);
 	u64 cnt;
 	u64 cnt;
 	int res;
 	int res;
 
 
 	cnt = gic_read_count();
 	cnt = gic_read_count();
 	cnt += (u64)delta;
 	cnt += (u64)delta;
-	write_gic_vl_other(mips_cm_vp_id(cpumask_first(evt->cpumask)));
-	write_gic_vo_compare(cnt);
+	if (cpu == raw_smp_processor_id()) {
+		write_gic_vl_compare(cnt);
+	} else {
+		write_gic_vl_other(mips_cm_vp_id(cpu));
+		write_gic_vo_compare(cnt);
+	}
 	res = ((int)(gic_read_count() - cnt) >= 0) ? -ETIME : 0;
 	res = ((int)(gic_read_count() - cnt) >= 0) ? -ETIME : 0;
 	return res;
 	return res;
 }
 }