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@@ -83,10 +83,10 @@ void initGPIO(struct cx231xx *dev)
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cx231xx_send_gpio_cmd(dev, _gpio_direction, (u8 *)&value, 4, 0, 0);
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verve_read_byte(dev, 0x07, &val);
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- pr_info(" verve_read_byte address0x07=0x%x\n", val);
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+ pr_debug("verve_read_byte address0x07=0x%x\n", val);
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verve_write_byte(dev, 0x07, 0xF4);
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verve_read_byte(dev, 0x07, &val);
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- pr_info(" verve_read_byte address0x07=0x%x\n", val);
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+ pr_debug("verve_read_byte address0x07=0x%x\n", val);
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cx231xx_capture_start(dev, 1, Vbi);
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@@ -156,22 +156,22 @@ int cx231xx_afe_init_super_block(struct cx231xx *dev, u32 ref_count)
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while (afe_power_status != 0x18) {
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status = afe_write_byte(dev, SUP_BLK_PWRDN, 0x18);
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if (status < 0) {
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- pr_info(
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- ": Init Super Block failed in send cmd\n");
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+ pr_debug("%s: Init Super Block failed in send cmd\n",
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+ __func__);
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break;
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}
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status = afe_read_byte(dev, SUP_BLK_PWRDN, &afe_power_status);
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afe_power_status &= 0xff;
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if (status < 0) {
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- pr_info(
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- ": Init Super Block failed in receive cmd\n");
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+ pr_debug("%s: Init Super Block failed in receive cmd\n",
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+ __func__);
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break;
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}
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i++;
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if (i == 10) {
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- pr_info(
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- ": Init Super Block force break in loop !!!!\n");
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+ pr_debug("%s: Init Super Block force break in loop !!!!\n",
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+ __func__);
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status = -1;
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break;
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}
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@@ -410,7 +410,7 @@ int cx231xx_afe_update_power_control(struct cx231xx *dev,
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status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3,
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0x00);
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} else {
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- pr_info("Invalid AV mode input\n");
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+ pr_debug("Invalid AV mode input\n");
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status = -1;
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}
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break;
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@@ -467,7 +467,7 @@ int cx231xx_afe_update_power_control(struct cx231xx *dev,
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status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3,
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0x40);
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} else {
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- pr_info("Invalid AV mode input\n");
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+ pr_debug("Invalid AV mode input\n");
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status = -1;
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}
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} /* switch */
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@@ -628,8 +628,7 @@ int cx231xx_set_decoder_video_input(struct cx231xx *dev,
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if (pin_type != dev->video_input) {
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status = cx231xx_afe_adjust_ref_count(dev, pin_type);
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if (status < 0) {
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- pr_err("%s: adjust_ref_count :Failed to set"
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- "AFE input mux - errCode [%d]!\n",
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+ pr_err("%s: adjust_ref_count :Failed to set AFE input mux - errCode [%d]!\n",
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__func__, status);
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return status;
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}
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@@ -638,9 +637,8 @@ int cx231xx_set_decoder_video_input(struct cx231xx *dev,
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/* call afe block to set video inputs */
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status = cx231xx_afe_set_input_mux(dev, input);
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if (status < 0) {
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- pr_err("%s: set_input_mux :Failed to set"
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- " AFE input mux - errCode [%d]!\n",
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- __func__, status);
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+ pr_err("%s: set_input_mux :Failed to set AFE input mux - errCode [%d]!\n",
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+ __func__, status);
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return status;
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}
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@@ -670,8 +668,7 @@ int cx231xx_set_decoder_video_input(struct cx231xx *dev,
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/* Tell DIF object to go to baseband mode */
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status = cx231xx_dif_set_standard(dev, DIF_USE_BASEBAND);
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if (status < 0) {
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- pr_err("%s: cx231xx_dif set to By pass"
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- " mode- errCode [%d]!\n",
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+ pr_err("%s: cx231xx_dif set to By pass mode- errCode [%d]!\n",
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__func__, status);
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return status;
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}
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@@ -715,8 +712,7 @@ int cx231xx_set_decoder_video_input(struct cx231xx *dev,
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/* Tell DIF object to go to baseband mode */
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status = cx231xx_dif_set_standard(dev, DIF_USE_BASEBAND);
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if (status < 0) {
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- pr_err("%s: cx231xx_dif set to By pass"
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- " mode- errCode [%d]!\n",
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+ pr_err("%s: cx231xx_dif set to By pass mode- errCode [%d]!\n",
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__func__, status);
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return status;
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}
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@@ -790,9 +786,8 @@ int cx231xx_set_decoder_video_input(struct cx231xx *dev,
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status = cx231xx_dif_set_standard(dev,
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DIF_USE_BASEBAND);
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if (status < 0) {
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- pr_err("%s: cx231xx_dif set to By pass"
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- " mode- errCode [%d]!\n",
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- __func__, status);
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+ pr_err("%s: cx231xx_dif set to By pass mode- errCode [%d]!\n",
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+ __func__, status);
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return status;
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}
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@@ -826,9 +821,8 @@ int cx231xx_set_decoder_video_input(struct cx231xx *dev,
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/* Reinitialize the DIF */
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status = cx231xx_dif_set_standard(dev, dev->norm);
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if (status < 0) {
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- pr_err("%s: cx231xx_dif set to By pass"
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- " mode- errCode [%d]!\n",
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- __func__, status);
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+ pr_err("%s: cx231xx_dif set to By pass mode- errCode [%d]!\n",
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+ __func__, status);
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return status;
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}
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@@ -970,14 +964,14 @@ int cx231xx_do_mode_ctrl_overrides(struct cx231xx *dev)
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{
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int status = 0;
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- pr_info("do_mode_ctrl_overrides : 0x%x\n",
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- (unsigned int)dev->norm);
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+ pr_debug("%s: 0x%x\n",
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+ __func__, (unsigned int)dev->norm);
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/* Change the DFE_CTRL3 bp_percent to fix flagging */
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status = vid_blk_write_word(dev, DFE_CTRL3, 0xCD3F0280);
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if (dev->norm & (V4L2_STD_NTSC | V4L2_STD_PAL_M)) {
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- pr_info("do_mode_ctrl_overrides NTSC\n");
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+ pr_debug("%s: NTSC\n", __func__);
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/* Move the close caption lines out of active video,
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adjust the active video start point */
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@@ -1004,7 +998,7 @@ int cx231xx_do_mode_ctrl_overrides(struct cx231xx *dev)
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(FLD_HBLANK_CNT, 0x79));
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} else if (dev->norm & V4L2_STD_SECAM) {
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- pr_info("do_mode_ctrl_overrides SECAM\n");
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+ pr_debug("%s: SECAM\n", __func__);
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status = cx231xx_read_modify_write_i2c_dword(dev,
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VID_BLK_I2C_ADDRESS,
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VERT_TIM_CTRL,
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@@ -1031,7 +1025,7 @@ int cx231xx_do_mode_ctrl_overrides(struct cx231xx *dev)
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cx231xx_set_field
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(FLD_HBLANK_CNT, 0x85));
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} else {
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- pr_info("do_mode_ctrl_overrides PAL\n");
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+ pr_debug("%s: PAL\n", __func__);
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status = cx231xx_read_modify_write_i2c_dword(dev,
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VID_BLK_I2C_ADDRESS,
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VERT_TIM_CTRL,
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@@ -1331,113 +1325,113 @@ void cx231xx_dump_HH_reg(struct cx231xx *dev)
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for (i = 0x100; i < 0x140; i++) {
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vid_blk_read_word(dev, i, &value);
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- pr_info("reg0x%x=0x%x\n", i, value);
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+ pr_debug("reg0x%x=0x%x\n", i, value);
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i = i+3;
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}
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for (i = 0x300; i < 0x400; i++) {
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vid_blk_read_word(dev, i, &value);
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- pr_info("reg0x%x=0x%x\n", i, value);
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+ pr_debug("reg0x%x=0x%x\n", i, value);
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i = i+3;
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}
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for (i = 0x400; i < 0x440; i++) {
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vid_blk_read_word(dev, i, &value);
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- pr_info("reg0x%x=0x%x\n", i, value);
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+ pr_debug("reg0x%x=0x%x\n", i, value);
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i = i+3;
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}
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vid_blk_read_word(dev, AFE_CTRL_C2HH_SRC_CTRL, &value);
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- pr_info("AFE_CTRL_C2HH_SRC_CTRL=0x%x\n", value);
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+ pr_debug("AFE_CTRL_C2HH_SRC_CTRL=0x%x\n", value);
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vid_blk_write_word(dev, AFE_CTRL_C2HH_SRC_CTRL, 0x4485D390);
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vid_blk_read_word(dev, AFE_CTRL_C2HH_SRC_CTRL, &value);
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- pr_info("AFE_CTRL_C2HH_SRC_CTRL=0x%x\n", value);
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+ pr_debug("AFE_CTRL_C2HH_SRC_CTRL=0x%x\n", value);
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}
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-void cx231xx_dump_SC_reg(struct cx231xx *dev)
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+#if 0
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+static void cx231xx_dump_SC_reg(struct cx231xx *dev)
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{
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u8 value[4] = { 0, 0, 0, 0 };
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- pr_info("cx231xx_dump_SC_reg!\n");
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+ pr_debug("%s!\n", __func__);
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cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, BOARD_CFG_STAT,
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value, 4);
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- pr_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", BOARD_CFG_STAT, value[0],
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+ pr_debug("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", BOARD_CFG_STAT, value[0],
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value[1], value[2], value[3]);
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cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS_MODE_REG,
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value, 4);
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- pr_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS_MODE_REG, value[0],
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+ pr_debug("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS_MODE_REG, value[0],
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value[1], value[2], value[3]);
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cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS1_CFG_REG,
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value, 4);
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- pr_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS1_CFG_REG, value[0],
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+ pr_debug("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS1_CFG_REG, value[0],
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value[1], value[2], value[3]);
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cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS1_LENGTH_REG,
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value, 4);
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- pr_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS1_LENGTH_REG, value[0],
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+ pr_debug("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS1_LENGTH_REG, value[0],
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value[1], value[2], value[3]);
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cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS2_CFG_REG,
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value, 4);
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- pr_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS2_CFG_REG, value[0],
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+ pr_debug("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS2_CFG_REG, value[0],
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value[1], value[2], value[3]);
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cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS2_LENGTH_REG,
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value, 4);
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- pr_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS2_LENGTH_REG, value[0],
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+ pr_debug("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS2_LENGTH_REG, value[0],
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value[1], value[2], value[3]);
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cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, EP_MODE_SET,
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value, 4);
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- pr_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", EP_MODE_SET, value[0],
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+ pr_debug("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", EP_MODE_SET, value[0],
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value[1], value[2], value[3]);
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cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_PTN1,
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value, 4);
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- pr_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_PTN1, value[0],
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+ pr_debug("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_PTN1, value[0],
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value[1], value[2], value[3]);
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cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_PTN2,
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value, 4);
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- pr_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_PTN2, value[0],
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+ pr_debug("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_PTN2, value[0],
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value[1], value[2], value[3]);
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cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_PTN3,
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value, 4);
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- pr_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_PTN3, value[0],
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+ pr_debug("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_PTN3, value[0],
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value[1], value[2], value[3]);
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cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_MASK0,
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value, 4);
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- pr_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_MASK0, value[0],
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+ pr_debug("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_MASK0, value[0],
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value[1], value[2], value[3]);
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cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_MASK1,
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value, 4);
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- pr_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_MASK1, value[0],
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+ pr_debug("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_MASK1, value[0],
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value[1], value[2], value[3]);
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cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_MASK2,
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value, 4);
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- pr_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_MASK2, value[0],
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+ pr_debug("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_MASK2, value[0],
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value[1], value[2], value[3]);
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cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_GAIN,
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value, 4);
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- pr_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_GAIN, value[0],
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+ pr_debug("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_GAIN, value[0],
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value[1], value[2], value[3]);
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cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_CAR_REG,
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value, 4);
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- pr_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_CAR_REG, value[0],
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+ pr_debug("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_CAR_REG, value[0],
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value[1], value[2], value[3]);
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cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_OT_CFG1,
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value, 4);
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- pr_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_OT_CFG1, value[0],
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+ pr_debug("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_OT_CFG1, value[0],
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value[1], value[2], value[3]);
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cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_OT_CFG2,
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value, 4);
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- pr_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_OT_CFG2, value[0],
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+ pr_debug("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_OT_CFG2, value[0],
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value[1], value[2], value[3]);
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cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN,
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value, 4);
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- pr_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", PWR_CTL_EN, value[0],
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+ pr_debug("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", PWR_CTL_EN, value[0],
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value[1], value[2], value[3]);
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-
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-
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}
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+#endif
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void cx231xx_Setup_AFE_for_LowIF(struct cx231xx *dev)
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@@ -1503,7 +1497,7 @@ void cx231xx_set_Colibri_For_LowIF(struct cx231xx *dev, u32 if_freq,
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u32 standard = 0;
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u8 value[4] = { 0, 0, 0, 0 };
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- pr_info("Enter cx231xx_set_Colibri_For_LowIF()\n");
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+ pr_debug("Enter cx231xx_set_Colibri_For_LowIF()\n");
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value[0] = (u8) 0x6F;
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value[1] = (u8) 0x6F;
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value[2] = (u8) 0x6F;
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@@ -1523,7 +1517,7 @@ void cx231xx_set_Colibri_For_LowIF(struct cx231xx *dev, u32 if_freq,
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colibri_carrier_offset = cx231xx_Get_Colibri_CarrierOffset(mode,
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standard);
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- pr_info("colibri_carrier_offset=%d, standard=0x%x\n",
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+ pr_debug("colibri_carrier_offset=%d, standard=0x%x\n",
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colibri_carrier_offset, standard);
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/* Set the band Pass filter for DIF*/
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@@ -1557,7 +1551,7 @@ void cx231xx_set_DIF_bandpass(struct cx231xx *dev, u32 if_freq,
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u64 pll_freq_u64 = 0;
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u32 i = 0;
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- pr_info("if_freq=%d;spectral_invert=0x%x;mode=0x%x\n",
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+ pr_debug("if_freq=%d;spectral_invert=0x%x;mode=0x%x\n",
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if_freq, spectral_invert, mode);
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@@ -1601,7 +1595,7 @@ void cx231xx_set_DIF_bandpass(struct cx231xx *dev, u32 if_freq,
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if_freq = 16000000;
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}
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- pr_info("Enter IF=%zu\n",
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+ pr_debug("Enter IF=%zu\n",
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ARRAY_SIZE(Dif_set_array));
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for (i = 0; i < ARRAY_SIZE(Dif_set_array); i++) {
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if (Dif_set_array[i].if_freq == if_freq) {
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@@ -1714,7 +1708,7 @@ int cx231xx_dif_set_standard(struct cx231xx *dev, u32 standard)
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u32 dif_misc_ctrl_value = 0;
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u32 func_mode = 0;
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- pr_info("%s: setStandard to %x\n", __func__, standard);
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+ pr_debug("%s: setStandard to %x\n", __func__, standard);
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status = vid_blk_read_word(dev, DIF_MISC_CTRL, &dif_misc_ctrl_value);
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if (standard != DIF_USE_BASEBAND)
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@@ -2117,8 +2111,8 @@ int cx231xx_tuner_post_channel_change(struct cx231xx *dev)
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{
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int status = 0;
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u32 dwval;
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- pr_info("cx231xx_tuner_post_channel_change dev->tuner_type =0%d\n",
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- dev->tuner_type);
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+ pr_debug("%s: dev->tuner_type =0%d\n",
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+ __func__, dev->tuner_type);
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/* Set the RF and IF k_agc values to 4 for PAL/NTSC and 8 for
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* SECAM L/B/D standards */
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status = vid_blk_read_word(dev, DIF_AGC_IF_REF, &dwval);
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@@ -2219,8 +2213,8 @@ int cx231xx_set_power_mode(struct cx231xx *dev, enum AV_MODE mode)
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if (dev->power_mode != mode)
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dev->power_mode = mode;
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else {
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- pr_info(" setPowerMode::mode = %d, No Change req.\n",
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- mode);
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+ pr_debug("%s: mode = %d, No Change req.\n",
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+ __func__, mode);
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return 0;
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}
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@@ -2459,7 +2453,7 @@ int cx231xx_start_stream(struct cx231xx *dev, u32 ep_mask)
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u32 tmp = 0;
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int status = 0;
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- pr_info("cx231xx_start_stream():: ep_mask = %x\n", ep_mask);
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+ pr_debug("%s: ep_mask = %x\n", __func__, ep_mask);
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status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, EP_MODE_SET,
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value, 4);
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if (status < 0)
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@@ -2484,7 +2478,7 @@ int cx231xx_stop_stream(struct cx231xx *dev, u32 ep_mask)
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u32 tmp = 0;
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int status = 0;
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- pr_info("cx231xx_stop_stream():: ep_mask = %x\n", ep_mask);
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+ pr_debug("%s: ep_mask = %x\n", __func__, ep_mask);
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status =
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cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, EP_MODE_SET, value, 4);
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if (status < 0)
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@@ -2512,24 +2506,24 @@ int cx231xx_initialize_stream_xfer(struct cx231xx *dev, u32 media_type)
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if (dev->udev->speed == USB_SPEED_HIGH) {
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switch (media_type) {
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case Audio:
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- pr_info("%s: Audio enter HANC\n", __func__);
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+ pr_debug("%s: Audio enter HANC\n", __func__);
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status =
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cx231xx_mode_register(dev, TS_MODE_REG, 0x9300);
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break;
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case Vbi:
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- pr_info("%s: set vanc registers\n", __func__);
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+ pr_debug("%s: set vanc registers\n", __func__);
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status = cx231xx_mode_register(dev, TS_MODE_REG, 0x300);
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break;
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case Sliced_cc:
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- pr_info("%s: set hanc registers\n", __func__);
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+ pr_debug("%s: set hanc registers\n", __func__);
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status =
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cx231xx_mode_register(dev, TS_MODE_REG, 0x1300);
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break;
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case Raw_Video:
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- pr_info("%s: set video registers\n", __func__);
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+ pr_debug("%s: set video registers\n", __func__);
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status = cx231xx_mode_register(dev, TS_MODE_REG, 0x100);
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break;
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@@ -2569,7 +2563,7 @@ int cx231xx_initialize_stream_xfer(struct cx231xx *dev, u32 media_type)
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break;
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case TS1_parallel_mode:
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- pr_info("%s: set ts1 parallel mode registers\n",
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+ pr_debug("%s: set ts1 parallel mode registers\n",
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__func__);
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status = cx231xx_mode_register(dev, TS_MODE_REG, 0x100);
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status = cx231xx_mode_register(dev, TS1_CFG_REG, 0x400);
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@@ -2923,7 +2917,7 @@ int cx231xx_gpio_i2c_read_ack(struct cx231xx *dev)
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(nCnt > 0));
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if (nCnt == 0)
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- pr_info("No ACK after %d msec -GPIO I2C failed!",
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+ pr_debug("No ACK after %d msec -GPIO I2C failed!",
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nInit * 10);
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/*
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