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@@ -161,6 +161,55 @@ struct fsmc_nand_platform_data {
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void *write_dma_priv;
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};
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+/**
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+ * struct fsmc_nand_data - structure for FSMC NAND device state
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+ *
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+ * @pid: Part ID on the AMBA PrimeCell format
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+ * @mtd: MTD info for a NAND flash.
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+ * @nand: Chip related info for a NAND flash.
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+ * @partitions: Partition info for a NAND Flash.
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+ * @nr_partitions: Total number of partition of a NAND flash.
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+ *
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+ * @bank: Bank number for probed device.
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+ * @clk: Clock structure for FSMC.
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+ *
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+ * @read_dma_chan: DMA channel for read access
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+ * @write_dma_chan: DMA channel for write access to NAND
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+ * @dma_access_complete: Completion structure
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+ *
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+ * @data_pa: NAND Physical port for Data.
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+ * @data_va: NAND port for Data.
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+ * @cmd_va: NAND port for Command.
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+ * @addr_va: NAND port for Address.
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+ * @regs_va: FSMC regs base address.
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+ */
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+struct fsmc_nand_data {
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+ u32 pid;
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+ struct nand_chip nand;
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+ struct mtd_partition *partitions;
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+ unsigned int nr_partitions;
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+
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+ unsigned int bank;
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+ struct device *dev;
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+ enum access_mode mode;
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+ struct clk *clk;
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+
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+ /* DMA related objects */
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+ struct dma_chan *read_dma_chan;
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+ struct dma_chan *write_dma_chan;
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+ struct completion dma_access_complete;
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+
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+ struct fsmc_nand_timings *dev_timings;
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+
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+ dma_addr_t data_pa;
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+ void __iomem *data_va;
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+ void __iomem *cmd_va;
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+ void __iomem *addr_va;
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+ void __iomem *regs_va;
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+
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+ void (*select_chip)(uint32_t bank, uint32_t busw);
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+};
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+
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static int fsmc_ecc1_ooblayout_ecc(struct mtd_info *mtd, int section,
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struct mtd_oob_region *oobregion)
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{
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@@ -245,55 +294,6 @@ static const struct mtd_ooblayout_ops fsmc_ecc4_ooblayout_ops = {
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.free = fsmc_ecc4_ooblayout_free,
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};
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-/**
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- * struct fsmc_nand_data - structure for FSMC NAND device state
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- *
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- * @pid: Part ID on the AMBA PrimeCell format
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- * @mtd: MTD info for a NAND flash.
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- * @nand: Chip related info for a NAND flash.
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- * @partitions: Partition info for a NAND Flash.
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- * @nr_partitions: Total number of partition of a NAND flash.
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- *
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- * @bank: Bank number for probed device.
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- * @clk: Clock structure for FSMC.
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- *
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- * @read_dma_chan: DMA channel for read access
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- * @write_dma_chan: DMA channel for write access to NAND
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- * @dma_access_complete: Completion structure
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- *
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- * @data_pa: NAND Physical port for Data.
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- * @data_va: NAND port for Data.
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- * @cmd_va: NAND port for Command.
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- * @addr_va: NAND port for Address.
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- * @regs_va: FSMC regs base address.
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- */
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-struct fsmc_nand_data {
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- u32 pid;
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- struct nand_chip nand;
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- struct mtd_partition *partitions;
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- unsigned int nr_partitions;
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-
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- unsigned int bank;
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- struct device *dev;
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- enum access_mode mode;
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- struct clk *clk;
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-
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- /* DMA related objects */
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- struct dma_chan *read_dma_chan;
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- struct dma_chan *write_dma_chan;
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- struct completion dma_access_complete;
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-
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- struct fsmc_nand_timings *dev_timings;
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-
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- dma_addr_t data_pa;
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- void __iomem *data_va;
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- void __iomem *cmd_va;
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- void __iomem *addr_va;
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- void __iomem *regs_va;
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-
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- void (*select_chip)(uint32_t bank, uint32_t busw);
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-};
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-
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static inline struct fsmc_nand_data *mtd_to_fsmc(struct mtd_info *mtd)
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{
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return container_of(mtd_to_nand(mtd), struct fsmc_nand_data, nand);
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