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@@ -101,6 +101,8 @@
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#define MVNETA_TXQ_CMD 0x2448
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#define MVNETA_TXQ_DISABLE_SHIFT 8
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#define MVNETA_TXQ_ENABLE_MASK 0x000000ff
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+#define MVNETA_RX_DISCARD_FRAME_COUNT 0x2484
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+#define MVNETA_OVERRUN_FRAME_COUNT 0x2488
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#define MVNETA_GMAC_CLOCK_DIVIDER 0x24f4
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#define MVNETA_GMAC_1MS_CLOCK_ENABLE BIT(31)
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#define MVNETA_ACC_MODE 0x2500
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@@ -192,7 +194,7 @@
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#define MVNETA_GMAC_AN_FLOW_CTRL_EN BIT(11)
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#define MVNETA_GMAC_CONFIG_FULL_DUPLEX BIT(12)
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#define MVNETA_GMAC_AN_DUPLEX_EN BIT(13)
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-#define MVNETA_MIB_COUNTERS_BASE 0x3080
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+#define MVNETA_MIB_COUNTERS_BASE 0x3000
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#define MVNETA_MIB_LATE_COLLISION 0x7c
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#define MVNETA_DA_FILT_SPEC_MCAST 0x3400
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#define MVNETA_DA_FILT_OTH_MCAST 0x3500
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@@ -576,6 +578,8 @@ static void mvneta_mib_counters_clear(struct mvneta_port *pp)
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/* Perform dummy reads from MIB counters */
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for (i = 0; i < MVNETA_MIB_LATE_COLLISION; i += 4)
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dummy = mvreg_read(pp, (MVNETA_MIB_COUNTERS_BASE + i));
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+ dummy = mvreg_read(pp, MVNETA_RX_DISCARD_FRAME_COUNT);
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+ dummy = mvreg_read(pp, MVNETA_OVERRUN_FRAME_COUNT);
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}
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/* Get System Network Statistics */
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@@ -804,7 +808,6 @@ static void mvneta_port_up(struct mvneta_port *pp)
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u32 q_map;
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/* Enable all initialized TXs. */
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- mvneta_mib_counters_clear(pp);
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q_map = 0;
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for (queue = 0; queue < txq_number; queue++) {
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struct mvneta_tx_queue *txq = &pp->txqs[queue];
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@@ -1081,6 +1084,8 @@ static void mvneta_defaults_set(struct mvneta_port *pp)
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mvreg_write(pp, MVNETA_INTR_ENABLE,
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(MVNETA_RXQ_INTR_ENABLE_ALL_MASK
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| MVNETA_TXQ_INTR_ENABLE_ALL_MASK));
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+
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+ mvneta_mib_counters_clear(pp);
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}
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/* Set max sizes for tx queues */
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