arm64: dts: ti: k3-am65-main: Move mailbox nodes to main_navss interconnect

All the Mailbox cluster nodes were currently added directly under the
cbass_main interconnect node, even though the Mailbox IP is present within
the Main NavSS sub-module and is accessible from the MPU through the Main
NavSS local interconnect. The Main NavSS interconnect is represented as
its own interconnect node, so move all these nodes under the main_navss
interconnect node.

Signed-off-by: Suman Anna <s-anna@ti.com>

arch/arm64/boot/dts/ti/k3-am65-main.dtsi

@@ -113,6 +113,126 @@
 			ti,sci-rm-range-global-event = <0x1>;
 		};
 
+		mailbox0_cluster0: mailbox@31f80000 {
+			compatible = "ti,am654-mailbox";
+			reg = <0x00 0x31f80000 0x00 0x200>;
+			#mbox-cells = <1>;
+			ti,mbox-num-users = <4>;
+			ti,mbox-num-fifos = <16>;
+			interrupt-parent = <&main_navss_intr>;
+			interrupts = <164 0 IRQ_TYPE_LEVEL_HIGH>;
+
+			mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
+				ti,mbox-tx = <1 0 0>;
+				ti,mbox-rx = <0 0 0>;
+			};
+		};
+
+		mailbox0_cluster1: mailbox@31f81000 {
+			compatible = "ti,am654-mailbox";
+			reg = <0x00 0x31f81000 0x00 0x200>;
+			#mbox-cells = <1>;
+			ti,mbox-num-users = <4>;
+			ti,mbox-num-fifos = <16>;
+			interrupt-parent = <&main_navss_intr>;
+			interrupts = <165 0 IRQ_TYPE_LEVEL_HIGH>;
+
+			mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
+				ti,mbox-tx = <1 0 0>;
+				ti,mbox-rx = <0 0 0>;
+			};
+		};
+
+		mailbox0_cluster2: mailbox@31f82000 {
+			compatible = "ti,am654-mailbox";
+			reg = <0x00 0x31f82000 0x00 0x200>;
+			#mbox-cells = <1>;
+			ti,mbox-num-users = <4>;
+			ti,mbox-num-fifos = <16>;
+			status = "disabled";
+		};
+
+		mailbox0_cluster3: mailbox@31f83000 {
+			compatible = "ti,am654-mailbox";
+			reg = <0x00 0x31f83000 0x00 0x200>;
+			#mbox-cells = <1>;
+			ti,mbox-num-users = <4>;
+			ti,mbox-num-fifos = <16>;
+			status = "disabled";
+		};
+
+		mailbox0_cluster4: mailbox@31f84000 {
+			compatible = "ti,am654-mailbox";
+			reg = <0x00 0x31f84000 0x00 0x200>;
+			#mbox-cells = <1>;
+			ti,mbox-num-users = <4>;
+			ti,mbox-num-fifos = <16>;
+			status = "disabled";
+		};
+
+		mailbox0_cluster5: mailbox@31f85000 {
+			compatible = "ti,am654-mailbox";
+			reg = <0x00 0x31f85000 0x00 0x200>;
+			#mbox-cells = <1>;
+			ti,mbox-num-users = <4>;
+			ti,mbox-num-fifos = <16>;
+			status = "disabled";
+		};
+
+		mailbox0_cluster6: mailbox@31f86000 {
+			compatible = "ti,am654-mailbox";
+			reg = <0x00 0x31f86000 0x00 0x200>;
+			#mbox-cells = <1>;
+			ti,mbox-num-users = <4>;
+			ti,mbox-num-fifos = <16>;
+			status = "disabled";
+		};
+
+		mailbox0_cluster7: mailbox@31f87000 {
+			compatible = "ti,am654-mailbox";
+			reg = <0x00 0x31f87000 0x00 0x200>;
+			#mbox-cells = <1>;
+			ti,mbox-num-users = <4>;
+			ti,mbox-num-fifos = <16>;
+			status = "disabled";
+		};
+
+		mailbox0_cluster8: mailbox@31f88000 {
+			compatible = "ti,am654-mailbox";
+			reg = <0x00 0x31f88000 0x00 0x200>;
+			#mbox-cells = <1>;
+			ti,mbox-num-users = <4>;
+			ti,mbox-num-fifos = <16>;
+			status = "disabled";
+		};
+
+		mailbox0_cluster9: mailbox@31f89000 {
+			compatible = "ti,am654-mailbox";
+			reg = <0x00 0x31f89000 0x00 0x200>;
+			#mbox-cells = <1>;
+			ti,mbox-num-users = <4>;
+			ti,mbox-num-fifos = <16>;
+			status = "disabled";
+		};
+
+		mailbox0_cluster10: mailbox@31f8a000 {
+			compatible = "ti,am654-mailbox";
+			reg = <0x00 0x31f8a000 0x00 0x200>;
+			#mbox-cells = <1>;
+			ti,mbox-num-users = <4>;
+			ti,mbox-num-fifos = <16>;
+			status = "disabled";
+		};
+
+		mailbox0_cluster11: mailbox@31f8b000 {
+			compatible = "ti,am654-mailbox";
+			reg = <0x00 0x31f8b000 0x00 0x200>;
+			#mbox-cells = <1>;
+			ti,mbox-num-users = <4>;
+			ti,mbox-num-fifos = <16>;
+			status = "disabled";
+		};
+
 		ringacc: ringacc@3c000000 {
 			compatible = "ti,am654-navss-ringacc";
 			reg =	<0x0 0x3c000000 0x0 0x400000>,
@@ -297,124 +417,4 @@
 		clocks = <&k3_clks 58 0>;
 		clock-names = "gpio";
 	};
-
-	mailbox0_cluster0: mailbox@31f80000 {
-		compatible = "ti,am654-mailbox";
-		reg = <0x00 0x31f80000 0x00 0x200>;
-		#mbox-cells = <1>;
-		ti,mbox-num-users = <4>;
-		ti,mbox-num-fifos = <16>;
-		interrupt-parent = <&main_navss_intr>;
-		interrupts = <164 0 IRQ_TYPE_LEVEL_HIGH>;
-
-		mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
-			ti,mbox-tx = <1 0 0>;
-			ti,mbox-rx = <0 0 0>;
-		};
-	};
-
-	mailbox0_cluster1: mailbox@31f81000 {
-		compatible = "ti,am654-mailbox";
-		reg = <0x00 0x31f81000 0x00 0x200>;
-		#mbox-cells = <1>;
-		ti,mbox-num-users = <4>;
-		ti,mbox-num-fifos = <16>;
-		interrupt-parent = <&main_navss_intr>;
-		interrupts = <165 0 IRQ_TYPE_LEVEL_HIGH>;
-
-		mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
-			ti,mbox-tx = <1 0 0>;
-			ti,mbox-rx = <0 0 0>;
-		};
-	};
-
-	mailbox0_cluster2: mailbox@31f82000 {
-		compatible = "ti,am654-mailbox";
-		reg = <0x00 0x31f82000 0x00 0x200>;
-		#mbox-cells = <1>;
-		ti,mbox-num-users = <4>;
-		ti,mbox-num-fifos = <16>;
-		status = "disabled";
-	};
-
-	mailbox0_cluster3: mailbox@31f83000 {
-		compatible = "ti,am654-mailbox";
-		reg = <0x00 0x31f83000 0x00 0x200>;
-		#mbox-cells = <1>;
-		ti,mbox-num-users = <4>;
-		ti,mbox-num-fifos = <16>;
-		status = "disabled";
-	};
-
-	mailbox0_cluster4: mailbox@31f84000 {
-		compatible = "ti,am654-mailbox";
-		reg = <0x00 0x31f84000 0x00 0x200>;
-		#mbox-cells = <1>;
-		ti,mbox-num-users = <4>;
-		ti,mbox-num-fifos = <16>;
-		status = "disabled";
-	};
-
-	mailbox0_cluster5: mailbox@31f85000 {
-		compatible = "ti,am654-mailbox";
-		reg = <0x00 0x31f85000 0x00 0x200>;
-		#mbox-cells = <1>;
-		ti,mbox-num-users = <4>;
-		ti,mbox-num-fifos = <16>;
-		status = "disabled";
-	};
-
-	mailbox0_cluster6: mailbox@31f86000 {
-		compatible = "ti,am654-mailbox";
-		reg = <0x00 0x31f86000 0x00 0x200>;
-		#mbox-cells = <1>;
-		ti,mbox-num-users = <4>;
-		ti,mbox-num-fifos = <16>;
-		status = "disabled";
-	};
-
-	mailbox0_cluster7: mailbox@31f87000 {
-		compatible = "ti,am654-mailbox";
-		reg = <0x00 0x31f87000 0x00 0x200>;
-		#mbox-cells = <1>;
-		ti,mbox-num-users = <4>;
-		ti,mbox-num-fifos = <16>;
-		status = "disabled";
-	};
-
-	mailbox0_cluster8: mailbox@31f88000 {
-		compatible = "ti,am654-mailbox";
-		reg = <0x00 0x31f88000 0x00 0x200>;
-		#mbox-cells = <1>;
-		ti,mbox-num-users = <4>;
-		ti,mbox-num-fifos = <16>;
-		status = "disabled";
-	};
-
-	mailbox0_cluster9: mailbox@31f89000 {
-		compatible = "ti,am654-mailbox";
-		reg = <0x00 0x31f89000 0x00 0x200>;
-		#mbox-cells = <1>;
-		ti,mbox-num-users = <4>;
-		ti,mbox-num-fifos = <16>;
-		status = "disabled";
-	};
-
-	mailbox0_cluster10: mailbox@31f8a000 {
-		compatible = "ti,am654-mailbox";
-		reg = <0x00 0x31f8a000 0x00 0x200>;
-		#mbox-cells = <1>;
-		ti,mbox-num-users = <4>;
-		ti,mbox-num-fifos = <16>;
-		status = "disabled";
-	};
-
-	mailbox0_cluster11: mailbox@31f8b000 {
-		compatible = "ti,am654-mailbox";
-		reg = <0x00 0x31f8b000 0x00 0x200>;
-		#mbox-cells = <1>;
-		ti,mbox-num-users = <4>;
-		ti,mbox-num-fifos = <16>;
-		status = "disabled";
-	};
 };