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@@ -252,8 +252,14 @@ void intel_csr_load_program(struct drm_i915_private *dev_priv)
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}
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}
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fw_size = dev_priv->csr.dmc_fw_size;
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fw_size = dev_priv->csr.dmc_fw_size;
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+ assert_rpm_wakelock_held(dev_priv);
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+
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+ preempt_disable();
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+
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for (i = 0; i < fw_size; i++)
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for (i = 0; i < fw_size; i++)
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- I915_WRITE(CSR_PROGRAM(i), payload[i]);
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+ I915_WRITE_FW(CSR_PROGRAM(i), payload[i]);
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+
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+ preempt_enable();
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for (i = 0; i < dev_priv->csr.mmio_count; i++) {
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for (i = 0; i < dev_priv->csr.mmio_count; i++) {
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I915_WRITE(dev_priv->csr.mmioaddr[i],
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I915_WRITE(dev_priv->csr.mmioaddr[i],
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