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@@ -1342,7 +1342,7 @@ static void nvme_configure_apst(struct nvme_ctrl *ctrl)
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* transitioning between power states. Therefore, when running
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* in any given state, we will enter the next lower-power
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* non-operational state after waiting 50 * (enlat + exlat)
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- * microseconds, as long as that state's total latency is under
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+ * microseconds, as long as that state's exit latency is under
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* the requested maximum latency.
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*
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* We will not autonomously enter any non-operational state for
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@@ -1387,7 +1387,7 @@ static void nvme_configure_apst(struct nvme_ctrl *ctrl)
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* lowest-power state, not the number of states.
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*/
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for (state = (int)ctrl->npss; state >= 0; state--) {
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- u64 total_latency_us, transition_ms;
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+ u64 total_latency_us, exit_latency_us, transition_ms;
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if (target)
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table->entries[state] = target;
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@@ -1408,12 +1408,15 @@ static void nvme_configure_apst(struct nvme_ctrl *ctrl)
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NVME_PS_FLAGS_NON_OP_STATE))
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continue;
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- total_latency_us =
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- (u64)le32_to_cpu(ctrl->psd[state].entry_lat) +
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- + le32_to_cpu(ctrl->psd[state].exit_lat);
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- if (total_latency_us > ctrl->ps_max_latency_us)
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+ exit_latency_us =
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+ (u64)le32_to_cpu(ctrl->psd[state].exit_lat);
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+ if (exit_latency_us > ctrl->ps_max_latency_us)
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continue;
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+ total_latency_us =
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+ exit_latency_us +
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+ le32_to_cpu(ctrl->psd[state].entry_lat);
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+
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/*
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* This state is good. Use it as the APST idle
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* target for higher power states.
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