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@@ -96,74 +96,38 @@
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#size-cells = <1>;
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ranges;
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- misc_clk: misc_clk {
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- compatible = "fixed-clock";
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- #clock-cells = <0>;
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- clock-frequency = <25000000>;
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- };
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-
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- ttc0: timer@ff110000 {
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- compatible = "cdns,ttc";
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- status = "disabled";
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- interrupt-parent = <&gic>;
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- interrupts = <0 36 4>, <0 37 4>, <0 38 4>;
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- reg = <0x0 0xff110000 0x1000>;
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- clocks = <&misc_clk>;
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- timer-width = <32>;
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- };
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-
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- ttc1: timer@ff120000 {
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- compatible = "cdns,ttc";
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- status = "disabled";
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- interrupt-parent = <&gic>;
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- interrupts = <0 39 4>, <0 40 4>, <0 41 4>;
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- reg = <0x0 0xff120000 0x1000>;
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- clocks = <&misc_clk>;
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- timer-width = <32>;
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- };
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-
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- ttc2: timer@ff130000 {
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- compatible = "cdns,ttc";
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- status = "disabled";
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- interrupt-parent = <&gic>;
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- interrupts = <0 42 4>, <0 43 4>, <0 44 4>;
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- reg = <0x0 0xff130000 0x1000>;
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- clocks = <&misc_clk>;
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- timer-width = <32>;
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- };
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-
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- ttc3: timer@ff140000 {
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- compatible = "cdns,ttc";
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+ can0: can@ff060000 {
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+ compatible = "xlnx,zynq-can-1.0";
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status = "disabled";
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+ clocks = <&misc_clk &misc_clk>;
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+ clock-names = "can_clk", "pclk";
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+ reg = <0x0 0xff060000 0x1000>;
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+ interrupts = <0 23 4>;
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interrupt-parent = <&gic>;
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- interrupts = <0 45 4>, <0 46 4>, <0 47 4>;
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- reg = <0x0 0xff140000 0x1000>;
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- clocks = <&misc_clk>;
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- timer-width = <32>;
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+ tx-fifo-depth = <0x40>;
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+ rx-fifo-depth = <0x40>;
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};
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- uart0: serial@ff000000 {
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- compatible = "cdns,uart-r1p8";
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+ can1: can@ff070000 {
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+ compatible = "xlnx,zynq-can-1.0";
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status = "disabled";
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- interrupt-parent = <&gic>;
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- interrupts = <0 21 4>;
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- reg = <0x0 0xff000000 0x1000>;
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- clock-names = "uart_clk", "pclk";
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clocks = <&misc_clk &misc_clk>;
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+ clock-names = "can_clk", "pclk";
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+ reg = <0x0 0xff070000 0x1000>;
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+ interrupts = <0 24 4>;
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+ interrupt-parent = <&gic>;
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+ tx-fifo-depth = <0x40>;
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+ rx-fifo-depth = <0x40>;
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};
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- uart1: serial@ff010000 {
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- compatible = "cdns,uart-r1p8";
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- status = "disabled";
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- interrupt-parent = <&gic>;
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- interrupts = <0 22 4>;
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- reg = <0x0 0xff010000 0x1000>;
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- clock-names = "uart_clk", "pclk";
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- clocks = <&misc_clk &misc_clk>;
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+ misc_clk: misc_clk {
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+ compatible = "fixed-clock";
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+ #clock-cells = <0>;
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+ clock-frequency = <25000000>;
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};
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gpio: gpio@ff0a0000 {
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- compatible = "xlnx,zynq-gpio-1.0";
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+ compatible = "xlnx,zynqmp-gpio-1.0";
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status = "disabled";
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#gpio-cells = <0x2>;
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clocks = <&misc_clk>;
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@@ -220,30 +184,6 @@
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#size-cells = <0>;
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};
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- spi0: spi@ff040000 {
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- compatible = "cdns,spi-r1p6";
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- status = "disabled";
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- interrupt-parent = <&gic>;
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- interrupts = <0 19 4>;
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- reg = <0x0 0xff040000 0x1000>;
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- clock-names = "ref_clk", "pclk";
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- clocks = <&misc_clk &misc_clk>;
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- #address-cells = <1>;
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- #size-cells = <0>;
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- };
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-
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- spi1: spi@ff050000 {
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- compatible = "cdns,spi-r1p6";
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- status = "disabled";
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- interrupt-parent = <&gic>;
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- interrupts = <0 20 4>;
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- reg = <0x0 0xff050000 0x1000>;
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- clock-names = "ref_clk", "pclk";
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- clocks = <&misc_clk &misc_clk>;
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- #address-cells = <1>;
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- #size-cells = <0>;
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- };
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-
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i2c_clk: i2c_clk {
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compatible = "fixed-clock";
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#clock-cells = <0x0>;
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@@ -272,6 +212,21 @@
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#size-cells = <0>;
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};
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+ sata_clk: sata_clk {
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+ compatible = "fixed-clock";
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+ #clock-cells = <0>;
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+ clock-frequency = <75000000>;
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+ };
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+
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+ sata: ahci@fd0c0000 {
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+ compatible = "ceva,ahci-1v84";
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+ status = "disabled";
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+ reg = <0x0 0xfd0c0000 0x2000>;
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+ interrupt-parent = <&gic>;
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+ interrupts = <0 133 4>;
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+ clocks = <&sata_clk>;
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+ };
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+
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sdhci0: sdhci@ff160000 {
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compatible = "arasan,sdhci-8.9a";
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status = "disabled";
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@@ -292,6 +247,122 @@
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clocks = <&misc_clk>, <&misc_clk>;
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};
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+ smmu: smmu@fd800000 {
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+ compatible = "arm,mmu-500";
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+ reg = <0x0 0xfd800000 0x20000>;
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+ #global-interrupts = <1>;
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+ interrupt-parent = <&gic>;
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+ interrupts = <0 157 4>,
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+ <0 157 4>, <0 157 4>, <0 157 4>, <0 157 4>,
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+ <0 157 4>, <0 157 4>, <0 157 4>, <0 157 4>,
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+ <0 157 4>, <0 157 4>, <0 157 4>, <0 157 4>,
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+ <0 157 4>, <0 157 4>, <0 157 4>, <0 157 4>;
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+ };
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+
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+ spi0: spi@ff040000 {
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+ compatible = "cdns,spi-r1p6";
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+ status = "disabled";
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+ interrupt-parent = <&gic>;
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+ interrupts = <0 19 4>;
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+ reg = <0x0 0xff040000 0x1000>;
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+ clock-names = "ref_clk", "pclk";
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+ clocks = <&misc_clk &misc_clk>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ };
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+
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+ spi1: spi@ff050000 {
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+ compatible = "cdns,spi-r1p6";
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+ status = "disabled";
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+ interrupt-parent = <&gic>;
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+ interrupts = <0 20 4>;
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+ reg = <0x0 0xff050000 0x1000>;
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+ clock-names = "ref_clk", "pclk";
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+ clocks = <&misc_clk &misc_clk>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ };
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+
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+ ttc0: timer@ff110000 {
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+ compatible = "cdns,ttc";
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+ status = "disabled";
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+ interrupt-parent = <&gic>;
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+ interrupts = <0 36 4>, <0 37 4>, <0 38 4>;
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+ reg = <0x0 0xff110000 0x1000>;
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+ clocks = <&misc_clk>;
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+ timer-width = <32>;
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+ };
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+
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+ ttc1: timer@ff120000 {
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+ compatible = "cdns,ttc";
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+ status = "disabled";
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+ interrupt-parent = <&gic>;
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+ interrupts = <0 39 4>, <0 40 4>, <0 41 4>;
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+ reg = <0x0 0xff120000 0x1000>;
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+ clocks = <&misc_clk>;
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+ timer-width = <32>;
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+ };
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+
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+ ttc2: timer@ff130000 {
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+ compatible = "cdns,ttc";
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+ status = "disabled";
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+ interrupt-parent = <&gic>;
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+ interrupts = <0 42 4>, <0 43 4>, <0 44 4>;
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+ reg = <0x0 0xff130000 0x1000>;
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+ clocks = <&misc_clk>;
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+ timer-width = <32>;
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+ };
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+
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+ ttc3: timer@ff140000 {
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+ compatible = "cdns,ttc";
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+ status = "disabled";
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+ interrupt-parent = <&gic>;
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+ interrupts = <0 45 4>, <0 46 4>, <0 47 4>;
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+ reg = <0x0 0xff140000 0x1000>;
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+ clocks = <&misc_clk>;
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+ timer-width = <32>;
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+ };
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+
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+ uart0: serial@ff000000 {
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+ compatible = "cdns,uart-r1p8";
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+ status = "disabled";
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+ interrupt-parent = <&gic>;
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+ interrupts = <0 21 4>;
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+ reg = <0x0 0xff000000 0x1000>;
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+ clock-names = "uart_clk", "pclk";
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+ clocks = <&misc_clk &misc_clk>;
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+ };
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+
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+ uart1: serial@ff010000 {
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+ compatible = "cdns,uart-r1p8";
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+ status = "disabled";
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+ interrupt-parent = <&gic>;
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+ interrupts = <0 22 4>;
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+ reg = <0x0 0xff010000 0x1000>;
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+ clock-names = "uart_clk", "pclk";
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+ clocks = <&misc_clk &misc_clk>;
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+ };
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+
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+ usb0: usb@fe200000 {
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+ compatible = "snps,dwc3";
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+ status = "disabled";
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+ interrupt-parent = <&gic>;
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+ interrupts = <0 65 4>;
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+ reg = <0x0 0xfe200000 0x40000>;
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+ clock-names = "clk_xin", "clk_ahb";
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+ clocks = <&misc_clk>, <&misc_clk>;
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+ };
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+
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+ usb1: usb@fe300000 {
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+ compatible = "snps,dwc3";
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+ status = "disabled";
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+ interrupt-parent = <&gic>;
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+ interrupts = <0 70 4>;
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+ reg = <0x0 0xfe300000 0x40000>;
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+ clock-names = "clk_xin", "clk_ahb";
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+ clocks = <&misc_clk>, <&misc_clk>;
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+ };
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+
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watchdog0: watchdog@fd4d0000 {
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compatible = "cdns,wdt-r1p2";
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status = "disabled";
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