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@@ -6107,6 +6107,8 @@ static void gfx_v8_0_update_coarse_grain_clock_gating(struct amdgpu_device *adev
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RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK);
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RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK);
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if (temp != data)
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if (temp != data)
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WREG32(mmRLC_CGCG_CGLS_CTRL, data);
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WREG32(mmRLC_CGCG_CGLS_CTRL, data);
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+ /* enable interrupts again for PG */
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+ gfx_v8_0_enable_gui_idle_interrupt(adev, true);
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}
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}
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gfx_v8_0_wait_for_rlc_serdes(adev);
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gfx_v8_0_wait_for_rlc_serdes(adev);
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