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@@ -70,8 +70,7 @@ int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,
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/**
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* intel_pipe_update_start() - start update of a set of display registers
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- * @crtc: the crtc of which the registers are going to be updated
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- * @start_vbl_count: vblank counter return pointer used for error checking
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+ * @new_crtc_state: the new crtc state
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*
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* Mark the start of an update to pipe registers that should be updated
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* atomically regarding vblank. If the next vblank will happens within
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@@ -79,18 +78,18 @@ int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,
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*
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* After a successful call to this function, interrupts will be disabled
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* until a subsequent call to intel_pipe_update_end(). That is done to
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- * avoid random delays. The value written to @start_vbl_count should be
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- * supplied to intel_pipe_update_end() for error checking.
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+ * avoid random delays.
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*/
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-void intel_pipe_update_start(struct intel_crtc *crtc)
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+void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state)
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{
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+ struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc);
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struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
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- const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
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+ const struct drm_display_mode *adjusted_mode = &new_crtc_state->base.adjusted_mode;
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long timeout = msecs_to_jiffies_timeout(1);
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int scanline, min, max, vblank_start;
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wait_queue_head_t *wq = drm_crtc_vblank_waitqueue(&crtc->base);
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bool need_vlv_dsi_wa = (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) &&
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- intel_crtc_has_type(crtc->config, INTEL_OUTPUT_DSI);
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+ intel_crtc_has_type(new_crtc_state, INTEL_OUTPUT_DSI);
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DEFINE_WAIT(wait);
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vblank_start = adjusted_mode->crtc_vblank_start;
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@@ -170,15 +169,15 @@ void intel_pipe_update_start(struct intel_crtc *crtc)
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/**
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* intel_pipe_update_end() - end update of a set of display registers
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- * @crtc: the crtc of which the registers were updated
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- * @start_vbl_count: start vblank counter (used for error checking)
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+ * @new_crtc_state: the new crtc state
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*
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* Mark the end of an update started with intel_pipe_update_start(). This
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* re-enables interrupts and verifies the update was actually completed
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- * before a vblank using the value of @start_vbl_count.
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+ * before a vblank.
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*/
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-void intel_pipe_update_end(struct intel_crtc *crtc)
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+void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state)
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{
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+ struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc);
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enum pipe pipe = crtc->pipe;
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int scanline_end = intel_get_crtc_scanline(crtc);
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u32 end_vbl_count = intel_crtc_get_vblank_counter(crtc);
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@@ -191,14 +190,14 @@ void intel_pipe_update_end(struct intel_crtc *crtc)
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* Would be slightly nice to just grab the vblank count and arm the
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* event outside of the critical section - the spinlock might spin for a
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* while ... */
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- if (crtc->base.state->event) {
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+ if (new_crtc_state->base.event) {
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WARN_ON(drm_crtc_vblank_get(&crtc->base) != 0);
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spin_lock(&crtc->base.dev->event_lock);
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- drm_crtc_arm_vblank_event(&crtc->base, crtc->base.state->event);
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+ drm_crtc_arm_vblank_event(&crtc->base, new_crtc_state->base.event);
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spin_unlock(&crtc->base.dev->event_lock);
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- crtc->base.state->event = NULL;
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+ new_crtc_state->base.event = NULL;
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}
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local_irq_enable();
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