|
|
@@ -85,6 +85,7 @@ struct at86rf230_local {
|
|
|
struct ieee802154_hw *hw;
|
|
|
struct at86rf2xx_chip_data *data;
|
|
|
struct regmap *regmap;
|
|
|
+ int slp_tr;
|
|
|
|
|
|
struct completion state_complete;
|
|
|
struct at86rf230_state_change state;
|
|
|
@@ -339,6 +340,14 @@ at86rf230_write_subreg(struct at86rf230_local *lp,
|
|
|
return regmap_update_bits(lp->regmap, addr, mask, data << shift);
|
|
|
}
|
|
|
|
|
|
+static inline void
|
|
|
+at86rf230_slp_tr_rising_edge(struct at86rf230_local *lp)
|
|
|
+{
|
|
|
+ gpio_set_value(lp->slp_tr, 1);
|
|
|
+ udelay(1);
|
|
|
+ gpio_set_value(lp->slp_tr, 0);
|
|
|
+}
|
|
|
+
|
|
|
static bool
|
|
|
at86rf230_reg_writeable(struct device *dev, unsigned int reg)
|
|
|
{
|
|
|
@@ -940,13 +949,18 @@ at86rf230_write_frame_complete(void *context)
|
|
|
u8 *buf = ctx->buf;
|
|
|
int rc;
|
|
|
|
|
|
- buf[0] = (RG_TRX_STATE & CMD_REG_MASK) | CMD_REG | CMD_WRITE;
|
|
|
- buf[1] = STATE_BUSY_TX;
|
|
|
ctx->trx.len = 2;
|
|
|
- ctx->msg.complete = NULL;
|
|
|
- rc = spi_async(lp->spi, &ctx->msg);
|
|
|
- if (rc)
|
|
|
- at86rf230_async_error(lp, ctx, rc);
|
|
|
+
|
|
|
+ if (gpio_is_valid(lp->slp_tr)) {
|
|
|
+ at86rf230_slp_tr_rising_edge(lp);
|
|
|
+ } else {
|
|
|
+ buf[0] = (RG_TRX_STATE & CMD_REG_MASK) | CMD_REG | CMD_WRITE;
|
|
|
+ buf[1] = STATE_BUSY_TX;
|
|
|
+ ctx->msg.complete = NULL;
|
|
|
+ rc = spi_async(lp->spi, &ctx->msg);
|
|
|
+ if (rc)
|
|
|
+ at86rf230_async_error(lp, ctx, rc);
|
|
|
+ }
|
|
|
}
|
|
|
|
|
|
static void
|
|
|
@@ -1680,6 +1694,7 @@ static int at86rf230_probe(struct spi_device *spi)
|
|
|
lp = hw->priv;
|
|
|
lp->hw = hw;
|
|
|
lp->spi = spi;
|
|
|
+ lp->slp_tr = slp_tr;
|
|
|
hw->parent = &spi->dev;
|
|
|
hw->vif_data_size = sizeof(*lp);
|
|
|
ieee802154_random_extended_addr(&hw->phy->perm_extended_addr);
|