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@@ -35,12 +35,33 @@
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#define sys_reg(op0, op1, crn, crm, op2) \
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((((op0)&3)<<19)|((op1)<<16)|((crn)<<12)|((crm)<<8)|((op2)<<5))
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+#ifndef CONFIG_BROKEN_GAS_INST
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+
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#ifdef __ASSEMBLY__
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#define __emit_inst(x) .inst (x)
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#else
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#define __emit_inst(x) ".inst " __stringify((x)) "\n\t"
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#endif
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+#else /* CONFIG_BROKEN_GAS_INST */
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+
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+#ifndef CONFIG_CPU_BIG_ENDIAN
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+#define __INSTR_BSWAP(x) (x)
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+#else /* CONFIG_CPU_BIG_ENDIAN */
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+#define __INSTR_BSWAP(x) ((((x) << 24) & 0xff000000) | \
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+ (((x) << 8) & 0x00ff0000) | \
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+ (((x) >> 8) & 0x0000ff00) | \
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+ (((x) >> 24) & 0x000000ff))
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+#endif /* CONFIG_CPU_BIG_ENDIAN */
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+
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+#ifdef __ASSEMBLY__
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+#define __emit_inst(x) .long __INSTR_BSWAP(x)
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+#else /* __ASSEMBLY__ */
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+#define __emit_inst(x) ".long " __stringify(__INSTR_BSWAP(x)) "\n\t"
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+#endif /* __ASSEMBLY__ */
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+
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+#endif /* CONFIG_BROKEN_GAS_INST */
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+
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#define SYS_MIDR_EL1 sys_reg(3, 0, 0, 0, 0)
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#define SYS_MPIDR_EL1 sys_reg(3, 0, 0, 0, 5)
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#define SYS_REVIDR_EL1 sys_reg(3, 0, 0, 0, 6)
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@@ -232,11 +253,11 @@
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.equ .L__reg_num_xzr, 31
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.macro mrs_s, rt, sreg
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- .inst 0xd5200000|(\sreg)|(.L__reg_num_\rt)
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+ __emit_inst(0xd5200000|(\sreg)|(.L__reg_num_\rt))
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.endm
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.macro msr_s, sreg, rt
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- .inst 0xd5000000|(\sreg)|(.L__reg_num_\rt)
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+ __emit_inst(0xd5000000|(\sreg)|(.L__reg_num_\rt))
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.endm
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#else
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@@ -250,11 +271,11 @@ asm(
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" .equ .L__reg_num_xzr, 31\n"
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"\n"
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" .macro mrs_s, rt, sreg\n"
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-" .inst 0xd5200000|(\\sreg)|(.L__reg_num_\\rt)\n"
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+ __emit_inst(0xd5200000|(\\sreg)|(.L__reg_num_\\rt))
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" .endm\n"
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"\n"
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" .macro msr_s, sreg, rt\n"
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-" .inst 0xd5000000|(\\sreg)|(.L__reg_num_\\rt)\n"
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+ __emit_inst(0xd5000000|(\\sreg)|(.L__reg_num_\\rt))
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" .endm\n"
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);
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