dt-bindings: irqchip: pruss-intc: Update bindings for K3 AM65x SoCs

The K3 AM65x SoCs have the next generation of the PRU-ICSS IP, commonly
called ICSSG. The ICSSG interrupt controller on K3 SoCs provide a higher
number of host interrupts (20 vs 10) and can handle an increased number
of input events (160 vs 64) from various SoC interrupt sources. Update
the PRUSS interrupt controller binings for these newer generarion ICSSG
instances.

Signed-off-by: Suman Anna <s-anna@ti.com>

Documentation/devicetree/bindings/interrupt-controller/ti,pruss-intc.txt

@@ -9,6 +9,10 @@ internal and external peripherals. The first 2 output interrupts are fed
 exclusively to the internal PRU cores, with the remaining 8 connected to
 external interrupt controllers including the MPU.
 
+The K3 family of SoCs can handle 160 input events that can be mapped to 20
+different possible output interrupts. The additional output interrupts are
+connected to new sub-modules within the ICSSG instances.
+
 This interrupt-controller node should be defined as a child node of the
 corresponding PRUSS node. The node should be named "interrupt-controller".
 Please see the overall PRUSS bindings document for additional details
@@ -22,6 +26,7 @@ Required Properties:
                              "ti,am4376-pruss-intc" for AM437x family of SoCs
                              "ti,am5728-pruss-intc" for AM57xx family of SoCs
                              "ti,k2g-pruss-intc" for 66AK2G family of SoCs
+                             "ti,am654-icssg-intc" for K3 AM65x family of SoCs
 - reg                  : base address and size for the PRUSS INTC sub-module
 - interrupt-controller : mark this node as an interrupt controller
 - #interrupt-cells     : should be 1. Client users shall use the PRU System