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@@ -2334,6 +2334,7 @@ struct revision
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#define FSACTL_GET_CONTAINERS 2131
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#define FSACTL_SEND_LARGE_FIB CTL_CODE(2138, METHOD_BUFFERED)
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#define FSACTL_RESET_IOP CTL_CODE(2140, METHOD_BUFFERED)
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+#define FSACTL_GET_HBA_INFO CTL_CODE(2150, METHOD_BUFFERED)
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/* flags defined for IOP & HW SOFT RESET */
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#define HW_IOP_RESET 0x01
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#define HW_SOFT_RESET 0x02
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@@ -2372,6 +2373,57 @@ struct aac_common
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extern struct aac_common aac_config;
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+/*
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+ * This is for management ioctl purpose only.
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+ */
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+struct aac_hba_info {
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+
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+ u8 driver_name[50];
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+ u8 adapter_number;
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+ u8 system_io_bus_number;
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+ u8 device_number;
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+ u32 function_number;
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+ u32 vendor_id;
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+ u32 device_id;
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+ u32 sub_vendor_id;
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+ u32 sub_system_id;
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+ u32 mapped_base_address_size;
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+ u32 base_physical_address_high_part;
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+ u32 base_physical_address_low_part;
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+
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+ u32 max_command_size;
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+ u32 max_fib_size;
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+ u32 max_scatter_gather_from_os;
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+ u32 max_scatter_gather_to_fw;
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+ u32 max_outstanding_fibs;
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+
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+ u32 queue_start_threshold;
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+ u32 queue_dump_threshold;
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+ u32 max_io_size_queued;
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+ u32 outstanding_io;
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+
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+ u32 firmware_build_number;
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+ u32 bios_build_number;
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+ u32 driver_build_number;
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+ u32 serial_number_high_part;
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+ u32 serial_number_low_part;
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+ u32 supported_options;
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+ u32 feature_bits;
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+ u32 currentnumber_ports;
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+
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+ u8 new_comm_interface:1;
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+ u8 new_commands_supported:1;
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+ u8 disable_passthrough:1;
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+ u8 expose_non_dasd:1;
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+ u8 queue_allowed:1;
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+ u8 bled_check_enabled:1;
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+ u8 reserved1:1;
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+ u8 reserted2:1;
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+
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+ u32 reserved3[10];
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+
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+};
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+
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/*
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* The following macro is used when sending and receiving FIBs. It is
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* only used for debugging.
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