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@@ -746,15 +746,12 @@ static int iwl_pcie_load_given_ucode(struct iwl_trans *trans,
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int ret = 0;
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int ret = 0;
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int first_ucode_section;
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int first_ucode_section;
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- IWL_DEBUG_FW(trans,
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- "working with %s image\n",
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- image->is_secure ? "Secured" : "Non Secured");
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IWL_DEBUG_FW(trans,
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IWL_DEBUG_FW(trans,
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"working with %s CPU\n",
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"working with %s CPU\n",
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image->is_dual_cpus ? "Dual" : "Single");
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image->is_dual_cpus ? "Dual" : "Single");
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/* configure the ucode to be ready to get the secured image */
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/* configure the ucode to be ready to get the secured image */
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- if (image->is_secure) {
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+ if (iwl_has_secure_boot(trans->hw_rev, trans->cfg->device_family)) {
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/* set secure boot inspector addresses */
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/* set secure boot inspector addresses */
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iwl_write_prph(trans,
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iwl_write_prph(trans,
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LMPM_SECURE_INSPECTOR_CODE_ADDR,
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LMPM_SECURE_INSPECTOR_CODE_ADDR,
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@@ -790,7 +787,8 @@ static int iwl_pcie_load_given_ucode(struct iwl_trans *trans,
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LMPM_SECURE_CPU2_HDR_MEM_SPACE);
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LMPM_SECURE_CPU2_HDR_MEM_SPACE);
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/* load to FW the binary sections of CPU2 */
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/* load to FW the binary sections of CPU2 */
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- if (image->is_secure)
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+ if (iwl_has_secure_boot(trans->hw_rev,
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+ trans->cfg->device_family))
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ret = iwl_pcie_load_cpu_secured_sections(
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ret = iwl_pcie_load_cpu_secured_sections(
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trans, image, 2,
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trans, image, 2,
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&first_ucode_section);
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&first_ucode_section);
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@@ -821,7 +819,7 @@ static int iwl_pcie_load_given_ucode(struct iwl_trans *trans,
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else
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else
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iwl_write32(trans, CSR_RESET, 0);
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iwl_write32(trans, CSR_RESET, 0);
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- if (image->is_secure) {
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+ if (iwl_has_secure_boot(trans->hw_rev, trans->cfg->device_family)) {
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/* wait for image verification to complete */
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/* wait for image verification to complete */
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ret = iwl_poll_prph_bit(trans,
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ret = iwl_poll_prph_bit(trans,
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LMPM_SECURE_BOOT_CPU1_STATUS_ADDR,
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LMPM_SECURE_BOOT_CPU1_STATUS_ADDR,
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