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@@ -1234,14 +1234,22 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
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SPTOREG(fd, MIPSInst_FD(ir));
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copcsr:
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- if (ieee754_cxtest(IEEE754_INEXACT))
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+ if (ieee754_cxtest(IEEE754_INEXACT)) {
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+ MIPS_FPU_EMU_INC_STATS(ieee754_inexact);
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rcsr |= FPU_CSR_INE_X | FPU_CSR_INE_S;
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- if (ieee754_cxtest(IEEE754_UNDERFLOW))
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+ }
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+ if (ieee754_cxtest(IEEE754_UNDERFLOW)) {
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+ MIPS_FPU_EMU_INC_STATS(ieee754_underflow);
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rcsr |= FPU_CSR_UDF_X | FPU_CSR_UDF_S;
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- if (ieee754_cxtest(IEEE754_OVERFLOW))
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+ }
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+ if (ieee754_cxtest(IEEE754_OVERFLOW)) {
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+ MIPS_FPU_EMU_INC_STATS(ieee754_overflow);
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rcsr |= FPU_CSR_OVF_X | FPU_CSR_OVF_S;
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- if (ieee754_cxtest(IEEE754_INVALID_OPERATION))
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+ }
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+ if (ieee754_cxtest(IEEE754_INVALID_OPERATION)) {
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+ MIPS_FPU_EMU_INC_STATS(ieee754_invalidop);
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rcsr |= FPU_CSR_INV_X | FPU_CSR_INV_S;
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+ }
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ctx->fcr31 = (ctx->fcr31 & ~FPU_CSR_ALL_X) | rcsr;
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if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) {
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@@ -1468,16 +1476,26 @@ scopuop:
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rv.s = (*handler.u) (fs);
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goto copcsr;
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copcsr:
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- if (ieee754_cxtest(IEEE754_INEXACT))
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+ if (ieee754_cxtest(IEEE754_INEXACT)) {
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+ MIPS_FPU_EMU_INC_STATS(ieee754_inexact);
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rcsr |= FPU_CSR_INE_X | FPU_CSR_INE_S;
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- if (ieee754_cxtest(IEEE754_UNDERFLOW))
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+ }
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+ if (ieee754_cxtest(IEEE754_UNDERFLOW)) {
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+ MIPS_FPU_EMU_INC_STATS(ieee754_underflow);
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rcsr |= FPU_CSR_UDF_X | FPU_CSR_UDF_S;
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- if (ieee754_cxtest(IEEE754_OVERFLOW))
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+ }
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+ if (ieee754_cxtest(IEEE754_OVERFLOW)) {
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+ MIPS_FPU_EMU_INC_STATS(ieee754_overflow);
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rcsr |= FPU_CSR_OVF_X | FPU_CSR_OVF_S;
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- if (ieee754_cxtest(IEEE754_ZERO_DIVIDE))
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+ }
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+ if (ieee754_cxtest(IEEE754_ZERO_DIVIDE)) {
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+ MIPS_FPU_EMU_INC_STATS(ieee754_zerodiv);
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rcsr |= FPU_CSR_DIV_X | FPU_CSR_DIV_S;
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- if (ieee754_cxtest(IEEE754_INVALID_OPERATION))
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+ }
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+ if (ieee754_cxtest(IEEE754_INVALID_OPERATION)) {
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+ MIPS_FPU_EMU_INC_STATS(ieee754_invalidop);
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rcsr |= FPU_CSR_INV_X | FPU_CSR_INV_S;
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+ }
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break;
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/* unary conv ops */
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