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@@ -58,12 +58,15 @@
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#define EDMA_DESCRIPTORS 16
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struct edma_pset {
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+ u32 len;
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+ dma_addr_t addr;
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struct edmacc_param param;
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};
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struct edma_desc {
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struct virt_dma_desc vdesc;
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struct list_head node;
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+ enum dma_transfer_direction direction;
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int cyclic;
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int absync;
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int pset_nr;
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@@ -376,16 +379,20 @@ static int edma_config_pset(struct dma_chan *chan, struct edma_pset *epset,
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cidx = acnt * bcnt;
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}
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+ epset->len = dma_length;
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+
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if (direction == DMA_MEM_TO_DEV) {
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src_bidx = acnt;
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src_cidx = cidx;
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dst_bidx = 0;
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dst_cidx = 0;
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+ epset->addr = src_addr;
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} else if (direction == DMA_DEV_TO_MEM) {
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src_bidx = 0;
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src_cidx = 0;
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dst_bidx = acnt;
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dst_cidx = cidx;
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+ epset->addr = dst_addr;
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} else if (direction == DMA_MEM_TO_MEM) {
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src_bidx = acnt;
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src_cidx = cidx;
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@@ -463,6 +470,7 @@ static struct dma_async_tx_descriptor *edma_prep_slave_sg(
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edesc->pset_nr = sg_len;
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edesc->residue = 0;
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+ edesc->direction = direction;
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/* Allocate a PaRAM slot, if needed */
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nslots = min_t(unsigned, MAX_NR_SG, sg_len);
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@@ -615,6 +623,7 @@ static struct dma_async_tx_descriptor *edma_prep_dma_cyclic(
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edesc->cyclic = 1;
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edesc->pset_nr = nslots;
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edesc->residue = buf_len;
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+ edesc->direction = direction;
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dev_dbg(dev, "%s: channel=%d nslots=%d period_len=%zu buf_len=%zu\n",
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__func__, echan->ch_num, nslots, period_len, buf_len);
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