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@@ -1617,7 +1617,10 @@ static void gfx_v9_0_gpu_init(struct amdgpu_device *adev)
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tmp = REG_SET_FIELD(0, SH_MEM_CONFIG, ALIGNMENT_MODE,
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SH_MEM_ALIGNMENT_MODE_UNALIGNED);
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WREG32_SOC15(GC, 0, mmSH_MEM_CONFIG, tmp);
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- tmp = adev->gmc.shared_aperture_start >> 48;
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+ tmp = REG_SET_FIELD(0, SH_MEM_BASES, PRIVATE_BASE,
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+ (adev->gmc.private_aperture_start >> 48));
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+ tmp = REG_SET_FIELD(tmp, SH_MEM_BASES, SHARED_BASE,
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+ (adev->gmc.shared_aperture_start >> 48));
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WREG32_SOC15(GC, 0, mmSH_MEM_BASES, tmp);
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}
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}
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