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@@ -1041,6 +1041,8 @@ static int adv7511_s_dv_timings(struct v4l2_subdev *sd,
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struct v4l2_dv_timings *timings)
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{
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struct adv7511_state *state = get_adv7511_state(sd);
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+ struct v4l2_bt_timings *bt = &timings->bt;
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+ u32 fps;
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v4l2_dbg(1, debug, sd, "%s:\n", __func__);
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@@ -1052,15 +1054,29 @@ static int adv7511_s_dv_timings(struct v4l2_subdev *sd,
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if the format is one of the CEA or DMT timings. */
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v4l2_find_dv_timings_cap(timings, &adv7511_timings_cap, 0, NULL, NULL);
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- timings->bt.flags &= ~V4L2_DV_FL_REDUCED_FPS;
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-
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/* save timings */
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state->dv_timings = *timings;
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/* set h/vsync polarities */
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adv7511_wr_and_or(sd, 0x17, 0x9f,
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- ((timings->bt.polarities & V4L2_DV_VSYNC_POS_POL) ? 0 : 0x40) |
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- ((timings->bt.polarities & V4L2_DV_HSYNC_POS_POL) ? 0 : 0x20));
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+ ((bt->polarities & V4L2_DV_VSYNC_POS_POL) ? 0 : 0x40) |
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+ ((bt->polarities & V4L2_DV_HSYNC_POS_POL) ? 0 : 0x20));
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+
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+ fps = (u32)bt->pixelclock / (V4L2_DV_BT_FRAME_WIDTH(bt) * V4L2_DV_BT_FRAME_HEIGHT(bt));
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+ switch (fps) {
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+ case 24:
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+ adv7511_wr_and_or(sd, 0xfb, 0xf9, 1 << 1);
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+ break;
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+ case 25:
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+ adv7511_wr_and_or(sd, 0xfb, 0xf9, 2 << 1);
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+ break;
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+ case 30:
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+ adv7511_wr_and_or(sd, 0xfb, 0xf9, 3 << 1);
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+ break;
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+ default:
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+ adv7511_wr_and_or(sd, 0xfb, 0xf9, 0);
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+ break;
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+ }
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/* update quantization range based on new dv_timings */
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adv7511_set_rgb_quantization_mode(sd, state->rgb_quantization_range_ctrl);
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