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@@ -1340,8 +1340,6 @@
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#define I40E_PFINT_ICR0_GPIO_MASK (0x1 << I40E_PFINT_ICR0_GPIO_SHIFT)
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#define I40E_PFINT_ICR0_TIMESYNC_SHIFT 23
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#define I40E_PFINT_ICR0_TIMESYNC_MASK (0x1 << I40E_PFINT_ICR0_TIMESYNC_SHIFT)
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-#define I40E_PFINT_ICR0_STORM_DETECT_SHIFT 24
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-#define I40E_PFINT_ICR0_STORM_DETECT_MASK (0x1 << I40E_PFINT_ICR0_STORM_DETECT_SHIFT)
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#define I40E_PFINT_ICR0_LINK_STAT_CHANGE_SHIFT 25
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#define I40E_PFINT_ICR0_LINK_STAT_CHANGE_MASK (0x1 << I40E_PFINT_ICR0_LINK_STAT_CHANGE_SHIFT)
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#define I40E_PFINT_ICR0_HMC_ERR_SHIFT 26
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@@ -1367,8 +1365,6 @@
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#define I40E_PFINT_ICR0_ENA_GPIO_MASK (0x1 << I40E_PFINT_ICR0_ENA_GPIO_SHIFT)
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#define I40E_PFINT_ICR0_ENA_TIMESYNC_SHIFT 23
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#define I40E_PFINT_ICR0_ENA_TIMESYNC_MASK (0x1 << I40E_PFINT_ICR0_ENA_TIMESYNC_SHIFT)
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-#define I40E_PFINT_ICR0_ENA_STORM_DETECT_SHIFT 24
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-#define I40E_PFINT_ICR0_ENA_STORM_DETECT_MASK (0x1 << I40E_PFINT_ICR0_ENA_STORM_DETECT_SHIFT)
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#define I40E_PFINT_ICR0_ENA_LINK_STAT_CHANGE_SHIFT 25
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#define I40E_PFINT_ICR0_ENA_LINK_STAT_CHANGE_MASK (0x1 << I40E_PFINT_ICR0_ENA_LINK_STAT_CHANGE_SHIFT)
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#define I40E_PFINT_ICR0_ENA_HMC_ERR_SHIFT 26
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