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@@ -89,29 +89,12 @@ struct camelot_pcm {
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#define DMABRG_PREALLOC_BUFFER 32 * 1024
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#define DMABRG_PREALLOC_BUFFER_MAX 32 * 1024
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-/* support everything the SSI supports */
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-#define DMABRG_RATES \
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- SNDRV_PCM_RATE_8000_192000
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-
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-#define DMABRG_FMTS \
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- (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 | \
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- SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE | \
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- SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_U20_3LE | \
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- SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_U24_3LE | \
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- SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_U32_LE)
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-
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static struct snd_pcm_hardware camelot_pcm_hardware = {
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.info = (SNDRV_PCM_INFO_MMAP |
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SNDRV_PCM_INFO_INTERLEAVED |
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SNDRV_PCM_INFO_BLOCK_TRANSFER |
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SNDRV_PCM_INFO_MMAP_VALID |
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SNDRV_PCM_INFO_BATCH),
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- .formats = DMABRG_FMTS,
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- .rates = DMABRG_RATES,
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- .rate_min = 8000,
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- .rate_max = 192000,
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- .channels_min = 2,
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- .channels_max = 8, /* max of the SSI */
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.buffer_bytes_max = DMABRG_PERIOD_MAX,
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.period_bytes_min = DMABRG_PERIOD_MIN,
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.period_bytes_max = DMABRG_PERIOD_MAX / 2,
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