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@@ -219,23 +219,6 @@ static void mite_dma_reset(struct mite_channel *mite_chan)
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mite_chan->mite->mmio + MITE_CHOR(mite_chan->channel));
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}
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-static void dump_chip_signature(u32 csigr_bits)
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-{
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- unsigned int wpdep;
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-
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- /* get the wpdep bits and convert it to the write port fifo depth */
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- wpdep = CSIGR_TO_WPDEP(csigr_bits);
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- if (wpdep)
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- wpdep = BIT(wpdep);
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-
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- pr_info("version = %i, type = %i, mite mode = %i, interface mode = %i\n",
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- CSIGR_TO_VER(csigr_bits), CSIGR_TO_TYPE(csigr_bits),
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- CSIGR_TO_MMODE(csigr_bits), CSIGR_TO_IMODE(csigr_bits));
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- pr_info("num channels = %i, write post fifo depth = %i, wins = %i, iowins = %i\n",
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- CSIGR_TO_DMAC(csigr_bits), wpdep,
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- CSIGR_TO_WINS(csigr_bits), CSIGR_TO_IOWINS(csigr_bits));
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-}
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-
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static unsigned int mite_fifo_size(struct mite *mite, unsigned int channel)
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{
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unsigned int fcr_bits = readl(mite->mmio + MITE_FCR(channel));
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@@ -739,29 +722,24 @@ static int mite_setup(struct comedi_device *dev, struct mite *mite,
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int i;
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u32 csigr_bits;
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unsigned int unknown_dma_burst_bits;
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+ unsigned int wpdep;
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pci_set_master(mite->pcidev);
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mite->mmio = pci_ioremap_bar(mite->pcidev, 0);
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- if (!mite->mmio) {
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- dev_err(dev->class_dev,
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- "Failed to remap mite io memory address\n");
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+ if (!mite->mmio)
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return -ENOMEM;
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- }
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dev->mmio = pci_ioremap_bar(mite->pcidev, 1);
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- if (!dev->mmio) {
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- dev_err(dev->class_dev,
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- "Failed to remap daq io memory address\n");
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+ if (!dev->mmio)
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return -ENOMEM;
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- }
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daq_phys_addr = pci_resource_start(mite->pcidev, 1);
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length = pci_resource_len(mite->pcidev, 1);
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if (use_win1) {
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writel(0, mite->mmio + MITE_IODWBSR);
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- dev_info(dev->class_dev,
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- "using I/O Window Base Size register 1\n");
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+ dev_dbg(dev->class_dev,
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+ "mite: using I/O Window Base Size register 1\n");
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writel(daq_phys_addr | WENAB |
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MITE_IODWBSR_1_WSIZE_bits(length),
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mite->mmio + MITE_IODWBSR_1);
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@@ -792,7 +770,21 @@ static int mite_setup(struct comedi_device *dev, struct mite *mite,
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mite->num_channels, MAX_MITE_DMA_CHANNELS);
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mite->num_channels = MAX_MITE_DMA_CHANNELS;
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}
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- dump_chip_signature(csigr_bits);
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+
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+ /* get the wpdep bits and convert it to the write port fifo depth */
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+ wpdep = CSIGR_TO_WPDEP(csigr_bits);
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+ if (wpdep)
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+ wpdep = BIT(wpdep);
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+
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+ dev_dbg(dev->class_dev,
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+ "mite: version = %i, type = %i, mite mode = %i, interface mode = %i\n",
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+ CSIGR_TO_VER(csigr_bits), CSIGR_TO_TYPE(csigr_bits),
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+ CSIGR_TO_MMODE(csigr_bits), CSIGR_TO_IMODE(csigr_bits));
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+ dev_dbg(dev->class_dev,
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+ "mite: num channels = %i, write post fifo depth = %i, wins = %i, iowins = %i\n",
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+ CSIGR_TO_DMAC(csigr_bits), wpdep,
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+ CSIGR_TO_WINS(csigr_bits), CSIGR_TO_IOWINS(csigr_bits));
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+
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for (i = 0; i < mite->num_channels; i++) {
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writel(CHOR_DMARESET, mite->mmio + MITE_CHOR(i));
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/* disable interrupts */
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@@ -802,7 +794,7 @@ static int mite_setup(struct comedi_device *dev, struct mite *mite,
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mite->mmio + MITE_CHCR(i));
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}
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mite->fifo_size = mite_fifo_size(mite, 0);
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- dev_info(dev->class_dev, "fifo size is %i.\n", mite->fifo_size);
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+ dev_dbg(dev->class_dev, "mite: fifo size is %i.\n", mite->fifo_size);
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return 0;
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}
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