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@@ -25,24 +25,28 @@
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#include "generic.h"
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-#define AT91_RTC_IDR 0x24 /* Interrupt Disable Register */
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-#define AT91_RTC_IMR 0x28 /* Interrupt Mask Register */
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+#define AT91_RTC_IDR 0x24 /* Interrupt Disable Register */
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+#define AT91_RTC_IMR 0x28 /* Interrupt Mask Register */
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+#define AT91_RTC_IRQ_MASK 0x1f /* Available IRQs mask */
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void __init at91_sysirq_mask_rtc(u32 rtc_base)
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{
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void __iomem *base;
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- u32 mask;
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base = ioremap(rtc_base, 64);
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if (!base)
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return;
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- mask = readl_relaxed(base + AT91_RTC_IMR);
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- if (mask) {
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- pr_info("AT91: Disabling rtc irq\n");
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- writel_relaxed(mask, base + AT91_RTC_IDR);
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- (void)readl_relaxed(base + AT91_RTC_IMR); /* flush */
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- }
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+ /*
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+ * sam9x5 SoCs have the following errata:
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+ * "RTC: Interrupt Mask Register cannot be used
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+ * Interrupt Mask Register read always returns 0."
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+ *
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+ * Hence we're not relying on IMR values to disable
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+ * interrupts.
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+ */
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+ writel_relaxed(AT91_RTC_IRQ_MASK, base + AT91_RTC_IDR);
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+ (void)readl_relaxed(base + AT91_RTC_IMR); /* flush */
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iounmap(base);
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}
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