|
|
@@ -49,6 +49,16 @@
|
|
|
#define SST49LF008A 0x005a
|
|
|
#define AT49BV6416 0x00d6
|
|
|
|
|
|
+/*
|
|
|
+ * Status Register bit description. Used by flash devices that don't
|
|
|
+ * support DQ polling (e.g. HyperFlash)
|
|
|
+ */
|
|
|
+#define CFI_SR_DRB BIT(7)
|
|
|
+#define CFI_SR_ESB BIT(5)
|
|
|
+#define CFI_SR_PSB BIT(4)
|
|
|
+#define CFI_SR_WBASB BIT(3)
|
|
|
+#define CFI_SR_SLSB BIT(1)
|
|
|
+
|
|
|
static int cfi_amdstd_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
|
|
|
static int cfi_amdstd_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
|
|
|
static int cfi_amdstd_write_buffers(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
|
|
|
@@ -97,6 +107,48 @@ static struct mtd_chip_driver cfi_amdstd_chipdrv = {
|
|
|
.module = THIS_MODULE
|
|
|
};
|
|
|
|
|
|
+/*
|
|
|
+ * Use status register to poll for Erase/write completion when DQ is not
|
|
|
+ * supported. This is indicated by Bit[1:0] of SoftwareFeatures field in
|
|
|
+ * CFI Primary Vendor-Specific Extended Query table 1.5
|
|
|
+ */
|
|
|
+static int cfi_use_status_reg(struct cfi_private *cfi)
|
|
|
+{
|
|
|
+ struct cfi_pri_amdstd *extp = cfi->cmdset_priv;
|
|
|
+
|
|
|
+ return extp->MinorVersion >= '5' &&
|
|
|
+ (extp->SoftwareFeatures & 0x3) == 0x1;
|
|
|
+}
|
|
|
+
|
|
|
+static void cfi_check_err_status(struct map_info *map, unsigned long adr)
|
|
|
+{
|
|
|
+ struct cfi_private *cfi = map->fldrv_priv;
|
|
|
+ map_word status;
|
|
|
+
|
|
|
+ if (!cfi_use_status_reg(cfi))
|
|
|
+ return;
|
|
|
+
|
|
|
+ cfi_send_gen_cmd(0x70, cfi->addr_unlock1, 0, map, cfi,
|
|
|
+ cfi->device_type, NULL);
|
|
|
+ status = map_read(map, adr);
|
|
|
+
|
|
|
+ if (map_word_bitsset(map, status, CMD(0x3a))) {
|
|
|
+ unsigned long chipstatus = MERGESTATUS(status);
|
|
|
+
|
|
|
+ if (chipstatus & CFI_SR_ESB)
|
|
|
+ pr_err("%s erase operation failed, status %lx\n",
|
|
|
+ map->name, chipstatus);
|
|
|
+ if (chipstatus & CFI_SR_PSB)
|
|
|
+ pr_err("%s program operation failed, status %lx\n",
|
|
|
+ map->name, chipstatus);
|
|
|
+ if (chipstatus & CFI_SR_WBASB)
|
|
|
+ pr_err("%s buffer program command aborted, status %lx\n",
|
|
|
+ map->name, chipstatus);
|
|
|
+ if (chipstatus & CFI_SR_SLSB)
|
|
|
+ pr_err("%s sector write protected, status %lx\n",
|
|
|
+ map->name, chipstatus);
|
|
|
+ }
|
|
|
+}
|
|
|
|
|
|
/* #define DEBUG_CFI_FEATURES */
|
|
|
|
|
|
@@ -744,8 +796,22 @@ static struct mtd_info *cfi_amdstd_setup(struct mtd_info *mtd)
|
|
|
*/
|
|
|
static int __xipram chip_ready(struct map_info *map, unsigned long addr)
|
|
|
{
|
|
|
+ struct cfi_private *cfi = map->fldrv_priv;
|
|
|
map_word d, t;
|
|
|
|
|
|
+ if (cfi_use_status_reg(cfi)) {
|
|
|
+ map_word ready = CMD(CFI_SR_DRB);
|
|
|
+ /*
|
|
|
+ * For chips that support status register, check device
|
|
|
+ * ready bit
|
|
|
+ */
|
|
|
+ cfi_send_gen_cmd(0x70, cfi->addr_unlock1, 0, map, cfi,
|
|
|
+ cfi->device_type, NULL);
|
|
|
+ d = map_read(map, addr);
|
|
|
+
|
|
|
+ return map_word_andequal(map, d, ready, ready);
|
|
|
+ }
|
|
|
+
|
|
|
d = map_read(map, addr);
|
|
|
t = map_read(map, addr);
|
|
|
|
|
|
@@ -769,8 +835,27 @@ static int __xipram chip_ready(struct map_info *map, unsigned long addr)
|
|
|
*/
|
|
|
static int __xipram chip_good(struct map_info *map, unsigned long addr, map_word expected)
|
|
|
{
|
|
|
+ struct cfi_private *cfi = map->fldrv_priv;
|
|
|
map_word oldd, curd;
|
|
|
|
|
|
+ if (cfi_use_status_reg(cfi)) {
|
|
|
+ map_word ready = CMD(CFI_SR_DRB);
|
|
|
+ map_word err = CMD(CFI_SR_PSB | CFI_SR_ESB);
|
|
|
+ /*
|
|
|
+ * For chips that support status register, check device
|
|
|
+ * ready bit and Erase/Program status bit to know if
|
|
|
+ * operation succeeded.
|
|
|
+ */
|
|
|
+ cfi_send_gen_cmd(0x70, cfi->addr_unlock1, 0, map, cfi,
|
|
|
+ cfi->device_type, NULL);
|
|
|
+ curd = map_read(map, addr);
|
|
|
+
|
|
|
+ if (map_word_andequal(map, curd, ready, ready))
|
|
|
+ return !map_word_bitsset(map, curd, err);
|
|
|
+
|
|
|
+ return 0;
|
|
|
+ }
|
|
|
+
|
|
|
oldd = map_read(map, addr);
|
|
|
curd = map_read(map, addr);
|
|
|
|
|
|
@@ -1643,6 +1728,7 @@ static int __xipram do_write_oneword(struct map_info *map, struct flchip *chip,
|
|
|
/* Did we succeed? */
|
|
|
if (!chip_good(map, adr, datum)) {
|
|
|
/* reset on all failures. */
|
|
|
+ cfi_check_err_status(map, adr);
|
|
|
map_write(map, CMD(0xF0), chip->start);
|
|
|
/* FIXME - should have reset delay before continuing */
|
|
|
|
|
|
@@ -1896,6 +1982,7 @@ static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip,
|
|
|
* See e.g.
|
|
|
* http://www.spansion.com/Support/Application%20Notes/MirrorBit_Write_Buffer_Prog_Page_Buffer_Read_AN.pdf
|
|
|
*/
|
|
|
+ cfi_check_err_status(map, adr);
|
|
|
cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi,
|
|
|
cfi->device_type, NULL);
|
|
|
cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi,
|
|
|
@@ -2102,6 +2189,7 @@ retry:
|
|
|
|
|
|
if (!chip_good(map, adr, datum)) {
|
|
|
/* reset on all failures. */
|
|
|
+ cfi_check_err_status(map, adr);
|
|
|
map_write(map, CMD(0xF0), chip->start);
|
|
|
/* FIXME - should have reset delay before continuing */
|
|
|
|
|
|
@@ -2311,6 +2399,7 @@ static int __xipram do_erase_chip(struct map_info *map, struct flchip *chip)
|
|
|
/* Did we succeed? */
|
|
|
if (ret) {
|
|
|
/* reset on all failures. */
|
|
|
+ cfi_check_err_status(map, adr);
|
|
|
map_write(map, CMD(0xF0), chip->start);
|
|
|
/* FIXME - should have reset delay before continuing */
|
|
|
|
|
|
@@ -2407,6 +2496,7 @@ static int __xipram do_erase_oneblock(struct map_info *map, struct flchip *chip,
|
|
|
/* Did we succeed? */
|
|
|
if (ret) {
|
|
|
/* reset on all failures. */
|
|
|
+ cfi_check_err_status(map, adr);
|
|
|
map_write(map, CMD(0xF0), chip->start);
|
|
|
/* FIXME - should have reset delay before continuing */
|
|
|
|