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@@ -44,6 +44,34 @@ Optional Properties:
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- display-timings: timing settings for FIMD, as described in document [1].
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Can be used in case timings cannot be provided otherwise
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or to override timings provided by the panel.
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+- samsung,sysreg: handle to syscon used to control the system registers
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+- i80-if-timings: timing configuration for lcd i80 interface support.
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+ - cs-setup: clock cycles for the active period of address signal is enabled
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+ until chip select is enabled.
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+ If not specified, the default value(0) will be used.
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+ - wr-setup: clock cycles for the active period of CS signal is enabled until
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+ write signal is enabled.
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+ If not specified, the default value(0) will be used.
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+ - wr-active: clock cycles for the active period of CS is enabled.
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+ If not specified, the default value(1) will be used.
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+ - wr-hold: clock cycles for the active period of CS is disabled until write
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+ signal is disabled.
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+ If not specified, the default value(0) will be used.
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+
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+ The parameters are defined as:
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+
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+ VCLK(internal) __|??????|_____|??????|_____|??????|_____|??????|_____|??
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+ : : : : :
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+ Address Output --:<XXXXXXXXXXX:XXXXXXXXXXXX:XXXXXXXXXXXX:XXXXXXXXXXXX:XX
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+ | cs-setup+1 | : : :
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+ |<---------->| : : :
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+ Chip Select ???????????????|____________:____________:____________|??
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+ | wr-setup+1 | | wr-hold+1 |
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+ |<---------->| |<---------->|
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+ Write Enable ????????????????????????????|____________|???????????????
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+ | wr-active+1|
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+ |<---------->|
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+ Video Data ----------------------------<XXXXXXXXXXXXXXXXXXXXXXXXX>--
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The device node can contain 'port' child nodes according to the bindings defined
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in [2]. The following are properties specific to those nodes:
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